BROADBAND PACKET SWITCHING TECHNOLOGIES
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1 BROADBAND PACKET SWITCHING TECHNOLOGIES A Practical Guide to ATM Switches and IP Routers H. JONATHAN CHAO CHEUK H. LAM EMI OKI A Wiley-lnterscience Publication JOHN WILEY & SONS, INC. New York / Chichester / Weinheim / Brisbane / Singapore / Toronto
2 CONTENTS PREFACE xiii 1 INTRODUCTION ATM Switch Systems / Basics of ATM networks / ATM switch structure / IP Router Systems / Functions of IP routers / Architectures of IP routers / Design Criteria and Performance Requirements / 13 References / 14 2 BASICS OF PACKET SWITCHING Switching Concepts / Internal link blocking / Output port contention / Head-of-line blocking / Multicasting / Call splitting / Switch Architecture Classification / Time division switching / 22
3 Vi CONTENTS Space division switching / Buffering strategies / Performance of Basic Switches / Input-buffered switches / Output-buffered switches / Completely shared-buffer switches / 44 References / 46 3 INPUT-BUFFERED SWITCHES A Simple Switch Model / Head-of-line blocking phenomenon / Traffic models and related throughput results / Methods for Improving Performance / Increasing internal capacity / Increasing scheduling efficiency / Scheduling Algorithms / Parallel iterative matching (PIM) / Iterative round-robin matching (/RRM) / Iterative round-robin with SLIP (/SLIP) / Dual round-robin matching (DRRM) / Round-robin greedy scheduling / Design of round-robin arbiters/selectors / Output-Queuing Emulation / Most-Urgent-Cell-First-Algorithm (MUCFA) / Chuang et al.'s results / Lowest-Output-Occupancy-Cell-First Algorithm (LOOFA) / 78 References / 80 4 SHARED-MEMORY SWITCHES Linked-List Approach / Content-Addressable Memory Approach / Space-Time-Space Approach / Multistage Shared-Memory Switches / Washington University gigabit switch / Concentrator-based growable switch architecture / Multicast Shared-Memory Switches / 97
4 CONTENTS VM Shared-memory switch with a multicast logical queue / Shared-memory switch with cell copy / Shared-memory switch with address copy / 99 References / BANYAN-BASED SWITCHES Banyan Networks / Batcher-Sorting Network / Output Contention Resolution Algorithms / Three-phase implementation / Ring reservation / The Sunshine Switch / Deflection Routing / Tandem banyan switch / Shuffle-exchange network with deflection routing / Dual shuffle-exchange network with error-correcting routing / Multicast Copy Networks / Broadcast banyan network / Encoding process / Concentration / Decoding process / Overflow and call splitting / Overflow and input fairness / 134 References / KNOCKOUT-BASED SWITCHES Single-Stage Knockout Switch / Basic architecture / Knockout concentration principle / Construction of the concentrator / Channel Grouping Principle / Maximum throughput / Generalized knockout principle / A Two-Stage Multicast Output-Buffered ATM Switch / Two-stage configuration / 154
5 Viii CONTENTS Multicast grouping network / Translation tables / Multicast knockout principle / A Fault-Tolerant Multicast Output-Buffered ATM Switch / Fault model of switch element / Fault detection / Fault location and reconfiguration / Performance analysis of reconfigured switch module / Appendix / 185 References / THE ABACUS SWITCH Basic Architecture / Multicast Contention Resolution Algorithm / Implementation of Input Port Controller / Performance / Maximum throughput / Average delay / Cell loss probability / ATM Routing and Concentration Chip / Enhanced Abacus Switch / Memoryless multistage concentration network / Buffered multistage concentration network / Resequencing cells / Complexity comparison / Abacus Switch for Packet Switching / Packet interleaving / Cell interleaving / 222 References / CROSSPOINT-BUFFERED SWITCHES Overview of Crosspoint-Buffered Switches / Scalable Distributed Arbitration Switch / SDA structure / Performance of SDA switch / Multiple-QoS SDA Switch / MSDA structure / 234
6 CONTENTS ix Performance of MSDA switch / 236 References / THE TANDEM-CROSSPOINT SWITCH Overview of Input-Output-Buffered Switches / TDXP Structure / Basic architecture / Unicasting operation / Multicasting operation / Performance of TDXP Switch / 246 References / CLOS-NETWORK SWITCHES Routing Properties and Scheduling Methods / A Suboptimal Straight Matching Method for Dynamic Routing / The ATLANTA Switch / Basic architecture / Distributed and random arbitration / Multicasting / The Continuous Round-Robin Dispatching Switch / Basic architecture / Concurrent round-robin dispatching (CRRD) scheme / Desynchronization effect of CRRD / The Path Switch / Homogeneous capacity and route assignment / Heterogeneous capacity assignment / 274 References / OPTICAL PACKET SWITCHES All-Optical Packet Switches / The staggering switch / ATMOS / Duan's switch / Optoelectronic Packet Switches / HYPASS / STAR-TRACK / 286
7 X CONTENTS Cisneros and Brackett's Architecture / BNR switch / Wave-mux switch / The 3M Switch / Basic architecture / Cell delineation unit / VCI-overwrite unit / Cell synchronization unit / Optical Interconnection Network for Terabit IP Routers / Introduction / A terabit IP router architecture / Router module and route controller / Optical interconnection network / Ping-pong arbitration unit / OIN complexity / Power budget analysis / Crosstalk analysis / 328 References / WIRELESS ATM SWITCHES Wireless ATM Structure Overviews / System considerations / Wireless ATM protocol / Wireless ATM Systems / NEC's WATMnet prototype system / Olivetti's radio ATM LAN / Virtual connection tree / BAHAMA wireless ATM LAN / NTT's wireless ATM Access / Other European projects / Radio Access Layers / Radio physical layer / Medium access control layer / 346 ' Data link control layer / Handoff in Wireless ATM / Connection rerouting / Buffering / 340
8 CONTENTS Xi Cell routing in a COS / Mobility-Support ATM Switch / Design of a mobility-support switch / Performance / 358 References / IP ROUTE LOOKUPS IP Router Design / Architectures of generic routers / IP route lookup design / IP Route Lookup Based on Caching Technique / IP Route Lookup Based on Standard Trie Structure / Patricia Tree / Small Forwarding Tables for Fast Route Lookups / Level 1 of data structure / Levels 2 and 3 of data structure / Performance / Route Lookups in Hardware at Memory Access Speeds / The DIR-24-8-BASIC scheme / Performance / IP Lookups Using Multiway Search / Adapting binary search for best matching prefix / Precomputed 16-bit prefix table / Multiway binary search: exploiting the cache line / Performance / IP Route Lookups for Gigabit Switch Routers / Lookup algorithms and data structure construction / Performance / IP Route Lookups Using Two-Trie Structure / IP route lookup algorithm / Prefix update algorithms / Performance / 403 References / 404
9 Xii CONTENTS APPENDIX SONET AND ATM PROTOCOLS 407 A.1 ATM Protocol Reference Model / 409 A.2 Synchronous Optical Network (SONET) / 410 A.2.1 SONET sublayers / 410 A.2.2 STS-N signals / 412 A.2.3 SONET overhead bytes / 414 A.2.4 Scrambling and descrambling / 417 A.2.5 Frequency justification / 418 A.2.6 Automatic protection switching (APS) / 419 A.2.7 STS-3 versus STS-3c / 421 A.2.8 OC-N multiplexer / 422 A.3 Sub-Layer Functions in Reference Model / 423 A.4 Asynchronous Transfer Mode (ATM) / 425 A.4.1 Virtual path/virtual channel identifier (VPI/VCI) / 426 A.4.2 Payload type identifier (PTI) / 427 A.4.3 Cell loss priority (CLP) / 428 A.4.4 Pre-defined header field values / 428 A.5 ATM Adaptation Layer (AAL) / 429 A.5.1 AAL type 1 (AAL1) / 431 A.5.2 AAL type 2 (AAL2) / 433 A.5.3 AAL types 3/4 (AAL3/4) / 434 A.5.4 AAL type 5 (AAL5) / 436 References / 438 INDEX 439
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