The Design of TTCAN Bus Network Node Based on Embedded Operating System VxWorks

Transcription

1 Advanced Materials Research Submitted: ISSN: , Vols , pp Accepted: doi: / Online: Trans Tech Publications, Switzerland The Design of TTCAN Bus Network Node Based on Embedded Operating System VxWorks Jianwei Zhang 1, a, Xingke Tian 1,b, Peng Zhang 1,c, and Wei Wang 1,d 1 China North Vehicle Research Institute, Beijing, , China a mallee1984@163.com, b xktian201@163.com, c zhang_peng413@163.com, d wangweishr@sina.com Keywords: TTCAN, MPC5121E, VxWorks, interrupt service routine, network model Abstract. The TTCAN network protocols have been achieved based on the MPC5121e microprocessor in embedded real-time operating system VxWorks. The optimal solution is calling the callback function of the interrupt service routine to complete the CAN network data transmission and using the auxiliary clock to calculate the local time offset. Introduction TTCAN (Time triggered Controlled Area Network) is an extension of the standard high-level communication protocols at the application layer CAN protocol. It is to make data communications with certainty essentially by time-triggered message response scheduling. In this paper, based on the MPC5121e processors, technical approach interrupt response, to achieve the transmission of TTCAN network data under embedded real-time operating system VxWorks, effectively ensuring the real-time transmission of TTCAN bus network. TTCAN Protocol TTCAN protocol is a high-level protocol for CAN, which synchronizes the communication schedule of all nodes in the network through a static schedule. Define different messages on the bus a different time segment, only one packet transmission on the bus at the same time slice, which avoids bus arbitration, and ensures the real-time information. The protocol defines a static scheduling mechanism, time synchronization, time course content and error monitoring mechanism [1]. Static Scheduling Mechanism Scheduling of TTCAN protocol in essence belongs to static scheduling based on the table, the implementation of the algorithm must ensure that the network strict clock synchronization between each node. In TTCAN, time reference master node periodically sends messages to each node in the network to achieve clock synchronization message transmission on the network management and forecasting through the schedule. Reference message marking the start of a basic cycle which consists of several basic cycle time window, including exclusive window, arbitration window and free window as shown in Fig.1. Exclusive window can only be assigned to a specific message, the message is generally a hard real-time periodic features. The message exclusive bus and other messages in the time window can't compete with it. Meanwhile CAN retransmission mechanism is banned, and assure affect data transmission of the exclusive window. Arbitration window can be assigned to multiple message simultaneously, in accordance with their own non-destructive bit CAN arbitration mechanism determines when a bus competition. High-priority message occupies the bus. Several continuous arbitration windows can be combined, which called the merge window, to facilitate the rapid exchange of data with a large number of system [2]. All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of Trans Tech Publications, (ID: , Pennsylvania State University, University Park, USA-04/03/16,20:53:17)

2 938 Advanced Manufacturing and Industrial Engineering There is no message scheduling in free window, which for future network expansion. Clock Synchronization Fig.1 System matrix in TTCAN TTCAN provides two levels of time synchronization: Level 1 and Level 2. Level 1 only achieved with reference message for the basic synchronization time, while Level 2 is the Level 1 of the expansion, higher synchronization accuracy, provides a global clock and the clock drift correction, and can be synchronized to an external clock source such as a GPS system. TTCAN protocol has three time reference to accomplish synchronous communication scheduling, namely local time, cycle time and the global time. (1) Network time unit TTCAN network of the most important features is to synchronize the nodes in order to obtain a consistent time-trigger, so that the operation can be time-triggered orderly. Therefore, the definition of the basic time unit of the network is very important. Time interval scales are based on the NTU (Net Time Unit) as a unit in TTCAN. At level 1, which is based on the CAN bit time, is a constant. At level 2, which is based on a second 2 -n, is a non-integer value, must contain at least three bit after the decimal point, to compensate for clock drift or synchronize external time reference. Each node provides a divider for the system clock rely on the oscillation circuit. The divider generates the NTU in the node, the node's TUR (Time Unit Ratio) to maintain the current system clock and NTU relationship. f(ntu) = f(systemclock)/tur (1) Finally, NTU to establish synchronization of local time and global time as shown in Fig.2. Fig.2 Local time and NTU

3 Advanced Materials Research Vols (2) Local time Local time is a counter based on NTU; each node has its own local time. In the Level 1, TUR is a constant value, Local time is a 16-bit integer counter, and increases one NTU each time. NTU is defined as a CAN bit time; in Level 2, the local time is a 16-bit integer counter plus N(N 3) decimal expansion bit. Timing accuracy to NTU 2 -N. TUR is a non-integer value, can be continuously adjusted to compensate for drift or time clock synchronized to an external clock reference. (3) Cycle time In TTCAN bus, the message included in the boot node synchronization packets, each packet of a valid boot will start a new cycle causes the base loop and reset the cycle time of every node as shown in Fig.3 describes the cycle time synchronization process, all the nodes work in the same way within the network. In each message frame start bit (SOF) sampling points, the local node time is latched into the register Sync Mark; but after a valid reference information is transmitted or received, the data in Sync Mark is send to the register Ref Mark. The difference between current local time and the time in Ref Mark is the cycle time(cycle time=local time-ref Mark). When a node has received a new valid reference message, it will start a new basic cycle, the cycle time will also reset. Fig.3 Cycle time (4) Global time In Level 1, the TTCAN network common time reference is the cycle time, when time starts of each basic cycle, the cycle time is started again, the cycle time for each node based on the local time. In Level 2, the TTCAN network added to each node of the global time, time master node will considered local time as global time and send the message to the network as Master Ref Mark. The other nodes latch local time reference when message received and compare the value of Master Ref Mark, so that calculate the local offset. Current local time local time offset value plus the estimated value of the network that is to get a global time. The global time needed to implementation of additional hardware, but can obtain higher synchronization accuracy. Fig.4 shows the calculation of the global time. Network time is synchronized in the way in TTCAN. Fig.4 Global time

4 940 Advanced Manufacturing and Industrial Engineering Because of the crystal frequency instability, temperature and voltage changes, each node in the network have different levels of time clock drift. Each node must continually adjust the local clock divider value to be consistent with the time value of the local master node NTU, so the node local time consistent with the global time. Clock drift compensation method is: calculating the difference between two adjacent Master Ref Mark in the same basic cycle, and the receiving node local time count value for this basic cycle. The ratio of these two numbers is the value of two nodes divide ratio. Formula is as follows: df Re Master _ Re f f _ Mark _ Mark Re f _ Mark _ previous Master _ Re f _ Mark _ previous (2) TUR = df TURprevious (3) Through the adjustment measures above, the difference global time of two nodes within a maximum value of not more than one NTU in Level 2. NTU is a typical CAN bit time. This is very effective in ensuring the accuracy of synchronization between nodes to meet higher demand. [3] TTCAN Network Node Hardware Design Network node implementation based on embedded operating system VxWorks, so using MPC5121e microprocessor which has two CAN interfaces to meet transceiver system graphics drawing, image processing, and data transmission of TTCAN requirements. MPC5121e microprocessor s main processing engine is based on the Power Architecture e300 core,frequency up to 400MHz, includes PowerVR Vertex Geometry processor. It can support 3D texturing and shading, with a abundant of peripherals, including two-channel speed of 1Mbps CAN interface. Figure 5 is a block diagram showing a hardware configuration of a circuit. Fig.5 Block diagram

5 Advanced Materials Research Vols Hardware resource configuration is as follows: Processor:Freescale MPC5121E,400MHz SDRAM:512MB32-bitDDR2 SDRAM Memory NOR FLASH:64MB byte 32-bitINTERL NOR FLASH NAND FLASH:256MB byte 8-bit NAND FLASH PCI Bus:32bit,33MHz-66MHz,standard PCI interface,mini PCI interface LAN:10/100M Ethernet port IDE:ATA100 IDE interface(ide and SD card cannot be used at the same time) SD:SD interface(ide and SD card cannot be used at the same time) SATA:SATA IDE interface CAN:two CAN BUS Serial Port:serial port used for console USB:USB 2.0 EEPROM:EEPROM with I2C interface Audio:AC97 audio interface(in/out/aux) Video:DVI interface(can be transfer into VGA interface) Other interfaces:i2c, I2S, SPI, PSC, GPIO WATCHDOG:MPC5121E own WATCHDOG JTAG:Standard 16-wire JTAG interface Button:A reset button Power Consumption:Typical power consumption 8W,Maximum power consumption 12W TTCAN Network Node Software Design Software design is based on the embedded real-time operating system VxWorks, there are two ways to complete the data transmission of TTCAN network nodes. (1) VxWorks tasks Solution VxWorks real-time kernel provides the basic multitasking environment. A multitasking environment allows for real-time applications constructed as a set of separate tasks, each has its own set of threads and system resources. In order to coordinate behavior between tasks, communications equipment between tasks allow these tasks synchronization and communication operations to coordinate their activities. Inter-task communication devices including semaphores, message queues, pipes and network sockets and so on[4]. In order to complete the TTCAN network data transmission, create CAN data communications tasks in the system: taskspawn("tcantx",prio_tx_task,vx_fp_task,vxw_stack_size, (FUNCPTR)CANTx, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) However, VxWorks multitasking construct a multi-threaded concurrent execution of illusion, in fact, the system kernel is based on a staggered implementation of the scheduling algorithms, such as priority-based preemptive scheduling and task scheduling rotation. Each task has its own context, that is the environment has its own CPU and system resources. Thus, when the CAN bus data transceiver, can not guarantee the timing accuracy of the local clock. (2) Interrupt Service Solution In real-time systems, handling interrupts is another major function, this is because the interruption is an important way to external event notification system. In order to be able to get fast interrupt response, use the VxWorks interrupt service routine (ISR) to complete the data transmission. On MPC5121e microprocessor platform, CAN network as an external device, so that we can access the CAN network device receives the CAN bus data packet, message queues establish complete data transceiver CAN bus network through VxWorks system interrupt callback function:

6 942 Advanced Manufacturing and Industrial Engineering taskspawn ("tcantx", PRIO_TX_TASK, 0, 20000, (FUNCPTR) CANTx, txmsgqueue, canfd, 0,0,0,0,0,0,0,0) Because using the hardware interrupt, the system can respond to the interrupt faster, the interrupt process in the context of a particular task in addition to all execution contexts, therefore, the task does not involve handling the interrupt context switching. This ensures that the data transceiver when not subject to other tasks, such as graphics drawing, image processing tasks, effectively guarantee the synchronization accuracy of the network nodes. Interrupt Design of VxWorks (1) Real-time design of the Interrupt Processing The VxWorks interrupt processing mechanism is that interrupt processing and task processing in the differentstack respectively.the interrupt processing runs in a specific context, which has no task control block(tcb). This makes the interrupt generation will trigger some key storage registers without causing task context switch, thus reducing interrupt delay. The interrupt service routine only completed within the minimum time notice interruption occurs, not completed through the commucation between the interrupt processing and task, similar to Linux processing mechanism. This is to avoid the interrupt service routine limit, further narrowing the interrupt delay. VxWorks kernel Wind commonly used signals which are highly optimized to achieve close interrupt instead of exclusive access, which also reduce interrupt delay for certain contribution[5]. (2) Interrupt Programming Interface For the preparation of the implementation of the interrupt service routine control, VxWorks provide the system interface functions in the library intlib and intarchlib. For applications that require the use of intlib library, for BSP(Board Support Packet) that require the use of intarchliblibrary. VxWorks provides disconnected, enabled, disabled and other API functions, including: locking and unlocking interrupts, intlock() and intuniock(), set interrupt level, intleveiset(),connect ISR, intconnect(), enable and disable interrupts, intenable() and intdisable(). Some service program depend on the specific hardware and BSP, the need to achieve a specific hardware control based on functional requirements. Interrupt vector is a list of the interrupt processing entry address. This address is related to the base address of vector table. Interrupt vector table base address is configured by usrinit (). Macro INUM_TO_IVEC ()complete the interrupt number to interrupt vector transformation. If the processor supports interrupt stack in the kernel boot also need to be completed before the interrupt stack configuration, such as define the macro value of ISR_STACK_SIZE in configall.h. If the processor does not support dedicated interrupt stack, using the current task stack. Driver interrupt service routine should end as soon as possible, it can not be called directly or indirectly acquire a semaphore operation in the ISR, such as semtake(), printf(), malloc() function, to avoid block. But you can use semgive(), logmsg(), msgqsend() and bcopy() function to communication and synchronization between the tasks. Then, when the CAN network device receives a packet through the interrupt callback function that will be passed to the CAN data message queue of the system tasks. Implement of Local Time Offset When receiving the global time from the master node, the node needs correction as a benchmark for its time, latch local time value Ref Mark and compare the value received Master Ref Mark, then calculated the local time offset. In VxWorks operating system, there are a variety of timer interface functions, such as taskdelay (), watchdog, sleep and so on, which are in the reference tick as the timing offset. The deviation of timer

7 Advanced Materials Research Vols is large, high-precision timing requirements can not be met. If you increase the system clockrate, the system will be frequently interrupted, lower efficiency. Therefore, the use of auxiliary clock to achieve timing. Auxiliary clock is the CPU utilization target board outside another addition to the system clock timer interrupt achieve. VxWorks provides a series of system clock operation interface, users can mount their own interrupt service routine way to achieve precise delay. When the auxiliary clock is done, it will trigger the interrupt service routine. First, configure the auxiliary clock to ensure the auxiliary clock can be used. Then calling sysauxclkconnect() function to connect the interrupt service routine and the auxiliary clock interrupt mount, calling sysauxclkrate() function to configure the auxiliary clock interrupt cycle, and calling sysauxclkenable()/sysaux ClkDisable() function to enable and disable auxiliary clock. The local time offset has been calculated by setting the auxiliary clock slice value based on the master node time. Implementing the data transmission within different time slice in TTCAN network. Experimental Verification (1) Simulation Building systems in the network model in CANoe as shown in Fig.6. Fig.6 Network model The experiments prove that the data transmission errors in 20 microseconds or less, to meet the requirements of TTCAN network transmission. (2) System verification Put the node into the system. Then measuring the delay of data transmission delay using the CAN bus analyzer. The results in shown in Table.1. Table.1 Message delay No. Addr Cycle/ms Byte Delay /us Content 1 ID reticle position value 2 ID reticle control value 3 ID gyro value 4 ID control status 5 ID reticle type 6 ID reticle status 7 ID auto track signal 8 ID distance 9 ID parameter 1 10 ID parameter 2 11 ID parameter 3 12 ID parameter 4

8 944 Advanced Manufacturing and Industrial Engineering 13 ID handle value 14 ID driver status 15 ID code value 16 ID speed 17 ID power status 18 ID mode Conclusions In this paper, the TTCAN network protocols have been achieved based on the MPC5121e microprocessor in embedded real-time operating system VxWorks. The optimal solution is calling the callback function of the interrupt service routine to complete the CAN network data transmission. It is effectively to limit the delay of data transmission, to improve the local time offset accuracy, and to ensure the real-time performance of the TTCAN bus. The method of implementation the TTCAN bus network protocol in the embedded real-time operating system VxWorks can be referenced. References [1] Zhu Yuan, Wu Hao. Control and communication network in hybrid fuel cell vehicles [J].Tinghua Science and Technology, 2004,9(3): [2] Tindell K, Burns A. Calculating controller area network (CAN) message response times[j]. Control Engineering Practice, 1995,3(8): [3] Zuberi KM,Shin KG. Non-preemptive scheduling of messages on controller area network for real-time control application[a]. Proceeding of the first IEEE real-time technology and applications symposium. Los Alamitos:IEEE Comput.Soc.Press, 1995: [4] WindRiver System,Inc. VxWorks Programmer s Guide5.4[Z].USA:WindRiverSystem, Inc,1999 [5] VxWorks for PowerPC Architecture Supplement[Z]. Wind River System,Inc,2003

9 Advanced Manufacturing and Industrial Engineering / The Design of TTCAN Bus Network Node Based on Embedded Operating System VxWorks / DOI References [2] Tindell K, Burns A. Calculating controller area network (CAN) message response times[j]. Control Engineering Practice, 1995, 3(8): / (95)