EECS 373 Midterm 2 Fall 2018

Transcription

1 EECS 373 Midterm 2 Fall 2018 Name: unique name: Sign the honor code: I have neither given nor received aid on this exam nor observed anyone else doing so. Nor did I discuss this exam with anyone after it was given to the rest of the class. NOTES: 1. Closed book/notes. 2. Calculators are allowed, but no PDAs, Portables, Cell phones, etc. Nothing capable of wireless communication! 3. Don t spend too much time on any one problem. If you get stuck, move on!!! 4. You have about 120 minutes for the exam. 5. Be sure to show work and explain what you ve done when asked to do so. Getting partial credit without showing work will be rare. Page 1 of 18

2 1. Multiple choice/fill-in-the-blank. Pick the best answer. [12 points, 2 each] a. In Verilog an always@* block is generally used to create combinational logic / glitch-free logic / sequential logic / a flip-flop. b. You know a given DAC is monotonic. Which of the following can you then be certain of? the output voltage may go down when the digital input increases. the INL of the converter must be less than 1 LSB. the DNL of the converter must be less than 1 LSB. the output voltage will go down or stay the same when the digital input decreases. none of the above. c. A significant difference between standard UART and I2C transactions is that: I2C allows for full duplex while UART does not. UART has a shared clock wire while I2C does not. I2C requires addresses while UART does not. UART generally requires a pullup resistor while I2C generally does not. d. A significant difference between standard UART and SPI is that: the UART protocol is a standardized and well documented while the SPI protocol is not. UART has a shared clock wire while SPI does not. SPI requires addresses while UART does not. UART generally requires a pullup resistor while I2C generally does not. e. It is useful to have a reference register on a timer because: it allows us to generate interrupts when an event occurs it allows us to generate an interrupt when a certain value is reached it can provide a more precise time of an event than reading the timer in software it provides a way to count the number of events which have occurred in a given amount of time. f. When must data be stable for a correct I²C bus transaction? when the clock is low when the clock is in a high-impedance state when the clock transitions high to low when the clock is high Page 2 of 18

3 2. Short answer. Each question must be answered in 15 words or less. [10 points, 2 points each] a. Why do we use virtual timers? b. What is the main reason to prefer to use an R/2R ladder DAC rather than a flash DAC? c. What is the main reason to prefer to use a flash DAC rather than an R/2R ladder DAC? d. If we say that we allow preemption, what does that mean in the context of interrupts? e. In the context of a complier, what does a linker do? Page 3 of 18

4 3. Consider the following C function. int whatfun(int a, float *b, int *c) { int x; x=bob(*b, c); if(x>0) return(x+a+*c); return(9); } Rewrite the above code in Thumb2 assembly for our SmartFusion while following the ABI. You are to assume the bob() function is ABI-compliant and has a prototype of int bob(float, int*). [11 points] Page 4 of 18

5 4. Consider the following circuit. [6 points] a) Assuming V ref is 4.0V, and there is an INL of ±1/4 LSB, what range of input voltages might cause a value of to come out of the encoder? Show your work. [3] b) Given the same assumptions as above, what range of input values are certain to cause a value of to come out of the encoder? Show your work. [3] Page 5 of 18

6 5. Consider the following circuit: Assuming there is no error beyond quantization error, indicate what the value of V out would be given each of the following values of V in. V ref is 4V. [6 points, 2 points each] a) V in=2.2 Volts b) V in=3.3 Volts c) V in=1.1 Volts Page 6 of 18

7 6. Timers [7 points] You are given a device which contains an 8-bit timer. That timer consists of three 8-bit registers: a count register (CNT) which holds the count value of the timer, a reference register (REF), and a control register (CTL). It also contains a single output EQ that goes high when the counter is enabled and CNT==REF. The CTL register consists of the following fields (0 is the most significant bit): EN (bit 0): Must be set to 1 for the timer to be enabled. RST (bit 1): If this bit is set to 1, CNT will reset to 0 every time the count value reaches the reference value. Otherwise, the timer will continue to increment when the reference value is reached. DIV (bit 2): Setting this bit to 1 divides the system clock by 16 to produce the input clock frequency. If DIV = 0, then the input clock frequency equals the system clock frequency. PRE (bits 3-7, 3 is MSB): A 5-bit prescaler which divides the clock by PRE+1. This division is in addition to the divide by 16 provided by the DIV bit. The system clock runs at 1 MHz. a) What is the maximum range of this timer (how long until it overflows)? What is the resolution (gap between numbers) in that case? [3] Max range: Resolution: b) Say you want EQ to go high every 64ms. Find values of the CTL register and the REF register that will cause that to happen. [4] CTL register (in binary): REF register (in decimal): 7. What is the purpose of the LSB of the PC on the processor we use in lab? Be specific. [3 points] Page 7 of 18

8 Design Problem: Light Follower Your task is to design a simple light follower using the SmartFusion kit. Two light sensors are mounted on the tips of a T shaft connected to a motor. The device follows a light source by keeping the light reading from the two sensors approximately the same. The system will also keep track of the motors angular position. Figure 1: Two sensors on a T-shaft connected to a motor Read the entire problem before beginning! Motor Control The motor turns at a constant speed when activated and can turn in either direction. A hardware controller is provided for you with the following control features. CCW CW Motor Action 0 0 Stop 0 1 Clockwise 1 0 Counter Clockwise 1 1 undefined Page 8 of 18

9 Reading the Light Sensors The light sensors produce a voltage proportional to the light level. The voltages will be read with the ADC described below. The ADC converts an analog voltage into an 8-bit unsigned integer. You can assume that its conversion voltage range is matched to the light sensor s output range. Ain 0 and Ain 1: Analog input channel 0 and 1. SEL: Logical 0 selects analog channel 0 and logical 1 selects channel 1. Start: Start is a one clock cycle pulse that starts the conversion. CLK: The ADC clock input. EOC: A one clock cycle pulse that indicates end of conversion. DATA[7:0]: Data is available on this port after the conversion. A conversion is started by issuing a 1 clock cycle pulse to the Start pin. After the converter finishes, a one clock cycle pulse occurs on the EOC pin. Data is then present on the data port and stable until the next start is issued. Light sensor 1 has been connected to Ain 0 and Light sensor 2 has been connected to Ain 1. Rotational Sensor A rotational sensor provides a pulse every 10 degrees the motor is rotated. We will count the pulses from a known starting position to determine the relative position for motor. The pulses can vary in width depending on the speed of rotation, but will always be greater than the system clock. We will use the pulse to generate an interrupt to count the pulses. You may assume a turn is in the direction the motor is currently turning and that no turn will be registered if the motor is not turning. Page 9 of 18

10 Desired Memory Map There are three devices, each with their own PSEL line: The motor controller, located in the address range 0x x400500FF. This is used to control the motor. The hardware has been done for you. The ADC/light sensor, located in the address range 0x x400501FF. These locations can be used to select an analog input and start a conversion among other things. When a conversion is completed, it will assert FABINT for one clock. The rotary sensor, located in the address range 0x x400502FF. It will assert FABINT for one clock when a new pulse is first detected. Notice that the ADC and rotary sensor both use FABINT. This is handled in two ways: The ADC will actually generate something called FABINT1 and the rotary sensor something called FABINT2. Those two signals will be ORed together into a single FABINT signal sent to the processor. The hardware for this (an OR gate) has been done for you. The other problem is figuring out which device generated the interrupt. The ADC and rotary sensor each have a memory-mapped register which will be asserted when their event occurs and can be cleared from software. Address Usage Register Description 0x Read/Write Bit 0 is mapped to CW of the motor controller. Bit 1 is mapped to CCW of the motor controller. All other bits are zeros when read and have no effect when written. The motor will turn in the direction specified until the next time this address is written. The hardware for this is done for you. 0x Read/Write If bit 0 was last written as a 0, Ain 0 will be used as the analog input. If a 1 was last written to bit 0, Ain 1 will be used as the analog input. 0x Write only When this register is written (with any value), a new ADC conversion is started. When it finishes, FABINT will be asserted. 0x Read only The lower 8 bits of this register are to hold the results of the last ADC conversion done. 0x C Read/Write This register will be set to a 1 once an analog to digital conversion has finished and will stay so until a write is done to this register (which will clear the bit). 0x Read/Write This register will be set to a 1 if the rotary sensor has the start of a pulse and will stay so until a write is done to this register (which will clear the bit). Table 1: Memory Mapped Registers for the Three Devices Page 10 of 18

11 Desired System Behavior A timer has been configured to generate an interrupt every 100ms. That interrupt will cause the ISR Timer_IRQHandler to run. That ISR is to start a new ADC conversion of one of the light sensors. Each time it should change which sensor is being sampled. We do not want to wait in any ISR for the ADC to complete its conversion. We want the main program to be able to run during that conversion. Finally, you should design the system so that the following things happen: If sensor 1 has the higher value (is brighter), the motor should turn clockwise. If sensor 2 has the higher value, the motor should turn counter clockwise. Otherwise it should stay still. Every time the rotary sensor detects a pulse, a global variable named FACING should be incremented (if we are currently turning clockwise) or decremented (if currently turning counter clockwise). Assume the variable is a signed integer that has already been declared. You may freely declare other global variables as needed. Page 11 of 18

12 Part 1: ADC Hardware Design [17 points] Complete the hardware design implementing the ADC interface and interrupt generation for the ADC. There is additional space on the next page for your answer. module control( /*** APB3 BUS INTERFACE ***/ input PCLK, // clock input PRESERN, // system reset input PSEL, // peripheral select input PENABLE, // distinguishes access phase output wire PREADY, // peripheral ready signal output wire PSLVERR, // error signal input PWRITE, // distinguishes read and write cycles input [31:0] PADDR, // I/O address input wire [31:0] PWDATA, // data from processor to I/O device (32 bits) output reg [31:0] PRDATA, // data to processor from I/O device (32-bits) /*** I/O PORTS DECLARATION ***/ output wire FABINT, ); //ADC: output wire ADC_SEL, output wire ADC_CLK, output wire ADC_Start, input EOC, input [7:0] ADC_Data assign ADC_Clock=PCLK; Page 12 of 18

13 Extra Page for Part 1 Page 13 of 18

14 Part 2: Rotary Interrupt Hardware Design [8 points] Complete the hardware design below in schematic form that implements the rotary sensor. You may use: D flip-flops with CE (clock enable) and/or reset. Standard gates (AND, OR, XOR with any number of inputs) as well as inversion bubbles as a shorthand for NOT gates. Tri-state buffers with multiple inputs and outputs. You may use signal labels to show signal connections rather than drawing lines. For example, you can use the name PCLK for all the clock names instead of drawing wires. Input signals are on the left, output signals are on the right. PRDATA[31:0] PCLK PSEL PREADY PENABLE PWRITE PADDR[7:0 PWDATA[31:0 FABINT2 Rotary Pulse Page 14 of 18

15 Part 3: System Control (Timer Interrupt) [7 points] Provide the code in C for the timer IRQ handler. Declare any global variables used above this function. _attribute_((interrupt)) void Timer_IRQHandler( void ) { Page 15 of 18

16 Part 4: Fabric Interrupt [13 points] Complete the design by writing the function below in C. You may declare any needed global variables that you didn t declare in part 3 above the function. _attribute_((interrupt)) void Fabric_IRQHandler( void ) { Page 16 of 18

17 Extra Page for Part 4 Page 17 of 18

18 References Page 18 of 18