Talk highlights: Giovanni Darbo / INFN - Genova Bench tests (MCCex, HP-16700) Wafer tests Test on FH3.x / FH4.

Transcription

1 Plans for testing MCC-DSM Giovanni Darbo / INFN - Genova Giovanni.Darbo@ge ge.infn.it Talk highlights: Bench tests (MCCex, HP-16700) Wafer tests Test on FH3.x / FH4.x Software Copy of this talk on the ATLAS Genova Site: ge.infn.it/atlas/.it/atlas/pixelweek/home.html Pixel Week, December 2001

2 MCC-DSM Chip submitted 19 Nov 2001 back to test Jan 2002? MCC TEST Packaged chips; Test on Wafer Test on Flex Hybrid (FH3.x / FH4.x) Pixel Week, December

3 Step 1: packaged chips: MCC-DSM Test Program Use standard 84 pins chip carrier; (Jan/Feb 2002) Test and characterise chips using Logic State Analyser / Pattern Generator (LSA/PG) and MCCex. Step 2 (if step 1 is successful): test full wafer(s): (Feb 2002) One (or two) wafer is sent to a firm to execute functional/parametric test to sort out good chips; Good chips will be used for next steps. Step 3: Flex / Module: (from Spring 2002) Use wafer tested chips on Flex Hybrid (FH3.x or FH4.x) to make FE-I modules; Step 4: Test beam / Irradiation: (from Spring 2002) Modules with MCC-DSM will be put on beam test and irradiated; Packaged MCC chips will be irradiated (MCCex). Note: schedule based on wafers delivered from foundry 15 Jan 02. Pixel Week, December

4 MCC s from first wafer will be packaged (LDCC- 84); Test on Packaged MCC s Pinout compatible with MCC-AMS except for STRIp/s substituted by DTO2p/n LDCC-84 / cavity bonding diagram Genova will only test the packaged MCC s while test on wafer will be contracted to outside firm. STRIp / STRIn substituted by DTO2p / DTO2n Pixel Week, December

5 Packaged MCC s: New Support Card The new MCC support card is designed for VDD supply. The same board (with different components loaded) can be used for: Test board to grab the Agilent LSA/PG system To TFM HP pods Adapter card to plug in the MCCex to test the MCC- DSM Cable adapter interface between the MCCex and the Flex Hybrid test system Connector to MCC socket of MCCex MCC socket Pixel Week, December

6 Test Bench for Packaged MCC Measurements: Functional test with test vectors from SimPix and comparison with Verilog model (test vector size = 256 k); Scan chain tests; HP LSA / PG Frequency scan vs. VDD IDD vs VDD and CK frequency Delay line linearity, range, I/O set-up / hold time Preliminary chip yield HP-8110A January Genova HP-E363xA Pixel Week, December

7 Test of Packaged MCC: MCCex Complementary of the LSA/PG test set-up: test primary for validation of Event Building, L1 trigger, FIFO management; Deeper test vector memory (8 M-vectors) allows faster and more effective yield evaluation; X-check of yield results with respect to LSA/PG set-up. When packaged MCC are qualified, next step is the test of chips on wafer Found good chips will be used for irradiation tests, TurboPLL debugging and other possible applications. January Genova Pixel Week, December

8 Wafer Testing If packaged chip pass qualification criteria, a full 8 wafer will be tested under probe-station by Delta (Denmark): Required time: 4 week for tools setting up, 2 week for wafer test. February Delta Reticle Up to 4 M-vectors and 40 MHz test frequency. MCC-DSM Test vectors and order placed in Jan 2002, wafer will be sent after tests are passed in Genova Pixel Week, December

9 Irradiation Test Rad-hard behaviour of the MCC-DSM will be tested at PS next spring. The set-up used to irradiate the MCC-D0 will be reused with minimum modifications (power supply 3.3 V 2.5 V). MCC measured in running conditions; Static & dynamic SEU measurements on SRAM, register and transmitted commands. Spring CERN - PS Pixel Week, December

10 Test of MCC on Flex: Relay Switch Card PC controlled switchboard to interface flex designed probecard to test instruments. Flex connections: 2 x FE chip I/O Flex frame connector Instruments connections Agilent-34970A Data acquisition / switch unit HP LSA/PG MCCex Pattern Generator Data Pod Pattern Generator Clock Pod FH Frame Connector Logic Analyser Pod Probe Card FE#1 To/from MCCex To/from DVM Scanner PC I/O Port Probe Card FE#2 Ex. Clock TFM - E.Ruscino / Genova Pixel Week, December

11 Test on Flex: Test Stand Agilent-E363xA Agilent-34970A Parametric measurements (V/I/Ω): Broken lines, missing wire-bonds, unconnected termination resistors, etc; Functional MCC test: To verify the functioning of the MCC Test set-up ready for MCC-DSM and FH3.x / FH4.x From February Genova MCCex Agilent-16700A TFM Pixel Week, December

12 Test on Flex: FH3.x & FH4.x MCC-DSM has double pinout compatibility FH3.x and FH4.x The two configuration are selected by AMSDSM pin AMSDSM = VDD (or unconnected) AMSDSM = GND AMS mode U-shaped pinout FH3.x FH3.x Pixel Week, December

13 Test Running Software: SimPix C++ FE Model MccEx Geant Module Hits Random Hits Generator Verilog MCC Model HP16700A Script File Script Interpreter Automatic Comparison Test Vectors SimPix will be used to generate test vectors for all the test systems: Stimulus will be generated by SimPix Expected outputs from the MCC will be generated running stimuli trough the MCC verilog model Other tests... scan chain test vectors using Synopsys ATPG Pixel Week, December

14 Hardware: Status & Conclusions test setups are all ready or in final debugging phase. Software: SimPix: Interface to HP in development; Some modification to SimPix to use the MCC Verilog model as the reference model in place of the C++ model. Test Vectors: The single test vector files must be merged together and some cleanup is needed; Vectors must be converted to the format requested by Delta (WGL format). Pixel Week, December