EE 314 Spring 2003 Microprocessor Systems. Parallel Printer Port Use and Digital-to-Analog Conversion

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1 EE 314 Spring 2003 Microprocessor Systems Laboratory Project #6 Parallel Printer Port Use and Digital-to-Analog Conversion Important Note Concerning Equipment. This is the first lab that has required the use of hardware external to the PC. The external hardware to be used will be provided. Each group will use a Digilab XLA board and two R2R Resistor Ladder boards. Each workstation in the lab also is provided with a Tektronix TDS3014 Digital Oscilloscope. This equipment is not to be removed from the lab under any circumstances. The Digilab board is shown in appendix A, with all of the features required in this lab highlighted. (The boards in the lab will look slightly different than this drawing as they are a newer version of the board) Note the large chip (U3) at the top-center of the board. This chip, called a Field-Programmable Gate Array (or FPGA), is a programmable logic device, and can be programmed to contain a digital circuit to implement any digital design. For this lab, it is programmed with the circuit shown in appendix B. The process of programming the gate array to contain a particular circuit design is called configuration. For this lab, a DOS program, called CDALAB.EXE will be provided which will configure the board with the appropriate circuit design for this lab. For the Digilab board to work properly, a 6VDC wall-plug power supply must be attached to the power supply connector (J12); a parallel cable connected to a printer port on the PC and attached to the 25 pin connector on the Digilab board. Switch SW9 on the Digilab board is used to switch the parallel port on the board between configuration mode (PROG position) and parallel port access mode (PORT position). When using the CDALAB.EXE program to configure the board, SW9 must be in the PROG position. After the board has been configured, SW9 must be placed in the PORT position. If SW9 is not placed in the PORT position before use, the configuration in the gate array will be erased as soon as your software tries to write to the parallel port and nothing will work properly. This won t damage the board, it simply won t work properly. If you forget to set the switch to the PORT position, simply run the CDALAB.EXE program again to re-configure the gate array. IBM PC type parallel printer ports can appear at one of several I/O addresses. All of the machines in the lab have their printer ports at address 0x278 or 0x378. The CDALAB.EXE program allows specification of the parallel port to use via the p option: cdalab p278 configure board at port address 0x278 cdalab p378 configure board at port address 0x378 If you try to configure the board at one port address and the program tells you that it can t find the board, try the other port address. If you are interested in seeing how the CDALAB.EXE program works, the source code is included on the class web site in the DOSCFG.ZIP file. The program is written in 8086 assembly language. For this lab, each team will also be provided with two R2R resistor ladder boards. As described later in this document, an R2R ladder is a way of constructing a digital to analog converter. Each R2R ladder board is a single, 8 bit, D/A converter. In this lab the two R2R boards will be used to create two analog output channels which will be used to draw pictures on an oscilloscope. The R2R ladder boards are to be plugged 1

2 into the 72 pin connector, labeled J1, on the Digilab board. The boards must be plugged into the correct locations and with the correct orientation for the lab to work. The X channel board is to be plugged into the LD1 LD8 outputs with the most significant bit position (D7 on the R2R board) connected to LD1. The Y channel R2R board is the be connected to signals DP and CA-CG with the most significant bit (D7 on the R2R board) connected to CG on the Digilab board. If the Digilab board is positioned so that the switches and buttons are near you, the LD1 LD7 signals are just to left of center on the top row of J1 and the X channel R2R board will be positioned so that the yellow resistor networks on the board face you. The Y channel R2R board will be just to the left of the X channel board on the bottom row of contacts and facing away from you. Use of Oscilloscope The oscilloscopes in the lab are Tektronix TDS 3014, four channel Digital Phosphor Oscilloscopes. These are very high quality and expensive oscilloscopes that were recently donated by Tektronix. Please don t mistreat them. For this lab, only two of the four channels (channel 1 and channel 2) will be used. The X channel D/A converter should be connected to scope channel 1, and the Y channel D/A converter should be connected to scope channel 2. Select Vertical Scale: The output of the D/A converters will range from 0 to about 4 volts, so 1 volt per division should be selected for the vertical scale for each channel. Select channel 1 (the yellow channel button) and adjust the Vertical Scale knob until the CH1 value in the lower left corner of the display indicates 1V. Similarly, adjust channel 2, by pressing the blue channel button and adjust the Vertical Scale knob until CH2 indicates 1V. Set up the triggering: Press the Trigger Menu button. A menu will appear on the bottom and right of the display. Select channel 1 as the trigger channel by pressing the menu button for Source and then press the right side menu button to select channel 1. Select DC Coupling, rising edge Slope, and set the Level at about 2V by adjusting the Trigger Level knob. After the triggering is set up, the menu can be removed from the display by pressing the Menu Off button at the lower right corner of the display. Set display to normal mode: For checking the linearity of the D/A converters, the oscilloscope needs to be in the normal display mode. To set the oscilloscope into the normal display mode, press the Display button (in the lower middle of the group of six buttons at the top right of the control panel) to bring up the Display Menu. Select XY display from the lower menu buttons, and then Off (YT) from the right set of menu buttons. In the normal display mode, the oscilloscope plots channel voltage on the Y axis vs. time on the X axis. The time scale is controlled by the Horizontal Scale knob. Set display to XY mode: For the main part of this lab, the oscilloscope should be placed into XY mode. This is done by pressing the Display button (in the lower middle of the group of six buttons at the top right of the control panel), which brings up the Display menu. Select XY display on the bottom row of menu buttons and then Triggered XY from the right set of menu buttons. Overview and Introduction To the Lab Procedure In this laboratory you will be using a 2 channel digital to analog converter to draw images on the display of an oscilloscope operating in XY mode. The digital to analog converters are attached to a logic circuit implemented in the gate array on a Digilab board and accessed through the parallel printer port interface on an IBM PC type computer. Objectives Goals for this lab are: (1) Understand how to use the printer port hardware interface. (2) Understand how an R-2R ladder works for D/A conversion. (3) Write a program which uses both C/C++ and Assembly language to interface to external hardware through the parallel port. 2

3 Pre - Lab (Due at the beginning of the lab period.) 1. Review the detailed schematic for a simple two-channel D/A converter (attached, appendix B). Note how the D/A converter is controlled by the standard printer port. Also review the given printer port organization. What values need to be output to the printer port registers to load data into each set of registers (the X and Y channels)? You will need to find more information on parallel port usage. One good source the web site You can find many more such documents by searching the web. 2. Write a program in Turbo C++ (provided on all the lab machines in EEME 136) that uses the provided pputils.cpp and pputils.h to: Determine the location of the parallel port registers. Print the location of these registers to the screen (Base Address, Control Address, and Data Address) Drive all Data pins low (Verify this with a multimeter or an oscilloscope). Use the zipped project posted to the web-site to get started. 3. Determine what the output voltage is on the R2R ladder in Figure 1 if the value of the inputs is: D7 D6 D5 D4 D3 D2 D1 D Assume Vdd = 5volts (Hint: use superposition) D7 D6 D5 D4 D3 Figure 1 Output D2 D1 D0 Lab Procedure 1. Set up your hardware. Unplug the Digilab power supply, and install the R2R ladder boards. Attach the oscilloscope probes for the two channels to the outputs of the R2R ladder boards. Attach the ground leads on the scope probes (the alligator clip) to the pads on the R2R boards. Connect the parallel port cable between the computer and the Digilab board. Check the setup carefully before applying power to the Digilab board. 3

4 2. Test both channels of the D/A converter using an oscilloscope. Plot the linearity of the converters. In connecting the R/2R ladders to the Digilab board FPGA outputs, note that the X Channel outputs are LD1 LD8, which should be connected to one R/2R ladder. The Y channel outputs are DP, CA - CG, these should be connected to another R/2R ladder. To test the linearity of the D/A converters, write a program that loops, writing the values out to the two D/A channels. If this is viewed on the oscilloscope (with X on channel 1, and Y on channel 2). The display should show a sawtooth wave. You will need to adjust the Horizontal Scale until a display showing one or two cycles of the wave is visible. It may be necessary to adjust the triggering level, using the Trigger Level knob as well. In a D/A converter with good linearity, the output should rise in a straight, diagonal line to the peak value and then fall off with a straight vertical line. If the slope up is a curved line or shows glitches, then the linearity of the converter is poor. 3. Derive a way to drive the binary D/A converter with 2 s complement numbers. This should be done totally in software. The input values to the D/A converters are 8 bit unsigned numbers. The value 0 corresponds to an output of 0 volts and the value 255 corresponds to an output of approximately 3.8 to 4.0 volts. A signed integer variable in C has a range of to How can the range of the signed integer be mapped to an output that can be fed the D/A converter? 4. Write a program to drive the two channels simultaneously, drawing various geometric figures. The program should present a menu to the user showing the various figures that can be drawn. The user should be able to make s selection from the menu and have the program continuously draw that figure on the oscilloscope display until stopped by the user striking anykey. The menu should then be presented and the user allowed to make another choice. One of the choices on the menu should be to quit the program. The menu should list at least all of the following choices: 1) Horizontal line 2) Vertical line 3) Diagonal line 4) Circle 5) Ellipse 6) Lissajous Figure. The mathematical details of a Lissajous figure will be discussed during lecture. 5. Extend your program from the previous problem to allow the Lissajous figures to "rotate" at varying rates in space. Extra Credit Extend the program to draw some more complicated figures. For exmple: draw an arbitrary figure on the oscilloscope. Demonstrate it using a figure of your choice, for example, your initials or a favorite cartoon character. In one previous semester, another group developed a complete, working Asteroids game with the game graphics displayed on the oscilloscope and the input coming from the keyboard. Another possibility would be a simple CAD program allowing the user to draws figures composed of lines on the display with the user command interface on the PC monitor, the user input coming from the keyboard and mouse, and the graphics display on the Oscilloscope. Lab report The report is due at the start of the following lab period. Include all programs in the report and observe the required format. 4

5 Appendix A. Parallel port connector FPGA programming ROM Breadboard area where R2R ladder can be constructed Power supply connector Switch must be on PORT FPGA Parallel port signals are available on J2 connector J12 J9 J10 U10 PWE PD0 PD1 PD2 PD4 PD4 PD5 PD6 PD7 PAS PINT PRS PWT PDS PROG 8dip PORT J11 SW9 R11 CLK C26 C27 DONE DIN PRG INT U6 LD9 RP11 R9 R10 C25 20 dip U8 U7 14 dip C21 R8 R7 R6 8dip U4 C22 C24 RP10 U3 C17 C18 C23 J8 C20 C16 C19 (c) CSCOLE 2000 J7 C15 J6 C14 C13 D3 R4 R5 8dip O1 O2 O3 D2 R3 D1 U5 C12 16 dip CLK2 O1 O2 O3 O4 O5 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PAS PDS PWE PINT BN1S BN1P BN2S BN2P HS VS RXD TXD PS2C PS2D R G B R2 C9 C10 C11 J5 U9 C8 C7 J4 J3 J2 J1 DSP1 RP1 RP2 RP3 RP4 DSP2 RP5 RP6 CA CB CC CD CE CF CG DP A1 A2 A3 A4 SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 BTN1 BTN2 BTN3 BTN4 LDG LD1 LD2 LD3 LD4 LD5 LD6 LD7 LD8 AUDC AUD1 AUD2 C1 C2 C3 C4 20 dip RP7 C5 U1 RP8 R1 20 dip C6 U2 RP9 BN2 BN1 SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 BTN1 BTN2 BTN3 BTN4 LD1 LD2 LD3 LD4 LD5 LD6 LD7 LD8 NOTE: This drawing represents a Digilab board. The board currently being used is a Digilab XLA, which is very similar but looks slightly different. The main difference is the placement of the switches, buttons, LED s and the interface connector (labeled J1 on the XLA boards). 5

6 Appendix B. High Level Diagram of Data Flow D7 D6 D5 D4 D3 X Channel Output D2 Parallel Port D1 D0 FPGA on Digilab Board Y Channel D7 D6 D5 D4 Output D3 D2 D1 D0 6

7 FPGA Configuration The control signals used from the parallel port are summarized in the table below: Data7 - Data0 Autofd Init Strobe Data for both X and Y channel Clocks the X channel Clear for both channels Clocks the Y Channel Note: The X and Y channel outputs on this diagram are labeled incorrectly. LD8 is the least significant bit of the X channel and the Y channel outputs are DP and CA-CG. 7

8 Register Macro (from previous diagram) The truth table for the component FDC can be found at It has also been reproduced here: Inputs Output CLR D C Q 1 X X

CS2204 DIGITAL LOGIC & STATE MACHINE DESIGN SPRING 2011

CS2204 DIGITAL LOGIC & STATE MACHINE DESIGN SPRING 2011 GENERAL DEVELOPMENT CYCLE WITH FPGAS FOR A NEW CHIP 1. Introduction A digital product is developed as a new (digital) chip or as a new printed circuit