Technology Overview: VITA 42 (XMC) MERCURY TECHNOLOGY OVERVIEW

Transcription

1 Technology Overview: VITA 42 (XMC) MERCURY TECHNOLOGY OVERVIEW

2 INTRODUCTION This Mercury Technology Overview is one in a series designed to provide a deeper look at the array of Mercury technologies available to designers of high-performance signal processing systems. In this overview, we look at VITA 42 (XMC), a new computing standard that combines the familiar PCI Mezzanine Card (PMC) with the latest in serial fabric technology. The overview discusses the motivation behind creating a new standard, the primary issues its architects were trying to solve, and some points in the architecture that may help decisions on implementing systems using the standard. To get the most from this overview, the reader should already be familiar with these resources: Mercury Technology Viewpoint: Evolution of Computing Standards for Signal Processing The concept of plug-in mezzanines such as PMC This overview does not represent the complete technical detail available in the specifications discussed, but it does draw on factual information from those specifications. Copies of complete specifications are available for purchase upon release as ANSI standards from VITA, the trade association responsible for their development, at CREATING XMC XMC, or Switched Mezzanine Card, builds on the extremely popular PMC format and addresses three primary motives: Compatibility - XMC leverages the existing PMC form factor with commonality, keeping the dense, low-profile form factor that can be used for I/O expansion or adjunct processing. High-density, high-performance computing Size- and weight-constrained applications using several form factors including VME64, VPX, CompactPCI and AdvancedTCA benefit from the modular expansion capability of PMC modules, and can take advantage of XMC in the same way. Improved bandwidth Using a choice of modern serial fabric interconnects, system designers have access to improved bandwidth. Compared to PCI-X bandwidth in the 1 Gigabyte per second (1 GB/s) range, XMC modules can achieve over 2.5 GB/s using today s fabric speeds. features called for in the specification include: A high-speed switched interconnect Open, standardized technologies for switched fabrics Standard PMC form factors Compatibility with existing PMC specifications PMC, XMC, or dual-mode mezzanine cards PMC, XMC, or dual-mode carriers Standard VME, CompactPCI, Advanced TCA, and PCI Express carriers Standard PMC stacking heights Optional conduction cooling OVERVIEW OF XMC XMC is based on the VITA 42 family of specifications. The XMC base specification introduces a new module format based on familiar PMC mechanicals and adds a new set of high-speed differential signaling connectors. The base specification provides a common set of definitions for physical characteristics of modules, on which layered or dot specifications for implementation of specific switched serial fabric technology can be overlaid. VITA 42 specifications currently include: VITA 42.0 XMC VITA 42.1 XMC Parallel RapidIO Protocol Layer Standard VITA 42.2 XMC Serial RapidIO Protocol Layer Standard VITA 42.3 XMC PCI Express Protocol Layer Standard VITA 42.4 XMC HyperTransport Protocol Layer Standard VITA 42.5 XMC Aurora Pin Assignments VITA XMC General Purpose I/O Standard XMCs enable an embedded system to be more configurable, either by the supplier or the user. Modules may be added to improve performance, add or change functionality or provide for system upgrades. Not all technology evolves at the same pace, so XMCs allow change as necessary, helping to protect technology investments and extend the effective life cycle. The XMC specification defines an open standard for supporting high-speed, switched interconnect protocols on an existing, widely deployed form factor. In light of this objective, specific Figure 1. XMC Module Technology Overview: XMC 1

3 An XMC module can follow one of several footprints: Single width: 149mm long by 74mm wide, generally following the outline defined in IEEE Single width short: omits the PCI connectors, shortening length to 139mm. Double width: 149mm long by 149mm wide, with a second complete set of connectors. Double width short: again, omits PCI connectors, shortening length to 139mm. Single-width PMC modules use up to four 64-pin, 10mm-high connectors designated P11 through P14 onto which PCI or PCI- X signals, user I/O and power are mapped. This 10mm connector height allows the module to be mounted on carrier boards with a 0.8 slot pitch. The XMC specification leaves these connector definitions unchanged, but allows these connectors to be omitted. By adding a set of entirely new connectors, XMC modules allow addition of high-speed fabrics independent of the PCI bus both can co-exist on a module, or either can be used independently. Single-width XMC modules add two new high-density, highspeed connectors designated P15 (primary) and P16 (secondary). Each new connector contains 114 pins. On the P15 primary connector, 20 differential pairs are defined for high-speed signaling, along with 3.3V power and ground, I2C, JTAG, reset and presence signals. On the P16 secondary connector, 20 high-speed differential pairs are defined, along with grounds and 38 user-defined pins for additional I/O. For double-width XMC modules, additional secondary connectors P25 and P26 are added, offering additional pins for fabric connections. P25 has several no-connect signals, with the intent to manage an XMC module using the signals on P15. As with PMC modules, XMC modules offer: Front panel I/O by defining a "keep-out" zone intended for mounting a connector at the opposite end of the module from the PCI and high-speed connectors. Mounting standoffs that accept retention screws from the carrier board for a secure mechanical mount. Alignment holes to receive a guide pin in one of two positions on the carrier board, which also defines voltage compatibility. NEW HIGH-SPEED XMC CONNECTORS The connectors selected for XMC are the Samtec ASP / family or equivalent, which has important characteristics for the application. Signal Integrity Each differential contact pair is currently rated at signal speeds up to Gigabits per second (Gb/s) using today s driver silicon, and this rating is expected to evolve to 5 Gb/s and over as technology continues to improve. Insertion Force XMC modules are designed to be pressed into the carrier board, an operation that requires the carrier to be removed from the system. Insertion force is not an overwhelming concern, but removal can require some care and perhaps a leverage tool such as a screwdriver. Environmental Factors XMC connectors are designed for 900 insertion cycles, exceeding the rating on the existing PMC connectors. XMC POWER AND COOLING XMC modules are based on 3.3V power, along with variable power (VPWR) defined as either 5V or 12V. Incoming power pins are rated at 1A each. Standoff New High Speed Connectors P15, P16 Voltage Keying Holes Figure 2. XMC Module Layout Standoff XMC modules are dimensioned with several cooling strategies in mind, including forced air and conduction cooling. However, the XMC specification does not discuss specific cooling implementations. XMC allows for approximately 100W of power inlet, but forcedair cooling in most carrier configurations can only deal with about 15W based on airflow through the standard 10mm connector height. The VITA 48 (REDI) specification allows a 12mm XMC connector height on the carrier for improved airflow. XMC integrators should carefully review the power ratings and cooling capacity in the application. 2 Technology Overview: XMC

4 IPMI SUPPORT XMC modules provide hardware definition information that an external controller can read using Intelligent Platform Management Interface (IPMI) commands and Inter-Integrated Circuit (I2C) serial bus transactions. XMC modules support the I2C link and optionally support the base IPMI commands defined in PICMG 2.9. The data fields provided by an XMC module s IPMI resource include the minimum FRU records defined in the Platform Management FRU Information Storage Definition V1.0 (including the board information area record, which may be stored in a non-volatile memory) and a minimum XMC-specific record type defined in the base XMC specification (VITA 42.0). These minimum IPMI requirements allow an XMC module to use a simple passive device, such as a small PROM, for IPMI support. An XMC module can also use a more complex device to provide additional IPMI features or to avoid using a dedicated PROM, but it must always respond to the serial EEPROM IPMI address with data responses that are equivalent to a serial EEPROM. MAPPING FOR PCI EXPRESS One of the primary goals of XMC was the introduction of highspeed serial switched fabrics into the architecture. PCI Express is emerging as a leading input/output local bus, which makes it a natural design target for next-generation mezzanine cards. The following table shows the pin mapping for connector P15 in a single-width XMC. Connector P16 can be an additional PCI Express connector or a user I/O connector. Table 1. Link Definition Interface Configuration Link 0 Connectors Link 1 Connectors XMC Width Single 1, 2, 4 or 8-lane interface P15 N/A Single Dual 1, 2, 4 or 8-lane interface P15 P16 Single Single 16-lane interface P15, P16 N/A Single Single 1, 2, 4 or 8-lane interface P15 N/A Double Dual 1, 2, 4 or 8-lane interface P15 P25 Double Dual 16-lane interface P15, P16 P25, P26 Double Single 16-lane interface P15, P25 N/A Double Single 32-lane interface P15, P16, P25, P26 N/A Double Table 2. XMC.3 P15 Connector Pin Definition A B C D E F 1 PET0p0 PET0n0 # PET0p1 PET0n1 # 2 GND GND # GND GND # 3 PET0p2 PET0n2 # PET0p3 PET0n3 # 4 GND GND # GND GND # 5 PET0p4 PET0n4 # PET0p5 PET0n5 # 6 GND GND # GND GND # 7 PET0p6 PET0n6 # PET0p7 PET0n7 # 8 GND GND # GND GND # 9 RFU RFU RFU RFU RFU # 10 GND GND # GND GND # 11 PER0p0 PER0n0 # PER0p1 PER0n1 # 12 GND GND # GND GND # 13 PER0p2 PER0n2 # PER0p3 PER0n3 # 14 GND GND # GND GND # 15 PER0p4 PER0n4 RFU PER0p5 PER0n5 # 16 GND GND # GND GND # 17 PER0p6 PER0n6 # PER0p7 PER0n7 # 18 GND GND RFU GND GND RFU 19 REFCLK+0 REFCLK-0 RFU WAKE# ROOT0# RFU # = Refer to the VITA 42.0 standard for the definition of these connector pins. Technology Overview: XMC 3

5 The VITA 42.3 dot specification delineates pin mappings for PCI Express over the base XMC connector. A VITA 42.3 XMC may support either one or two links; each link can be 1, 2, 4, 8, 16 or 32 PCI Express lanes wide. The XMC connectors used to form each link depend on the XMC configuration. MAPPING FOR SERIAL RAPIDIO VITA 42.2 extends the XMC architecture and defines the use of serial RapidIO as the fabric connection to a carrier card. In this mapping, a single-width XMC module supports up to four 4x LP-serial Rapid I/O links with differential signaling pairs mapped onto P15 and P16. These links have been mapped with enough ground pins included to support the high-speed signaling required. XMC concentrates on the definition of interboard connections, but one advantage of serial RapidIO is as an intraboard connection. Many of today s advanced processors, such as the Freescale MPC8641 dual-core PowerPC processor or the Texas Instruments TMS320C6455 DSP, offer on-chip serial RapidIO ports with direct connection into the processor. By extending the connections from processors throughout the system via the interboard backplane and switch card connections, systems can scale their processing power very effectively. MAPPING FOR GENERAL-PURPOSE I/O Another dot specification in development for XMC maps several commonly used serial I/O ports onto XMC connectors: Ethernet USB EIA-232 and EIA-485 Serial ATA, FibreChannel or Serial Attached SCSI These are relatively low speed interfaces, but standardizing usage on the XMC connectors will be an aid to systems designers. Table 3. Primary Serial RapidIO 4X Connector Pin Definition A B C D E F 1 S0_TD0+ S0_TD0-3.3V S0_TD1+ S0_TD1- VPWR 2 GND GND TRST# GND GND MRSTI# 3 S0_TD2+ S0_TD2-3.3V S0_TD3+ S0_TD3- VPWR 4 GND GND TCK GND GND MRSTO# 5 S1_TD0+ S1_TD0-3.3V S1_TD1+ S1_TD1- VPWR 6 GND GND TMS GND GND +12V 7 S1_TD2+ S1_TD2-3.3V S1_TD3+ S1_TD3- VPWR 8 GND GND TDI GND GND -12V 9 RFU RFU UD RFU RFU VPWR 10 GND GND TDO GND GND GA0 11 S0_RD0+ S0_RD0- MBIST# S0_RD1+ S0_RD1- VPWR 12 GND GND GA1 GND GND MPRESENT# 13 S0_RD2+ S0_RD2-3.3V AUX S0_RD3+ S0_RD3- VPWR 14 GND GND GA2 GND GND MSDA 15 S1_RD0+ S1_RD0- UD S1_RD1+ S1_RD1- VPWR 16 GND GND MVMRO GND GND MSCL 17 S1_RD2+ S1_RD2- RFU S1_RD3+ S1_RD3- RFU 18 GND GND UD GND GND UD 19 RFU RFU UD RFU RFU UD Table 4. Secondary Serial RapidIO 4X Connector Pin Definition A B C D E F 1 S0_TD0+ S0_TD0- UD S0_TD1+ S0_TD1- UD 2 GND GND UD GND GND UD 3 S0_TD2+ S0_TD2- UD S0_TD3+ S0_TD3- UD 4 GND GND UD GND GND UD 5 S1_TD0+ S1_TD0- UD S1_TD1+ S1_TD1- UD 6 GND GND UD GND GND UD 7 S1_TD2+ S1_TD2- UD S1_TD3+ S1_TD3- UD 8 GND GND UD GND GND UD 9 RFU RFU UD RFU RFU UD 10 GND GND UD GND GND UD 11 S0_RD0+ S0_RD0- UD S0_RD1+ S0_RD1- UD 12 GND GND UD GND GND UD 13 S0_RD2+ S0_RD2- UD S0_RD3+ S0_RD3- UD 14 GND GND UD GND GND UD 15 S1_RD0+ S1_RD0- UD S1_RD1+ S1_RD1- UD 16 GND GND UD GND GND UD 17 S1_RD2+ S1_RD2- UD S1_RD3+ S1_RD3- UD 18 GND GND UD GND GND UD 19 RFU RFU UD RFU RFU UD 4 Technology Overview: XMC

6 XMC IN DEVELOPMENT AND USE Mercury engineering teams are deeply involved in the definition of XMC, in several cases leading the development of key dot specifications. Many other organizations also support these efforts, including several leading embedded computing manufacturers and several major defense electronics system integration companies. This combination of architects from leading equipment vendors, integrators and users helped select best-of-breed concepts and technology from multiple existing and new standards developed for embedded computing products. Along with Mercury Computer Systems, representatives from the following organizations are participating in the working group efforts of the XMC standards development process. Many of these same companies have made product announcements in support of a robust ecosystem for XMC. APW Electronic Solutions Artesyn Communication Products Curtiss-Wright Controls Embedded Computing FCI Electronics Foxconn Electronics Inc. GE Fanuc Hybricon Corporation IBSi MEN Mikro Electronik GmbH MITRE Corporation Motorola Embedded Communications Computing Radstone Embedded Computing SBS Technologies, Inc. Spectrum Signal Processing, Inc. Sun Microsystems Technobox, Inc. TEK Microsystems, Inc. Thales Computers Tyco Electronics CONCLUSION PMCs have proved to be extremely successful, and the XMC form factor promises to build on that success and become widely adopted. XMCs offer the same modularity as PMCs, which has proven to help designers protect their investments and extend their product life-cycles. XMCs now combine the benefits of modular, low-profile packaging with the compatibility of a PCI or PCI-X interface and the new high-performance bandwidth available through serial fabrics like RapidIO. This combination further extends the life cycle of the technology well into the future. Challenges Drive Innovation ia a trademark of Mercury Computer Systems, Inc. RapioIO is a registered trademark of the RapidIO Trade Association. All other products mentioned may be trademarks or registered trademarks of their respective holders. Mercury believes this information is accurate as of its publication date and is not responsible for any inadvertent errors. The information contained herein is subject to change without notice. This document, including layout and graphics, is a copyrighted work and is protected by worldwide copyright laws and treaties. You may not reproduce this work, prepare derivative works based on this work, distribute copies of this work to the public by sale or other transfer of ownership, or by rental, lease or lending, perform or display this work publicly, or otherwise commercially exploit this work. Copyright 2006 Mercury Computer Systems, Inc vita42_to Worldwide Locations Mercury Computer Systems has R&D, support and sales locations in France, Germany, Japan, the United Kingdom and the United States. Corporate Headquarters 199 Riverneck Road Chelmsford, MA USA +1 (978) (866) Fax +1 (978) For office locations and contact information, please call the corporate headquarters or visit our Web site at