THE ELECTRONICS for CUORE

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1 THE ELECTRONICS for CUORE UCLA (testing) Huan Z. Huang, Xiaohua Liu, Stephen Trentalange, Charles Whitten, Xiaoyu (Brian) Zhu. USC (production) Frank T. Avignone, Ray Edmonds, Carl Rosenfeld, Kevin Wilson. INFN-MIB (design, prototyping and validation) Andrea Giachero, Claudio Gotti, Matteo Maino, Gianluigi Pessina, Lorenzo Cassina

2 Electronic System Scheme Detector Links to the detectors: PEN and glue Kapton boards. Very front-end (on the fridge) Antialiasing Pre SS x12 K Bias and load resistors X6 Glue Logic DAQ Backplane Glue. Logic Main board Bessel Filter Backplane Small Faraday Cages = PEN =Constantan Close to the DAQ K =Kapton Heater Linear DC/DC 48 V Pulser Supply, 9 V, 48 V to 12/6 V AC/DC 5 V Calibration Pulse Gen. Power supply system Glue Logic from DAQ to ALL blocks GS, 19 April

3 Electronic System Scheme: design completed Detector Links to the detectors: PEN and glue Kapton boards. Very front-end (on the fridge) = design completed Antialiasing Pre SS x12 K Bias and load resistors X6 Glue Logic DAQ Backplane Glue. Logic Main board Bessel Filter Backplane Small Faraday Cages = PEN =Constantan Close to the DAQ K =Kapton Heater Linear DC/DC 48 V Pulser Supply, 9 V, NEW 48 V to 12/6 V AC/DC 5 V Calibration Pulse Gen. Power supply system Glue Logic from DAQ to ALL blocks GS, 19 April

4 Electronic System Scheme: prototype done Detector Links to the detectors: PEN and glue Kapton boards. Very front-end (on the fridge) = prototype done Antialiasing Pre SS x12 K Bias and load resistors X6 Glue Logic DAQ Backplane Glue. Logic Main board Bessel Filter Backplane Small Faraday Cages = PEN =Constantan Close to the DAQ K =Kapton Heater Linear DC/DC 48 V Pulser Supply, 9 V, 48 V to 12/6 V AC/DC 5 V Calibration Pulse Gen. Power supply system Glue Logic from DAQ to ALL blocks GS, 19 April

5 Electronic System Scheme: production completed Detector Links to the detectors: = production completed PEN and glue Kapton boards. = production almost completed Antialiasing Very front-end (on the fridge) Pre SS x12 K Bias and load resistors Backplane X6 Glue. Logic Main board Glue NEW Logic Bessel Filter Backplane NEW NEW Small Faraday Cages = PEN =Constantan Close to the DAQ K =Kapton NEW Heater Linear DC/DC 48 V Pulser Supply, 9 V, 48 V to 12/6 V AC/DC 5 V Calibration Pulse Gen. Power supply system Glue Logic from DAQ to ALL blocks GS, 19 April DAQ

6 The pending items Detector Very front-end (on the fridge) Antialiasing Pre SS x12 KAPTON boards: CUORE-0 K results; Bias and load resistors X6 Glue Logic DAQ MainBoard: Glue. Logic Debugging Backplane finished, layout Available for production. Main board Bessel Filter Backplane = PEN =Constantan Linear Voltage Supply: Close to the DAQ Heater Design Linear final phase DC/DC 48 V Pulser Supply, 9 V, Heather Pulser: 48 V to 12/6 V AC/DC 5 V Calibration Layout Pulse starting Gen. Power supply system Glue Logic from DAQ to ALL blocks K =Kapton Small Faraday Cages GS, 19 April

7 Bessel Filter (1) (for Matteo Maino) We have modified a few channels of a prototype Bessel board with new cutoff frequencies of 15 Hz, 35 Hz, 100 Hz and 120 Hz, from the historical 8 Hz, 12 Hz, 16 Hz and 20 Hz. The reason is that 16 Hz and 20 Hz have never been used in the past and 8 Hz and 12 Hz have been shown to limit the signal bandwidth in some way. The new pair at 15 Hz and 35 Hz would fit better the signals from the detectors of CUORE, while 100 Hz and 120 Hz would allow to explore larger bandwidth in case the detectors are operated very close to the inversion point, or at larger temperatures. In addition the pair at 100 Hz and 120 Hz does not limit at all the detector signals, allowing pulse shape analysis for background rejection. GS, 19 April

8 Bessel Filter (2) (for Matteo Maino) Another important modification has been introduced. Now the filter has unitary its voltage gain (2 V/V was the previous pedestal). This modification makes the filter not influencing the value of the amplification chain, which, in this way, does depends only on the PGA setting on the front-end board. As an instance, the load curve characterization at large bias will benefit from this by doubling the available range. We have modified some channels to test this new functionalities with positive results. Transfer function between the filter output and the input for all the cutoff frequencies GS, 19 April

9 Bessel Filter (3) (for Matteo Maino) The new settings of the Bessel filters we are proposing are intended to improve and help the DAQ system of the CUORE experiment and we hope that they will be approved. The intention is to test the new set-up of the filter with CUORE-0. First with a few channels and then, if validated, with the rest of the detector channels. A board with twelve channels with new cutoff frequencies is ready and can be used in CUORE-0 at any time. Additional boards will be ready soon, from USC. Ready for production at USC, also for components procurements GS, 19 April

10 Main-Board for preamplifier (1) 8 layers; 233 x 280 mm 2, 6 x preamplifier + PGA; 6 x load resistors and detector biasing 2 x 24 bit ADC 1x 32 bit ARM -controller GS, 19 April

11 Main-Board for preamplifier (2) TOP 6x Detector biasing Supply off/on Detector off/on Load resistor selection (5+5 G, G ) Biasing setting (8 bit) +/- 30 V range, 60 V in total. Biasing offset correction Polarity inversion GS, 19 April 2013 of bias 11

12 Main-Board for preamplifier (3) TOP Supply off/on Gain selection (20 V/V, 211 V/V) Offset at specified target Thermal drift compensation Temperature monitoring One of the 6 preamplifiers Preamplifier GS, 19 April

13 Main-Board for preamplifier (4) BOTTOM Supply off/on Gain selectable (9 bit) from 20 V/V to V/V. One of the 6 PGA PGA GS, 19 April

14 Main-Board for preamplifier (5) From the preamplifier - + x1, x2, x10: settable + - D Gain range: V/V Example of gain characterization of 1 channel. V 1 D OUT 2Vin 2, D 1,.., 2 Expected slope: Measured slope: Error: 0.88% GS, 19 April

15 Main-Board for preamplifier (6) TOP Power down on/off 24 bit Sigma Delta Monitoring of internal nodes Preamplifier PGA readout Load curve capability on board 24 bit ADC GS, 19 April

16 Main-Board for preamplifier (7) Load curve emulation with 4.4 M simulated therimistor Characterization with a 6½ digit multimeter (22.5 bits) Expected Slope: 4.4 M 60 G 73.3 Measured with multimeter: 69 Preamplifier characterization (24 bits ADC) Measured with multimeter: 71 Thanks to Valentina Novati GS, 19 April

17 Main-Board for preamplifier (8) TOP ARM 32 bit Power down on/off CAN bus connected to DAQ -controller and glue logic GS, 19 April

18 Faraday Cage (For Claudio Gotti) The design is starting: some measurements of the magnetic field around pumps has been taken. The important news is that Sergio Zimmermann from LBL joined the project. GS, 19 April

19 (For Xiaohua) GS, 19 April

20 (For Xiaohua) GS, 19 April

21 (For Xiaohua) GS, 19 April

22 Schedule (1) Bessel Filter: It was pending the final population of the boards, waiting for the frequency tuning from CUORE-0. Due to the delay me based the evaluation on the CCVR experience in hall C the last December. Re-scheduling: GS, 19 April

23 Schedule (2) MAINBOARD: The prototype to production was given a too short period (only 2 months for production, population and debugging). A more appropriate time is 7 months which means 1/13. Rescheduling: GS, 19 April

24 Schedule (3) DC/DC converter: It is with USC with proper time. It is waiting only for a few tuning parameters, but is not critical (take care: this item cannot be tested at UCLA unless they procure instrumentation). Re-scheduling: GS, 19 April

25 Schedule (4) Linear power supply Design almost completed (not critical, we need 30 power supplies boards) (take care: this item cannot be tested at UCLA unless they procure instrumentation). Re-scheduling: GS, 19 April

26 Schedule (5) Pulser: Layout phase (not critical, we need less than 10 Pulsers systems). Re-scheduling: GS, 19 April

27 Schedule (6) Glue boards: Layout pending (not critical, we need less than 10 boards). Re-scheduling: GS, 19 April

28 Items list and status (1) 1. PEN very low background link at 10 mk (for CAW): final production is ending; 2. Detector Link from the fridge to the preamplifier inputs: cables and connectors selected and procured at USC, used and under test with CUORE0; 3. Front-end Backplane, production ended; 4. Main board for preamplifier: prototyped and debugged, preproduction/production starting; 5. Preamplifiers: production ended; 6. Detector biasing: design done; 7. Load resistors: production ended; 8. Cabling from front-end to Bessel filters, pending; 9. Backplane for Bessel filter: done; 10. Bessel filter: production ended, in population; 11. Faraday cage for Bessel filter, at Gran Sasso; GS, 19 April

29 Items list and status (2) 13. Cabling from Bessel filter to DAQ, pending; 14. Pre regulation of the power supply (DC/DC): in final production phase; 15. Linear Power Supply, design ending; 16. Calibrating Pulse generator: layout under development; 17. Firmware for glue logic: done; 18. Glue Logic: design ended. 19. Crates for Electronics Housing. GS, 19 April

30 Spare GS, 19 April

31 Additional tasks 1. PEN ribbon design and production; 2. KAPTON boards design and production; 3. Characterization system of the PEN ribbons against short circuits, open circuit, etc; 4. Characterization system of the isolation of the tracks of the PEN ribbon; 5. Characterization system for isolation of the wires of the 10 mk to 300 K textured twisted wires. GS, 19 April

32 Photos from USC (1) GS, 19 April

33 Photos from USC (2) GS, 19 April

34 Photos from USC (3) GS, 19 April

35 Photos from USC (4) GS, 19 April

36 Photos from USC (5) GS, 19 April

37 Photos from USC (6) GS, 19 April

38 Photos from USC (7) GS, 19 April

THE ELECTRONICS for CUORE

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