M&S-based Triple Redundant FLCC Rapid Prototype Development

Transcription

1 M&S-based Triple Redundant FLCC Rapid Prototype Development Jong-Min Ahn, Sr. researcher; *Dae-Beom Seung, principal eng.; Jong-Kwang Kwon, Sr. researcher; Dr. Joon-Soo Ko, project manager Test Bed Aircraft System Research Lab, ADD ; * Avionics R&D Center, LIG Nex1 Inc. ajmkja@add.re.kr Abstract. Flight control computer (FLCC) development is very complex process and requires integration of various kinds of technologies. The model-based design concept is widely used in the control law design and software development of FLCC to save the project cost and development time. In this research, modeling and simulation based triple redundant FLCC hardware rapid prototype was developed. It is operated on the VR machine and its main functions are assembly/disassembly function of the FLCC box, signal flow visualization function and interconnection function between circuit drawing and its relevant control/ logic/functional block diagram. The FLCC hardware model was constructed using the open flight format 3-D modeling data and the user can assemble or disassemble the FLCC hardware model up to shop replaceable unit (SRU) level. By using this function, the user can easily understand the configuration, part information and assembly information of FLCC. Signal visualization function is useful to input/output design and signal sensitivity analysis. The user can check the input/output signal list of the FLCC and the internal signal flow on the circuit diagram with the relevant physical/electrical characteristics of the each signal. Interconnection function is useful to circuit design review and functional analysis. It allows the user can simulate the FLCC main functions such as actuator control and fault monitor in the logical level and the electrical level at the same time. The advantage of FLCC hardware RP is that the main functions of the FLCC can be checked by simulation at the design stage and it can help the relevant stakeholders perform design review and function analysis efficiently. 1. INTRODUCTION Saving the project cost and development time is the main issue for current weapon system development. UML(Unified Modeling Language) standard and its relevant case tools and model based design technique are widely used in the software development and control law design because the ambiguity of literal requirement can be eliminated and source code can be automatically generated from the design information by using those tools. Flight control computer (FLCC) is classified as flight safety critical item and so, it requires thorough test and verification process until the flight. But, unfortunately, its architectural and functional complexity inevitably induces numerous design errors and manufacturing errors. Naturally, engineers should spend much time in trouble shooting, solution developing and evaluating the solution [1]. To solve the problem of the existing development process, hardware engineer, software engineer and system engineer should share the same design concept through the entire development cycle and the each design alternatives should be checked if it meets the required function and performance before entering the manufacturing stage by the function analysis and various kinds of simulation. This research suggests the development of modeling and simulation based FLCC rapid prototype (RP) as a solution of the problem which was described above. It is useful to review the design information such as signal flow diagram, logic diagram, function block diagram, control block diagram, circuit drawing, circuit card assembly drawing, part information etc. and check the function of FLCC by simulation at the design stage. This paper consists of 6 sections. Section 1 describes the background and general purpose of the research and the following 3 sections introduce the development of triple redundant FLCC RP. Section 5 describes the future work, and it is concluded in the section REQUIREMENT AND CONCEPT DESIGN FLCC hardware has unique characteristics such as multiple channel redundant design, cross-channel data link, actuator control and fault monitor, analogue/discrete input/output etc. The FLCC RP should demonstrate such characteristics and so following requirements has been developed for the FLCC RP. 2.1 Interconnection Function Logical operations such as actuator control and fault monitor, signal voting can be implemented in analog circuit. But, it is difficult to review the circuit design

2 from the relevant control block diagram or logical diagram. Interconnection function between logic and circuit is required to review the electrical characteristics of analog circuit and its relevant logical operation at the same time by simulation. I/O signal flow visualization function is required to easily capture the signal flow path and analyze the signal change for each node along the signal path. The engineers can easily check if the current design is correspond to the design requirement or not and how the logical operation result is expressed electrically by using this function. Figure 3: Signal Flow Visualization. 3. MODELING AND DESIGN Figure 1: Concept Drawing of Interconnection 2.2 Virtual Assembly/Disassembly FLCC is complex assembly which consists of power supply card, CPU/IOP (input output processor) card, analogue/discrete input output card, actuator control servo card and mother board. Therefore, layout of component circuit cards to minimize the FLCC size and to ensure the adequate cooling is one of main design issues. Virtual assembly/disassembly function presents the external shape, layout of component circuit card assembly and relevant part information to participant engineers. They can check and review the FLCC installation information, gap size and interference problem between circuit card assembly and part information on the PC monitor or in the virtual three dimensional space. 3.1 Interconnection Function Modeling & Design Math model to analyze the electrical characteristics of analogue circuit card in the connection with related control block diagram is used in the modeling of interconnection function. Logic diagram or function block diagram is also developed and linked to the relevant circuit diagram to construct interactive simulation environment. Sensor input signal failure monitor, actuator failure monitor are included in the developed logic diagram or functional block diagram. Design purpose of interconnection function is to present the interactive analysis and simulation environment where parameter change of electrical circuit diagram is automatically applied to the relevant control block/ logical diagram and electrical characteristics analysis of analogue circuit and its logical/functional operation can be performed at the same time. Figure 2: Virtual Assembly/Disassembly. 2.3 I/O Signal Flow Visualization Each channel of FLCC has over 80 analogue input/output signals [2]. Not only failure monitoring of each signal to identify abnormal signal and isolate it but also the signal sensitivity and distortion due to the internal and external noise is the key parameter which can directly affects the performance of the FLCC. Figure 4: 1 st Order Filter Circuit Diagram

3 Figure 4 shows the 1 st order filter and its relevant electric circuit diagram. The design parameter of 1 st order filter (Ta) has relationship with electric circuit diagram design parameter as follows. Ta = (Z26 + Z48) * C39 The following figure 5 shows the proportional gain and its relevant electric circuit diagram as another example. Figure 5: Proportional Gain Circuit Diagram In the figure 5, Ka has relationship with electric circuit diagram design parameter as follows. Ka = Z13 Z54 Figure 6: Monitoring Algorithm. In the figure 6, E_th means the threshold value for the allowable error of input current and T_pl is the persistence limit time. Similarly, each element of circuit diagram can be linked to its relevant control block diagram. In this research, actuator control servo circuit diagram has been linked to actuator control block diagram in the same manner which was illustrated in the figure 4 and 5. Modeling and design of the logic diagram or function block diagram was mainly performed with MATLAB/Simulink. Following figure 6 ~ 8 show the process of modeling and design of DDV (direct drive valve) actuator force motor coil current failure management algorithm as an example. Figure 4 is the simplified sequence diagram of the coil current failure monitoring algorithm of the triple redundant FLCC [3]. The model of failure monitoring algorithm is developed with MATLAB/ Simulink. Figure 5 shows the top level Simulink model of the algorithm. Monitoring algorithm can be reviewed under the various kinds of failure condition to check if it operates as the requirement. The verified flow diagram shall be included in the FLCC RP. The Simulink simulation data can also be used as reference to evaluate the FLCC RP. Figure 7: Simulink Model In the figure 7, the left three blue boxes include the actuator control block diagram, actuator force motor coil current failure management algorithm and actuator master control valve mechanical jam failure monitor algorithm of each channel of triple redundant FLCC. The three channels of FLCC are connected to the linear direct drive valve actuator model and perform the closed loop actuator control function. The model can be simulated under the various fault condition.

4 4. FLCC RP IMPLEMENTATION The requirements and design described in the passage 2 and 3 were implemented to the FLCC RP. The one of specific features of FLCC RP is that it can be operated on the 3-D virtual space with application of stereo image technique as well as on the PC monitor. Especially, mouse driven window application and top down menu allow the operator to handle the FLCC RP easily. Figure 8: Simulation Result The figure 8 shows the simulation result of actuator force motor coil current failure. During actuator command varies as sine wave form from -30deg to 30deg, channel A coil current failure occurs at 2second and then channel B coil current failed at 3 second. But, the coil current fault monitor detects the fault signal and isolates it as indicated in the round circle of next two graphs. The following Table 1 and 2 shows the development tool and required software and hardware specification to operate the FLCC RP. Table 1: Development Tool TOOL USE MultiGen II 3-D modeling of FLCC components Vega Prime 2-D/3-D Graphic User Interface Development Flash MX Signal Flow Visualization Table 2: Required Operational Environment Environment Specification CPU Over 3.2GHz, Dual CPU HW RAM Over 1G Graphic 256 Mbyte, texture memory SW OS Windows XP Application Vega Prime The following figure 10 shows the implemented FLCC RP user interface D Modeling of Components 3-D model of FLCC components should be developed for participant engineers to review the installation design of the FLCC and internal circuit card assembly layout design information virtually. In this FLCC RP development project, the open flight format 3-D model was constructed to minimize the model file size and to make the handle of model convenient. Figure 9: FLCC 3-D Model The figure 9 shows the 3-D model of FLCC.

5 2. J. M. Ahn, et. al, (2005) Study of Interface Design of Flying Test Bed Aircraft Flight Control Computer, ADD Report, MADC , Sep. Figure 10: Features of FLCC RP From the top, main menu screen, removed FLCC, FLCC internal view and removed circuit card assembly, circuit drawing view screen, signal flow visualization screen and interconnection function screen were showed. 3. Y. S. Nam, J. M. Ahn, et. al, (2006) A Fault Monitor Design for the Driving Current of a DDV Actuation System of a FBW Aircraft, Journal of the Korean Society for Aeronautical and Space Sciences, Vol. 34, No. 4, March, pp. 81 ~ 86 Implemented RP can be utilized in various usage such as, circuit analysis, function analysis, design review, etc. And the strong point of FLCC RP is that it can also be utilized as training tool for maintenance personnel and its source material can be migrated to the IETM(interactive electronic technical manual). 5. FUTURE WORK This research has been performed to improve the development environment of the FLCC by applying modeling and simulation technology and it was focused on how to visualize and express the design characteristics efficiently in the virtual space. Although the FLCC RP has been successfully developed, its capability shall be extended to the integrated design tool through the development of circuit design function or interface function with electric circuit design and simulation tools like P-spice, and database management system which can store the library of electrical components 3-D models and version control in the future. 6. CONCLUSION In this research, the triple redundant FLCC RP was developed by which participant engineers can easily check and review the design information at the design stage. Although it is too early to provide quantitative results of the FLCC RP s effect on the entire FLCC development, it is clearly anticipated that lots of development time and cost will be saved by reducing the design review time and human errors due to the misunderstanding the requirements and design concept. The design concept and technology, which were applied in the development of FLCC RP, can also be applied to various kinds of electronic equipment. REFERENCES 1. J. K. Kwon, et. al, (2006) Development of Triple Redundancy Flight FCC Hardware, Aerospace Weapon System Development Seminar, Oct, pp