Linux PL330 Mainline Driver Usage John Linn 10/17/2014 Based on Linux kernel 3.14

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1 Linux PL330 Mainline Driver Usage John Linn 10/17/2014 Based on Linux kernel 314

2 About the PL330 Hardware The Zynq Technical Reference Manual (TRM) provides a good description of the device There are some known restrictions when using the device which are documented in section 95 of the Zynq TRM It is a complex device which uses microcode to perform the DMA transactions ARM does not license the microcode assembler to end customers There is no debug/trace capability for the microcode Memory to memory transfers which are shorter can likely be done with the CPU easier if the CPU is available See the references at the end for a complete list of documents

3 PL330 Linux Device Drivers Xilinx Linux Device Driver There was a device driver in the Xilinx kernel tree (not mainline) which provided some simple prebuilt transactions and did not plug into the Linux DMA Engine It was removed from the Xilinx tree in the past year Mainline (kernelorg) Linux Device Driver This driver is the subject of this presentation, it was written by Samsung It plugs into the Linux DMA Engine framework such that an application that is used AXI DMA can work with it easily There is a test in the kernel that can be enabled It provides basic functionality and could be useful to customers with some limitations There are several threads on the Xilinx Embedded Linux forum where others have done the work described in this document (and further)

4 Mainline PL330 Device Driver Details The driver generates microcode for memory to memory, memory to peripheral, and peripheral to memory on the fly The microcode for the peripheral transfers expect the peripherals to use peripheral handshaking with the CPU It will not work without that handshaking as it locks up waiting for it The driver uses a burst length of 1 for peripheral transfers which is not efficient The driver assumes a FIFO as a peripheral as keyhole addressing is used in the microcode (no address increments) The driver microcode for memory to memory does address incrementing

5 Linux Kernel Configuration This kernel configuration builds the PL330 driver and the test into the kernel They also work as kernel modules There should be messages about the PL330 during kernel boot showing the driver (not the test) is up and running

6 In Kernel Test In the kernel drivers directory, drivers/dma, there is a test source file, dmatestc, that can be built in the kernel It does memory copies for a basic test, but is useful for a sanity check Starting the test from user space (assuming built into the kernel) echo 1 > /sys/module/dmatest/parameters/run There are other parameters that can be changed easily timeout, channel, iterations, verbose The test runs on all 8 channels by default The test prints out the results so it s obvious to the user The interrupts are shown in /proc/interrupts Note that the 1 st DMA interrupt (45) is for abort and will not be changing normally Note this test cannot be in the kernel when using the test described later, pl330testc, in this document

7 Patching the PL330 Device Driver The driver is located in drivers/dma directory of the Linux kernel A patch file, pl330cpatch, is provided with a PL330 test kernel module Patch the driver to not do peripheral handshaking in the microcode used for peripheral transfers A two line change in _bursts() Change the microcode which is generated Change the _ldst_devtomem() and _ldst_memtodev() function calls to be _ldst_memtomem() Patch the driver to allow the burst length to be specified by the user A one line change in pl330_prep_slave_sg() It is fixed at a burst length of 1 Change the following line: from: desc->rqcfgbrst_len = 1; to: desc->rqcfgbrst_len = pch->burst_len;

8 Test System Hardware Details An AXI FIFO was connected to the GP0 master port of the PS to allow the PL330 to read and write to the FIFO The FIFO does not support peripheral handshaking and there is no Xilinx IP that does This system does have limitations as the FIFO is only 16 Kbytes Long transfers (> 16KB) cannot verify the data read from the FIFO matches data written to the FIFO Two channels of the PL330 are used in the software system to simulate a typical customer application The transmit channel writes into the FIFO The receive channel reads from the FIFO

9 Test System Software Details A kernel driver, pl330testc, was implemented to use the PL330 kernel driver thru the Linux DMA Engine framework This driver is intended for testing and prototyping It is also intended to allow customers to determine if the PL330 is a solution for their project Long transfers are only enabled in the test system to allow some performance data to be observed The software supports the following functionality which can be controlled via module parameters: DMA transfer length full duplex operation (transmit and receive simultaneously) burst length There a number of restrictions in how the software works due to the limitations of the hardware system (documented in the code)

10 PL330 Device Tree Bindings The following device tree snippet is from the Petalinux generated device tree for the PS from the test system ps7_dma_s: { #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <4>; arm,primecell-periphid = <0x >; clock-names = "apb_pclk"; clocks = <&clkc 27>; compatible = "arm,primecell", "arm,pl330"; interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7"; interrupt-parent = <&ps7_scugic_0>; interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>; reg = <0xf x1000>; } ;

11 ILA AXI Capture (Read) The following screen capture shows the receive transfer performing reads with a burst length of 1 The following screen capture shows the receive transfer performing reads with a burst length of 16 (with the driver patched)

12 ILA AXI Capture (Write) The following screen capture shows the transmit transfer performing writes with a burst length of 1 The following screen capture shows the receive transfer performing writes with a burst length of 16 (with the driver patched)

13 Conclusions The PL330 Linux device driver in the mainline kernel (and the Xilinx kernel tree) is functional The driver and generated microcode are not optimized for high performance Small changes such as the burst length can increase the performance Larger changes are more complex and not recommended by Xilinx Execution times are displayed for DMA transfers by the pl330testc driver These times were not intended for completeness with respect to benchmarking These times can show larger variances that have not been investigated

14 References Zynq TRM, Chapter 9 ARM TRM for DMA-330 ARM AN239 - Example programs for the CoreLink DMA Controller DMA-330 ARM AN228 Implementing DMA on ARM SMP Systems er_guides/ug585-zynq-7000-trmpdf CoreLink DMA Controller DMA-330 Technical Reference Manual ARM AppNote 239: Example programs omarmdocdai0228a/indexhtml