A new fourth generation of hybrid computer systems

Transcription

1 A new fourth generation of hybrid computer systems by ROBERT M. HOWE The University of Michigan Ann Arbor, Michigan and ALDRIC SAUCIER Hqtrs. US Army Materiel Command Alexandria, Virginia INTRODUCTION It has long been recognized that hybrid computer systems are more cost effective than digital computers in solving many types of dynamic problems. This indeed has been the reason for the sizable number of hybrid computer systems currently in operation. The one to two order of magnitude speed advantage which hybrid computers enjoy over digital computers in solving differential equations is due to the speed of the analog subsystem. This high speed results from the high bandwidth (up to 1 megahertz) of the analog components and the parallel configuration of the analog mechanization. Despite this speed advantage, hybrid computers have not enjoyed anywhere near the widespread use which one might have predicted. There are several reasons for the relatively lower popularity of the hybrid computer vis-avis the digital computer. These include the greater difficulty in programming hybrid computers, their limited accessibility to multiple users, expensive and limited problem-storage capability because of the analog patchboards, and relatively slower problem changeover characteristics. Recently the U.S. Army Materiel Command sponsored a study program by several of the hybrid computer manufacturers to determine the characteristics of a next-generation hybrid computer system which will overcome the existing disadvantages of hybrid computation as listed above. The resulting AHCS (Advanced Hybrid Computer System) achieves this by replacing the analog patchboards by a digitally-controlled solidstate switch matrix and by use of a higher-level simulation language compiler which assigns analog components to problem variables and parameters. The switch matrix allows complete digital storage of hybrid problems and problem turnaround in milliseconds. This in turn makes hybrid computer sharing through remote terminals a practical reality. The CSSL-type input language makes the programming as simple as digital programming using an identical language and permits implementation of automatic scaling of the analog subsystem. In this paper we summarize the results of the study by one of the contractors of the Army Materiel Command, namely the Applied Dynamics Computer Division of the Reliance Electric Company. Prior to the study there has been considerable experience with a prototype electronically-patched hybrid computer system which has been operating for three years in the University of Michigan Simulation Center.! This computer consists of an Applied Dynamics AD Four analog subsystem interfaced to a Digital Equipment PDP 9 digital subsystem, as shown in Figure 1. This system, which includes a matrix of 768 switches for interconnecting 8 analog integrators, 6 multipliers, and 32 coefficient devices, allows analog circuits for solving differential equations to be electronically patched and completely set up in less than 20 milliseconds under PDP 9 control. Five remote graphics terminals are used to "time-share" the system. Each terminal user is able to request the solution of any analog problem stored in the digital computer. Problem parameters are entered interactively from the terminal, and high-speed solutions are displayed on a storage-type CRT as shown in Figure 2. Since problem setup takes only 20 milliseconds and typical problem run times are under 100 milliseconds, eac4 terminal ties up the hybrid computer for such a short time that the mean response time from solution request to solution display at a given terminal is a fraction of a second. A simulation-language compiler has also been developed for the system. 2 From CSSL-type input statements the compiler selects analog components and generates the switch code necessary to patch the problem. This time-shared or, perhaps more properly, time-sliced auto-patch system with terminals at the University of Michigan (Applied Dynamics has installed three similar systems in the United States and Europe) provided useful background for the US Army Materiel Command (AMC) Advanced Hybrid Computer System (hereafter called the AHCS). Let us now turn to the results of the study. 861

2 862 National Computer Conference, 1975 Figure l-hybrid computer system at the University of Michigan Simulation Center OVERALL ARCS CONFIGURATION Figure 3 shows a block diagram of one proposed version of the ARCS. At the bottom of the diagram is the modular analog computer with electronic patching which will be described in subsequent sections. Across the top of the figure are the user terminals for remote access. These can either be standard digital terminals with graphics capability (either storage or refresh CRT's) or can be specially-designed terminals for the ARCS. The user terminals, as well as the maintenance terminal and a large digital computer, are all tied to the ARCS through the communications controller. Note that the user terminals can receive analog signals from the ARCS (dashed lines in Figure 3) although it is our feeling that digital communication, even for solution displays at the user terminals, will in general be preferred. Even at telephone-line communication rates it will only take about a second for a typical solution display to be generated. Since the ARCS will compute solutions much faster than this, it is necessary to convert these solutions to digital form, store them temporarily, and transmit them through the communications controller to the user terminals for display. This is the purpose of the two analog to digital converter (ADC) systems, micro-computers, and associated mass storage devices shown in Figure 3. Also shown in the figure are two medium-sized digital computers connected through interfaces to the analog computer and to the communication controller. These two digital computers share common peripheral devices (disk, line printer, tape drives, etc.) and are used to compile, allocate, schedule, and perform other tasks connected with set-up, check-out, and problem runs on the AHCS system. They are also used for performing digital computations associated with actual problems, such as digital function generation, equation integration, etc. Provision of two such digital computers as well as two micro-computers for solution storage and display adds redundancy and hence increases ARCS reliability. The large digital computer shown in Figure 3 can also be used for compiling. Let us now turn to a description of the most unique subsystem in the ARCS, namely the electronically patched modular analog computer. TRE SWITCR MATRIX A real key to the ARCS is a low-cost, high-reliability switch matrix to replace the analog patchboard. The 768- switch matrix used in the prototype autopatch system currently in operation is implemented using discrete Field Ef- BLOCK DIAGRAM OF PROPOSED AHCSSYSTEM _ OIGITALCOMMUNICATION --- ANALOG COMMUNICATION Figure 2-Autopatch terminal system Figure 3

3 A New Fourth Generation of Hybrid Computer Systems 863 fect Transistors (FET) switches and driving-circuit components, although integrated circuit registers are employed for storing the switch-closure information for a given patch configuration. In the AHCS it is proposed to use Complementary Metal Oxide Semiconductor (CMOS) LSI circuitry for the analog switches and the switch-setting registers. It appears that it will be feasible to mount a 16 X 8 voltage-switch matrix plus associated digital registers on a single chip. The effect of finite switch "on" resistance (approximately 500 ohms) will be eliminated by terminating each of the 8 matrix outputs with voltagefollowing amplifiers. The 16 matrix inputs come from lowimpedance operational amplifier outputs. Leakage current from "off' switches as well as capacitive coupling across "off' switches will cause negligible cross talk because of the low-impedance voltage sources driving the switch inputs. Normal range of the input and output voltages for the switch matrix will be + 10 volts. It is estimated that using such a specially-developed 16 X 8 LSI switch chip it would be practical to mount up to 5000 switches on a single printed-circuit card. MODULAR ORGANIZATION OF THE ANALOG SUBSYSTEM Every study of automatic patching in recent years has recognized the necessity of organizing the parallel processor into modules in order to reduce the number of switches required to allow interconnection of components. In defining the modular breakdown and the switch matrix within and between modules, one must take into account the types of problems which will be solved, the component and switch hardware cost and performance requirements, and the complexity of software needed for the compiler which converts the simulation language source program into component assignments and a scaled circuit. Because of the experience with the prototype autopatch AD-Four hybrid system at The University of Michigan Simulation Center, we feel that we have been able to perform the various tradeoffs needed to come up with the reasonable hardware-software compromise for configpration of a practical autopatch system. The system utilizes five general categories of modules, as illustrated in Table 1. The largest number of modules in a typical installation fall into the amplifier-module category. As can be seen in the figure each amplifier module contains 8 summer-integrator amplifiers, 32 MDAC's (multiplying digital-to-analog converters), 8 multipliers, and 2 hard limiters. The function-generator module contains 16 two-variable digitally-set analog diode function generators. The resolver module contains 4 resolvers, each capable of either forward or inverse resolution. The logic module includes 16 comparators along with 16 parallellogic microprocessors. The miscellaneous module is simply that, a module type which contains components such as fixed function generators (e.g., log dfg's), time-delay elements, special programmable nonlinear functions, etc. All of the modules can be interconnected with the autopatch TABLE I-Modular Categories for the AHCS Type of Module Amplifier Function Generator Resolver Logic Miscellaneous Module Contents 8 Summer-Integrators 32 MDAC's 12 RDAC's 8 Multipliers 2 Hard Limiters 16 Two Variable 16X8 DFG's 4 Resolvers 16 Comparators 16 Parallel-Logic Microprocessors Counters Shift Registers Flip Flops One-Shots Log DFG's Time-Delays Programmable Nonlinear Functions switch matrix used for both analog and logic signals, as will be described. Also, the modules can be connected to the digital computer or computers in the AHCS, as well as to external analog and digital trunks. References 9 and 10 give a more detailed description of each of these modules. TYPICAL ANALOG EQUIPMENT COMPLEMENT Since the analog subsystem of the AHCS involves parallel mechanization, it is clear that there must be enough analog and parallel logic components to solve the largest problem envisioned for the computer. A typical system might have 40 modules total, consisting of 24 amplifier modules, 5 resolver modules, 5 function generator modules, 2 miscellaneous modules, and 4 logic modules. Such a system would include the following impressive component count: 192 summer integrators 192 multipliers 768 MDAC's 288 RDAC's 48 hard limiters 20 resolvers (80 additional multipliers plus 20.sinecosine generators) 80 two-variable function generators 64 comparators 64 parallel-logic microprocessors (logic function generators) bit up counters 16 sequencer I timer I counter units The total number of switches needed to implement the automatic patching of the above system is over 100,000. Although this sounds like a prohibitively large switch count, the actual number of discrete components, using LSI technology (see The Switch Matrix Section), would be approximately the same as the number of components

4 864 National Computer Conference, 1975 used in the 768-switch matrix currently employed in the AD-Four autopatch system. The existing system has proved to be quite reliable in operation over the past three years in The University of Michigan Simulation Center. A typical large aerospace dynamics problem, the simulation in six degrees-of-freedom of an aircraft, has been used along with other example problems to determine the adequacy of the proposed switch matrix and compiler algorithm. For the aircraft simulation problem, which required 8 functions of three variables, 7 functions of two variables, and 4 functions of one variable along with 7 resolutions, the following modules were needed: 5 amplifier modules, 3 function generator modules, 2 resolver modules. A SPEED COMPARISON WITH ALL-DIGITAL COMPUTATION In order to provide a quantitative comparison between the speed capability of the AHCS and conventional serial digital computers, the number of digital operations (additions, multiplications, divisions, equivalences, etc.) corresponding to the various analog module operations were estimated. 3 In this comparison it was assumed that a fourth-order Runge-Kutta integration formula was used for the digital mechanization, so that each problem function needed to be evaluated four times per integration step. It was concluded on this basis that 992 digital operations per integrator step are needed to match the capability of an amplifier module, 800 per step to match the resolver module, and 1984 per step to match the function generator module. To match the performance of the amplifier, resolver, and function generator modules in the Typical Analog Equipment Complement Section would require digital operations per integration step. If we further assume that approximately 20 integration steps per cycle of the highest problem frequency are needed for reasonable accuracy4 and the highest problem frequency which the AHCS can handle with reasonable accuracy is 1 Khz, then (20) (1000)=754,560,000 digital operations per second are needed to match the AHCS speed capability. This is some three orders of magnitude faster than all but the most powerful existing digital machines. Of course, the above comparison is not quite fair since it assumes that all the components within each AHCS Module are used, which in general they are not. To get a more reasonable comparison, we estimated the number of digital operations per integrator step for the six-degree-offreedom aircraft simulation described at the end of the Typical Analog Equipment Complement Section, and found the number to be This compares with operations per step based on use of all components in the 5 amplifier, 2 resolver, and 3 function generator modules needed for AHCS mechanization of the same problem. Thus to match a 1 khz AHCS problem frequency capability in simulating six-degree-of-freedom aircraft equations would require 5456 (20) (1000) = 109, 120,000 digital operations per second. Again, however, this is two to three orders of magnitude faster than existing serial digital machines. OTHER SYSTEM FEATURES In this paper we have concentrated on a description of the analog subsystem modules, electronic switch matrix, and computing speed capability of the AHCS. These result in the performance capabilities which give the system two to three orders of magnitude potential cost advantage over conventional digital systems in solving dynamic problems. However, to realize these savings the AHCS must overcome the other traditional. disadvantages of analog and hybrid computation. In this section we discuss briefly how this will be done. Operation through remote terminals In order to improve computer accessibility and utilization the AHCS will be operated through remote terminals on a time-sliced basis. As described in the Switch Matrix Section, digital data transmission between the central AHCS computer and the terminals will in general be used, thus allowing terminal tie-in through standard telephone lines over unlimited distances. Program input and editing will be accomplished at the terminal as well as graphical display of solutions. Because of the anticipated short response time (one second or less in many cases), AHCS operation through the terminals will be extremely interactive. Some terminals may have local computation capability for off-line source program preparation and editing. Hard-copy capability in various forms (CRT display copy, x-y plotter, multiple-channel oscillograph) will also be available at the terminals. Simulation language input As stated earlier in the paper, the basic source program language for the AHCS will be a CSSL-type simulation language. Not only is such a language extremely easy to learn, but, very importantly, it can be used as a common language for both the AHCS and an all-digital check solution. This has already been accomplished for handpatched hybrid systems. 5,6 Having a digital check solution not only is useful as a check on the AHCS solution but is also needed to provide maximum variable ranges to establish scaling information for the AHCS compiler. An alternate method for automatic scaling involves an interactive scheme which stops the analog solution and rescales the appropriate variable following a variable overrange. It is proposed that other input languages (block diagrams, transfer function, etc.) would be overlays on the standard CSSL AHCS language. Conventional hybrid computation (combined use of analog and digital systems

5 A New Fourth Generation of Rybrid Computer Systems 865 while computing a solution) would also be a compiler mode of operation. As indicated earlier, however, the ARCS is designed to maximize the all-analog mechanization capability in order to exploit system computing speed to the utmost. PROPOSED ARMY MATERIEL COMMAND COMPUTER NETWORK Dynamic relocation of modules As discussed in the Speed Comparison With All-Digital Computation Section, it is clear that the analog subsystem must be large enough to handle the biggest problem required to be solved on the ARCS. Obviously, many problems will be much smaller than this. For this reason the ARCS should have the capability of solving more than one problem at a time by simultaneously allocating different modules to different problems. The proposed switch and component numbering code makes this extremely easy to do without any requirement for recompiling when shifting a given problem over to different modules. Thus the ARCS will not only time-share in series but also in parallel. Continuous preventative maintenance One of the advantages of an electronically patched hybrid computer is the ease with which a diagnostic program can be implemented to check the proper functioning of all the analog components and switches, and the speed with which such a program can be executed. This has already been done successfully for the AD-Four autopatch system and will be an integral part of the ARCS. In fact, with the dynamic relocation of modules described in the previous paragraph it is completely feasible to run diagnostic checks on any modules while other modules are used for solving problems. On a continual basis each module can be taken successively out of the ARCS inventory and exercised with a complete diagnostic check, say every several minutes. Fault readout and interpretation can be accomplished through a standard terminal located at the ARCS site and assigned to maintenance operations. The built-in redundancy which such a scheme implies should provide the ARCS with a very high overall reliability. CONCLUSIONS In this paper we have described a proposed fourth generation Advanced Rybrid Computer System (ARCS) with electronic patching and computing speed capability two to three orders of magnitude faster than conventional digital computers in solving dynamic problems. This computational speed plus fast problem turnaround (a fraction of a second) makes practical a sequential sharing of the ARCS through remote terminals. Also, dynamic relocation of analog subsystem modules makes parallel sharing possible, as well as. continual ru.~intenance checking. A WRIGHT -PATTERSON AIR FORCE BASE Figure 4 PICATINNY ARSENAL CSSL-type input language along with automatic scaling capability allows users with no computer programming I expertise to learn very quickly the use of the system. Full graphics capability at the terminals along with quick computer access and short solution times will allow a highdegree of man-machine interaction in problem solving. It is estimated that cost of such a system will be comparable to existing hybrid computer systems with the same component complement. This is because of the utilization of CMOS LSI circuits and other IC technology in the ARCS. Since the proposed system overcomes the disadvantages of the present hybrid computers (difficult programming, manual scaling, poor turnaround time, etc.) it is felt that the ARCS, shared through remote terminals, will represent a major breakthrough in cost-effectiveness for solving dynamic problems. - Figure 4 shows a proposed Army Materiel Command computer network using both pure-digital and also hybrid computer systems in the time frame. Such a network has the following operational advantages: (1) access to large-scale digital and hybrid computers by users who do not have on-site machines; (2) access to specialized programs or technology available at particular computing centers; (3) load-leveling among computer centers; (4) decreased computing costs; (5) increased computing power. The network also has the following managerial advantages: (1) greater ease and precision in identifying total computing workload requirements; (2) larger and more stable base from which to make workload projections; (3) ability to add capability to the network as a whole rather than at each individual installation; (4) computer power can be added in increments which more closely match requirement; (5) responsiveness to "political" pressure to utilize fully the available resources by sharing computers. In summary, the distribution of computing power of a large scientific and engineering computer network, including both pure-digital and hybrid computers, will provide both parallel and serial compabilities completely programmable from remote terminals. This in turn provides the

6 866 National Computer Conference, 1975 user with increased computer power and speed, and at less cost. REFERENCES 1. Howe, R. M., R. A. Moran, and T. D. Berge, "Time Sharing of Hybrid Computers Using Electronic Patching," 1970 Fall Joint Computer Cont, AFIPS Conf. Proc., Vol. 37, AFIPS Press, Montvale, N.J. 1970, pp See also Simulation, Vol. 15, pp , Sept Howe, R. M. and R. B. Hollstein, "Time-Shared Hybrid Computers: A New Concept in Computer-Aided Design," Proc. IEEE, Vol. 50, No.1, pp , Jan., A Performance Comparison of All Digital Computation and the Advanced Hybrid Computer System, Internal ~eport, Applied Dynamics Div., Reliance Electric Co., Ann Arbor, Michigan, May Gilbert, E. G., "Dynamic Error Analysis of Digital and Combined Analog-Digital Computer Systems," Simulation, Vol. 6, No.4, pp , April Rigas, H. B. and D. J. Coombs, "Patch: Analog Computer Patching from a Digital Simulation Language," IEEE Trans. Comput., Vol. C- 20, pp , October Rook, R. E., "Actran: An Analogue/Hybrid Compiler," Proc. 6th AICA Congo (Munich, Germany, Aug. 31- Sept. 4, 1970). 7. Advanced Hybrid Computer Systems Technology Report; Project Leader, Aldric Saucier, HQTS US Army Materiel Command, June Plan for an AMC Scientific and Engineering Computer Network Chairman, Dr. Ronald P. Uhlig and David L. Grobstein, HQTS US Army Materiel Command, August Advanced Hybrid Computer Systems Final Report, Army Contract DAAG39-74-C-0076, by Applied Dynamics Computer Division, Reliance Electric Company, Ann Arbor, Michigan, May Howe, R. M., "The Next Generation of Hybrid Computer System," National Electronic Conference, October McKechnie, R. M., "Generalized Vehicle Dynamics Program for Interactive Hybrid Computer Graphics," Computer Aided Design for Engineering Cont, June 1973.