EXTREMELY LOW-POWER AI HARDWARE ENABLED BY CRYSTALLINE OXIDE SEMICONDUCTORS

Transcription

1 Semiconductor Energy Laboratory: White Paper EXTREMELY LOW-POWER AI HARDWARE ENABLED BY CRYSTALLINE OXIDE SEMICONDUCTORS Semiconductor Energy Laboratory (SEL): Extremely low-power AI chips can be built with SEL's crystalline oxide semiconductor technology. One factor enabling this is the extremely low off-state current of the FETs utilizing crystalline oxide semiconductors, which we term OSFETs. The off-state leakage current of the OSFET is extremely low. In fact, it is lower than that of silicon FETs by 15 digits. This feature allows fabrication of devices with extremely low power consumption, and also enables analog computation in hardware implementations of artificial neural networks. Thus, AI chips and systems that consume significantly less power can be constructed. September 2017

2 Introduction SEL's crystalline oxide semiconductor (c-os) technology will reduce the enormous amount of power needed for AI computations, which has been an issue facing AI. An FET utilizing a crystalline oxide semiconductor material (OSFET) is characterized by its extremely low off-state leakage current; when compared with Si FETs, the OSFET has an off-state current that is 15 digits lower. Thus, it can be said that the OSFET is a superb switch. Using this superb switch, we have developed a new kind of memory, the osmemory Logic (see FIG. 1). In this memory, the OSFET is connected to another FET and a capacitor. A charge Q can be stored in this cell when the OSFET is turned on (data write). Subsequently, OSFET can be turned off to eliminate the leakage current almost completely, so that the stored charge Q can be retained for a long time. The stored charge Q is input to the other FET's gate, and the amount of current flowing across the other FET changes according to the size of Q. This is the principle of osmemory Logic's operation. Conventional floating-gate non-volatile memory writes data by injecting a charge into the gate insulating film of a transistor. Because a large amount of energy is necessary for charge injection, the gate insulating film degrades relatively quickly, limiting the maximum number of write cycles. Conversely, the osmemory Logic can rewrite data by simply turning the OSFET on and off. Thus, the osmemory Logic can be considered an ideal memory that does not degrade in principle. An artificial neural network can perform analog computations when the osmemory Logic is applied to its hardware. This streamlines the computation process, enabling an AI solution that has drastically lower power consumption than conventional ones. In this white paper, we will introduce the basics of crystalline oxide semiconductor technology, focusing on osmemory Logic, analog arithmetic circuits constructed using the osmemory Logic, and artificial neural networks. Figure 1. Operating principles of osmemory Logic Semiconductor Energy Laboratory: White Paper Page 1

3 1. Crystalline oxide semiconductor technology The defining feature of the OSFET is its extremely hand, the band gap of IGZO, a typical c-os material, low off-state current, which is 70 ya (yoctoamperes, is approximately 3.15 ev 1). yocto- is a prefix denoting ) in 85 C. This is 15 In addition, we have found that the effective hole digits smaller than the off-state current of mass of c-os is heavier than that of Si (see Table. 1). Therefore, the holes in c-os do not contribute to conventional silicon transistors. electric conduction and current induced by inversion Such performance is realized by the wide band gap does not flow across the transistor. These traits of common to the crystalline oxide semiconductor c-os materials contribute to the extremely low (c-os) material, and also as thermal excitation of the off-state current of the OSFET (see FIG. 2). electron-hole pair does not occur when the transistor is off. Si has a band gap of 1.12 ev 2). On the other Table 1. Effective mass of holes and electrons IGZO 1) Si 2) Hole effective mass m h */m e (heavy) 0.16 (light) Electron effective mass m e */m e (longitudinal) 0.19 (transverse) (A) I d -V g characteristics of Si and OSFET (B) I off of Si and OSFETs Figure 2. Off-state current (I off ) comparison between Si and OSFETs Currently, SEL is developing VLSI technology using crystalline oxide semiconductor technology (termed OSLSI) with UMC 3), a partner with whom we have a joint development agreement (JDA). We are developing OSLSI for mass production, to introduce extremely low power (XLP) devices to the market. OSLSI can be fabricated using a 3D hybrid process in which OSFETs are stacked on top of Si FETs fabricated Semiconductor Energy Laboratory: White Paper Page 2

4 with existing technology platforms. When we fabricate OSFETs with this process, we can build an IC that consumes extremely low amount of power, thanks to extremely low off-state current of the OSFET. We have prototyped a 60 nm node OSLSI chip that can efficiently shut off the power supply utilizing the features of the OSFET, achieving an exceptionally low power consumption. Currently our chips' power consumption figures are lower than those of conventional chips by one order of magnitude. Our target is to make the difference even larger, into three orders of magnitude. Sample chips of this technology are planned to be shipped out from the end of 2017 to OSLSI not only meets the demands of digital operation in this IoT and big data age, but also the needs of extremely low power consumption of analog operation and analog/digital mixed signal operation. It can be applied to a variety of devices such as MCU, FPGA, embedded memory, etc. One example of such an application is a DRAM-type device called DOSRAM. Conventional DRAM needs to be refreshed in regular periods on the order of milliseconds. However, DOSRAM utilizes the OSFET to make the refresh intervals longer so that the device only needs to be refreshed once every hour, or a few times in one year. Another example is a normally-off CPU (see FIG. 3). The normally-off CPU can shut down the power supply when the CPU does not need to operate. Using these techniques for low power consumption, we have successfully built IC chips with remarkably low power consumption. Figure 3. Power consumption 4) 1) Murakami et al., Proc.AM-FPD 12 Dig., 171, ) S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd edn. New York: John Wiley, ) UMC is a leading global semiconductor foundry headquartered in Hsinchu, Taiwan. Source: (UMC is currently world's No. 2 foundry.) 4) T. Onuki et al., Symp. VLSI Circuits, pp , Semiconductor Energy Laboratory: White Paper Page 3

5 Oxide semiconductor memory (osmemory Logic) A memory device usually stores binary data, that is, and data read are performed with different terminals. either 0 or 1. In contrast, the osmemory Logic uses This distinguishes the multi-level osmemory Logic OSFET with its extremely low off-state current, and from MRAM (Magnetoresistive Random Access thus is able to store levels more than just 0 or 1 in Memory) and FRAM (Ferroelectric Random Access one memory device.. Memory) devices, which are two-terminal devices. The osmemory Logic can store 6-bit (64 levels) Four-terminal devices are more suited for storing data (See FIG. 4). multiple levels of data, as data stored in two-terminal Another feature of multi-level osmemory Logic is devices (they have shared write/read terminals) that it is a four-terminal device in which data write change their value during data read. Figure 4. osmemory Logic and its performance Semiconductor Energy Laboratory: White Paper Page 4

6 2. AI (Artificial Intelligence) with c-os technology Using osmemory Logic, we can construct AI and memory precision. solutions that consume little power. As described above, the osmemory Logic Currently, artificial neural networks modeled after developed by SEL is characterized by its high the human brain are widely used in AI development precision of 6 bits (64 levels) or higher. Thus, the (see FIG. 5A). In an artificial neural network, OSLSI with this memory can perform analog multiply-accumulate operation is performed using multiply-accumulate operations in artificial neural weight coefficients (connection coefficients, networks. When OSLSI is used in arithmetic multipliers) and input data (multiplicands). In this operations for artificial neural networks, there are process, massively parallel computations are two advantages: the first is that the circuit can be required. made much smaller than digital circuits, and the It is well known that GPU handles second is that OSLSI can process massively parallel multiply-accumulate operations of neural nets well. arithmetic operations more easily than digital However, if this kind of operation is to be performed circuits. with digital circuits such as those in conventional OSLSI takes a structure in which is formed by GPU, a circuit of an enormous scale will be necessary. stacking OSFET layers on top of Si LSI. This is termed Furthermore, the results of the calculations will need OS-Si hybrid structure, and this structure greatly to be stored in a memory outside of the arithmetic reduces energy losses during data transfers, as the circuit, and accessing the memory will limit the arithmetic circuit and the osmemory Logic can be processing speed of this circuit. placed in locations that are extremely close to each Since long ago, there were expectations that other (see FIG. 5B). This configuration is called analog processing will result in a more efficient AI "on-site memory". solution. However, up until now, we do not have an Utilizing these technologies, we can achieve low ideal memory that satisfies the demands in cell size power, smaller circuitry, and a power-efficient AI. Semiconductor Energy Laboratory: White Paper Page 5

7 Figure 5. Arithmetic processing in an artificial neural network and an analog arithmetic processing circuit Multiply-accumulate circuits This section will describe multiply-accumulate circuits constructed with osmemory Logic (see FIG. 6). Using this multiply-accumulate circuit, we can have a memory that has unlimited endurance (learning becomes simple), consumes less power and area, and performs arithmetic operations in a more parallel manner. The current that flows across the osmemory Logic corresponds to the product of the weight coefficient W and the input voltage X (W X). In addition, the current I which is the sum of current from each osmemory Logic cell corresponds to a sum of products (I I 0 I 1 W 0 X 0 W 1 X 1 ). Furthermore, the current Iout which is the result of subtracting noise etc. (Inoise) from the current I corresponds to the difference (Iout I Inoise). We can increase the operation accuracy by using the difference (Iout) in addition to the sum of products (I). For example, the right formula can be expressed with multiply-accumulate and difference operation circuits in FIG. 6. I I 0 I 1 W 0 X 0 W 1 X 1 Iout I Inoise In addition, this multiply-accumulate circuit employs the OS-Si hybrid structure, in which digital and analog circuits can be formed in the same process step. This makes the multiply-accumulators efficient in terms of area and power, enabling an embedded AI chip with various circuits and artificial neural networks. Semiconductor Energy Laboratory: White Paper Page 6

8 Figure 6. Multiply-accumulate and difference operation circuits Summary This white paper described the basic information on crystalline oxide semiconductor technology and AI configurations that it enables. Another SEL white paper, "AI Application Based on Crystalline Oxide Semiconductor Technology", will describe the performance of AI chips with the configurations described here, and the application examples of these chips. We hope you will take a look at them as well. Semiconductor Energy Laboratory: White Paper Page 7