Pb-free Update For the PSMC

Size: px

Start display at page:

Download "Pb-free Update For the PSMC"

Aron Boyd
6 years ago
Views:

1 Pb-free Update For the PSMC 31 October 2017 Chair, PERM Steering Committee (tel) This document does not contain technology or technical data controlled under either the U.S. International Traffic in Arms Regulations or the U.S. Export Administration Regulations. IPC POC: Director, Printed Board Standards & Technology IPC Association Connecting Electronics Industries (tel) 1

2 Provide overarching leadership and coordination of government and industry Pb-free electronics risk management activities to leverage the commercial supply chain for the aerospace, defense and high performance electronics communities PERM Consortium responsibilities include: Facilitate long-term aerospace, defense and high performance electronics strategies and tactics to effectively deal with the Pb-free electronics issues Coordinate risk management approaches for the transition to Pbfree electronics that maintains the safety, performance, reliability, and affordability required for aerospace, defense and high performance electronics 2

3 IEC Document # Title GEIA Document # Title IEC/TS IEC/TS IEC/TS IEC/TS IEC/TS Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - Part 1: Preparation for a lead-free control plan Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - Part 2: Mitigation of deleterious effects of tin Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - Part 3: Performance testing for systems containing leadfree solder and finishes Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - Part 21: Program management - Systems engineering guidelines for managing the transition to lead-free electronics Process management for avionics - Aerospace and defence electronic systems containing lead free solder - Part 22: Technical guidelines IEC/GEIA Cross Reference Table GEIA-STD A GEIA-STD A GEIA-STD A GEIA-HB GEIA-HB Performnance Standard for Aerospace and High Performance Electronic Systems Containing Lead-free Solder Standard for Mitigating the Effects of Tin Whiskers in Aerospace and High Performance Electronic Systems Performance Testing for Aerospace and High Performance Electronic Interconnects Containing Pb-free Solder and Finishes Program Management/Systems Engineering Guidelines For Managing The Transistion To Lead-Free Electronics Technical Guidelines for Aerospace and High Performance Electronic Systems Containing Lead-free Solder and finishes IEC/TS Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - GEIA-HB Part 23: Rework and repair guidance to address the implications of lead-free electronics and mixed assemblies Rework/Repair Handbook to Address the Imiplications of Lead-Free Electronics and Mixed Assemblies in Aerospace and High Performance Electronic Systems IEC/TS Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - Part X: Ball Grid Array (BGA) reballing GEIA-STD-0006-A Requirements for Using Solder Dip to Replace The Finish on Electronic Piece Parts 3

4 Under IPC/PERM Lead-free Design and Implementation Guide Self-mitigation Industry Round-Robin Pb-Free Evaluation Test Vehicles Tin Whiskers Users Group NASA/DoD Pb-free test Phase III (The project formerly known as) Under SAE G-24 Reballing vs Mixed Assembly Guidelines Evaluation of Pb-Free Material within Electronic Piece Parts Revisions to STD-001 and STD

5 IPC/PERM Projects 5

Guide is completing final review and incorporation of industry comments Publication as an IPC White Paper scheduled before the end of the year The intent of this design guide is to

6 Guide is completing final review and incorporation of industry comments Publication as an IPC White Paper scheduled before the end of the year The intent of this design guide is to assist design engineers in developing electronics that are completely Pb-free and meet the demanding requirements of ADHP* systems and products. * Aerospace, Defense, and High-Performance 6

7 1.0 Introduction 2.0 Document Scope 3.0 Technical Information 3.1 Pb-free Solders and Solder Joints Pb-free Solders (Alloy Characteristics) Pb-free Solder Joints 3.2 Tin Whiskers 3.3 Printed Board Defects Plating defects Conductive Filament Formation (CFF) 3.4 Product Qualification Component-Level Qualification Assembly-Level Qualification 3.5 Manufacturing Processes Soldering Popcorning Copper Dissolution Pad Lifting 3.6 Supply Chain Control Supplier Pb-free Flow-downs 3.7 Obsolescence Management 3.8 COTS Assemblies Selection and Use 3.9 Configuration Management 4.0 Implementation 4.1 Product Design Risk Management (PDRM) Pb-free Interconnections Tin Whiskers 4.2 Customer Risk Management (CRM) 5.0 Design Process Flow 5.1 The Proposal Stage 5.2 The Requirements Stage 5.3 The Concept (Development) Stage 5.4 The Preliminary Design Stage 5.5 The Detailed Design Stage Risk Management 5.6 Documentation 5.7 Manufacturing (Production Readiness) 5.8 Validation & Qualification 5.9 Product Support 6.0 Definitions and Terms 7.0 Acronyms 8.0 References 7

Three-year study under IPC subcommittee 8-81f to evaluate factors affecting coverage of pure tin parts by solder during SnPb SMT reflow Preliminary results

8 Three-year study under IPC subcommittee 8-81f to evaluate factors affecting coverage of pure tin parts by solder during SnPb SMT reflow Preliminary results presented at APEX 2016 and published in September 2016 SMT Magazine Final report to be published as an IPC White Paper this year and presented at APEX

9 CCA test vehicles assembled at 7 locations by 7 different processes Test vehicles had 15 different packages including: MLCC Chips, SSOP, TQFP, LQFP, SO, and DO package types Boards had two different finishes and two different set of pad sizes Solder coverage was determined by XRF, with additional confirmation by cross-section and SEM/EDS analyses 9

10 80% Confidence Interval Probability of self-mitigation by package and process base on XRF data 10

11 Examples of histograms of XRF data used to examine effects of solder process 11

12 Results Package geometry is the most significant factor Solder process is also a factor Pad size is significant, but not important Board finish is not significant Conclusions XRF is an effective technique for evaluation of self-mitigation Part stored for up to 14 months mitigated as well as those stored for 6 months, but part stored for 5 years did not mitigate as well Vapor Phase and Oven Reflow can produce different selfmitigation on the same parts Increased peak oven reflow temperature may enhance selfmitigation probability 12

Subcommittee 8-81k has compiled a list of test vehicles with publically available build data that have been used for Pb-Free evaluation studies Intent is to assist researchers in

13 Subcommittee 8-81k has compiled a list of test vehicles with publically available build data that have been used for Pb-Free evaluation studies Intent is to assist researchers in selection of test vehicles that are: Standard, facilitating direct comparison of results Available without cost or other restrictions Suitable for the type of testing performed 13

14 Subcommittee 8-81h was created to assist in beta testing of tin whisker risk modeling tool developed under SERDP WP-1753 project Group continues to function as a means to exchange tips on whisker risk assessment 14

15 The Whisker Risk Model Spreadsheet can be used to calculate the expected number of tin whisker shorts on one or more leaded components, based on user-specified part and lead geometry, whisker density, whisker length distribution, applied voltage, and conformal coating coverage. This presentation describes a worked example. To follow along, download the Whisker Risk Model Example Excel spreadsheet at For further details, see the Whisker Risk Model Spreadsheet User Guide, also available at the same URL. 15

16 Package Height (A 2 ) = 1.75 mm Package Seating Plane (A 1 ) = 0.18 mm Lead Span (H) = 6.00 mm Body Width (E) = 3.90 mm Lead Foot Length (L) = 0.75 mm Lead Thickness (c) = 0.20 mm Lead Width (B) = 0.43 mm Lead Pitch (e) = 1.25 mm Lead Angle from Vertical (α) = 10 degrees Number of Leads = 14 Number of Sides with Leads = 2 Device Geometry Example 16

17 Open the spreadsheet and navigate to the Part Data sheet. Enter geometry data as shown in the green cells: Device Geometry Example- Input of Data 17

18 Example- Input of Data on Whisker Field Users must define- this is the biggest challenge! If you have data on a whisker field of interest- just enter data If no data, you have to make assumptions based on literature 18

Example- Results for a single component Results for geometry and whisker field above with default values for applied voltage (5V), PWB Pad Thickness (0.

19 Example- Results for a single component Results for geometry and whisker field above with default values for applied voltage (5V), PWB Pad Thickness (0.063 mm), and Overall Coating Effectiveness (50%). The final result, 139 expected shorts, and the reliability for not shorting (the prob. that no shorts form 0.00%), is displayed at the bottom of the sheet: 19

20 Tool permits multiple components to be run and have the results rolled-up to an assembly level Example- Results for a multiple components rolled up The overall total shorts in this case is expected to be 5,227. The overall reliability for no shorts forming is 0.00%. 20

Multi-year project to evaluate performance of Pb-free assemblies under harsh conditions Vibration, T-Cycling -55C/+125C, Drop Shock Boards evaluated for Copper Dissolution and Via integrity by IST

21 Multi-year project to evaluate performance of Pb-free assemblies under harsh conditions Vibration, T-Cycling -55C/+125C, Drop Shock Boards evaluated for Copper Dissolution and Via integrity by IST Evaluating lower melting temperature leadfree solder Bi containing alloys NASA was unable to continue management of the project, so it was taken over by PERM Current status- all materials on hand and assembly is anticipated by end of

22 All Test Boards x 9.0 x Lyr (2 core + Foil outers) Drop Test Board Vibration/Thermal Board 22

23 SnPb baseline 183 o C SAC305 baseline o C Lower process temperature LF solders for Study 91.8Sn 3.4Ag 4.8Bi {Indium Corporation} Melting Temperature o C Sn2.25Ag0.5Cu6.0Bi {Indium Corporation} Melting Temperature o C Sn2.0Ag7.5Bi {Indium Corporation} Melting Temperature o C Laminates Baseline Isola 370HR Alternative - Isola 408HR Board Finishes Primary board finish: Immersion silver (ImAg) Limited use: Electroless Nickel Immersion Gold (ENIG) 23

24 PBGA 1156; A-PBGA mm-35mm = SnPb and SAC305 PBGA- 676; A-PBGA mm-27mm = SnPb and SAC305 LCC 20; 20LCC-1.27mm-8.9mm = Retin to match alloy of build MLF {QFN}20; A-MLF20-5mm-.65mm = Order Sn only, none to be SnPb TQFP 144; A-TQFP144-20mm = Sn LGA 1.27mm pitch / 10mm package (Linear Tech 8023) = plastic component with Au finish SOT; SOT23TR-DC123 = Sn, two parts are daisy chained together to complete 1 channel 12 x 12 two stack 8 per PWB; 4 will be 305 top / 305 bottom AND 4 will be 105 top / 305 bottom 24

25 SAE G-24 Projects 25

26 SAE ARP6415, Guidlelines for Pb-Free BGAs: Reballing vs. Mixed Alloy Soldering is under development- anticipate publishing late in 2018 Pb-free BGAs are not always compatible with a SnPb reflow process- there are two* approaches, and no published consensus on why and when one or the other is appropriate *Actually 3 approaches, including switching to Pb-Free solder assembly, but that is out of scope of the document 26

SAE ARP6537, Evaluation of Pb-free Material within Electronic Piece Parts Piece part suppliers have been transition to using Pb-free solders within the parts themselves, such as Pb-free

27 SAE ARP6537, Evaluation of Pb-free Material within Electronic Piece Parts Piece part suppliers have been transition to using Pb-free solders within the parts themselves, such as Pb-free solder bumps. This document will provide guidance on necessary tests and evaluations for parts using Pb-free solders. Project in early stages- anticipate document not before late

These are the core documents used to control risks of Pb-Free materials and processes in ADHP systems Both are due for review and update from Rev A to Rev B Projects

28 These are the core documents used to control risks of Pb-Free materials and processes in ADHP systems Both are due for review and update from Rev A to Rev B Projects initiated this past summer for both updates Team is collecting feedback from users on recommendations for improvement and seeking volunteers to participate in the revision activity 28

29 Other Projects of Interest 29

30 The Aerospace Vehicle Systems Institute (AVSI) is facilitating a collaborative project (under AFE84) to evaluate by flight test a number of commercial technologies as part of the In Service Reliability Project (ISRP), including: Lead-free electronics reliability Semiconductor wear out monitoring SEE susceptibility in real thermal neutron environments Wire Bonds (e.g. copper) 30

31 Plan is to build test electronics modules incorporating commercial technologies (Pbfree, Cu and Ag wire-bonds, and small geometry semiconductors) together with environmental monitors and fly them on a variety of airborne platforms Capture data on reliability and environmental conditions in a variety of locations on airborne platforms over a 48-months of in-service flight 31

32 Multi-year four phase project I- Initial technical and program planning (completed) II- Detailed requirements and initial design (in progress) III- Design, Test, Integration, and Qualification ( ) IV- Installation, Deployment, and Operations ( ) 32

33 Questions? 33

Current Activities at SAE SSTC G12 (Solid State Devices) G24 (Pb-free Risk Mitigation) Chair of SSTC G12 & G24

Current Activities at SAE SSTC G12 (Solid State Devices) G24 (Pb-free Risk Mitigation) Chair of SSTC G12 & G24 1 SSTC G12 Scope The SSTC G-12 Committee develops solutions to technical problems in the application,