CS152 Computer Architecture and Engineering Lecture 25. I/O and Storage Systems Power

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1 CS52 Computer Architecture and Engineering Lecture 25 I/O and Storage Systems Power Recap: Nano-layered Disk Heads Special sensitivity of Disk head comes from Giant Magneto-Resistive effect or (GMR) IBM is leader in this technology Same technology as TMJ-RAM breakthrough we described in earlier class. Coil for writing December 5 th, 2 John Kubiatowicz (http.cs.berkeley.edu/~kubitron) lecture slides: Lec25. Lec25.2 Recap: Disk Device Terminology Disk I/O Performance 3 Response Time (ms) Disk Latency = Queueing Time + Controller time + Seek Time + Rotation Time + Xfer Time Order of magnitude times for 4K byte transfers: Average Seek: 8 ms or less Rotate: rpm Xfer: 72 rpm Metrics: Response Time Throughput latency goes as T ser u/(-u) u = utilization Proc Queue 2 Throughput (Utilization) (% total BW) Response time = Queue + Device Service time % IOC Device % Lec25.3 Lec25.4

2 Introduction to Queueing Theory A Little Queuing Theory: Use of random distributions Arrivals Black Box Queueing System Departures System Queue server Proc IOC Device Avg. Queueing Theory applies to long term, steady state behavior Ÿ Arrival rate = Departure rate Little s Law: Mean number tasks in system = arrival rate x mean reponse time Observed by many, Little was first to prove Simple interpretation: you should see the same number of tasks in queue when entering as when leaving. Applies to any system in equilibrium, as long as nothing in black box is creating or destroying tasks Lec25.5 Server spends a variable amount of time with customers Weighted mean m = (f x T + f2 x T fn x Tn)/F = 6 p(t)xt V 2 = (f x T 2 + f2 x T fn x Tn 2 )/F m 2 = 6 p(t)xt 2 -m 2 Squared coefficient of variance: C = V 2 /m 2 - Unitless measure ( ms 2 vs.. s 2 ) Exponential distribution C = : most short relative to average, few others long; 9% < 2.3 x average, 63% < average Hypoexponential distribution C < : most close to average, C=.5 => 9% < 2. x average, only 57% < average Hyperexponential distribution C > : further from average C=2. => 9% < 2.8 x average, 69% < average Avg. Lec25.6 A Little Queuing Theory: Variable Service Time Queue System Proc IOC Device Disk response times C.5 (majority seeks < average) Yet usually pick C =. for simplicity Avg. Memoryless, exponential dist Many complex systems well described by memoryless distribution! Another useful value is average time Time must wait for server to complete current task: m(z) Called Average Residual Wait Time Not just /2 x m because doesn t capture variance Can derive m(z) = /2 x m x ( + C) No variance Ÿ C= => m(z) = /2 x m Exponential Ÿ C= => m(z) = m server Lec25.7 A Little Queuing Theory: Average Wait Time Calculating average wait time in queue T q : All customers in line must complete; avg time: m{t ser = /P If something at server, it takes to complete on average m(z) - Chance server is busy = u=o/p; average delay is u x m(z) T q = uxm(z)+ L q x T s er T q = u x m(z) + O xt q x T Little s Law ser T q = u x m(z) + u x T q Defn of utilization (u) T q x ( u) = m(z) x u T q = m(z) x u/(-u) = T s er x {/2 x (+C)} x u/( u)) Notation: O average number of arriving customers/second T ser average time to service a customer u server utilization (..): u = O x T ser T q average time/customer in queue L q average length of queue:l q = O x T q m(z) average residual wait time = T s er x {/2 x (+C)} Lec25.8

3 Assumptions so far: System in equilibrium Time between two successive arrivals in line are random Server can start on next customer immediately after prior finishes No limit to the queue: works First-In-First-Out Afterward, all customers in line must complete; each avg T ser Described memoryless or Markovian request arrival (M for C= exponentially random), General service distribution (no restrictions), server: M/G/ queue When Service times have C =, M/M/ queue T q = T ser x u / ( u) T ser u T q A Little Queuing Theory: M/G/ and M/M/ average time to service a customer server utilization (..): u = O xt ser average time/customer in queue Reliability and Availability Two terms that are often confused: Reliability: Is anything broken? Availability: Is the system still available to the user? Availability can be improved by adding hardware: Example: adding ECC on memory Reliability can only be improved by: Better environmental conditions Building more reliable components Building with fewer components - Improve availability may come at the cost of lower reliability Durability: Will the data last forever? Lec25.9 Lec25. Manufacturing Advantages of Disk Arrays Small # of Large Disks Ÿ Large # of Small Disks! Conventional: 4 disk designs 3.5 Disk Array: disk design Low End Disk Product Families 4 High End IBM 339 (K) Data Capacity 2 GBytes Volume 97 cu. ft. Power 3 KW Data Rate 5 MB/s I/O Rate 6 I/Os/s MTTF 25 KHrs Cost $25K Disk Arrays have potential for IBM 3.5" 6 x7 32 MBytes 23 GBytes. cu. ft. cu. ft. W KW.5 MB/s 2 MB/s 55 I/Os/s 39 IOs/s 5 KHrs??? Hrs $2K $5K large data and I/O rates high MB per cu. ft., high MB per KW reliability? Lec25. Lec25.2

4 Array Reliability Redundant Arrays of Disks Reliability of N disks = Reliability of Disk N 5, Hours 7 disks = 7 hours Disk system MTTF: Drops from 6 years to month! Arrays (without redundancy) too unreliable to be useful! Files are "striped" across multiple spindles Redundancy yields high data availability Disks will fail Contents reconstructed from data redundantly stored in the array Capacity penalty to store it Bandwidth penalty to update Mirroring/Shadowing (high capacity cost) Hot spares support reconstruction in in parallel with access: very high media availability can be be achieved Techniques: Horizontal Hamming Codes (overkill) Parity & Reed-Solomon Codes Failure Prediction (no capacity overhead!) VaxSimPlus Technique is controversial Lec25.3 Lec25.4 RAID : Disk Mirroring/Shadowing RAID 3: Parity Disk recovery group... P Each disk is fully duplicated onto its "shadow" Very high availability can be achieved Bandwidth sacrifice on write: Logical write = two physical writes Reads may be optimized Most expensive solution: % capacity overhead Targeted for high I/O rate, high availability environments Lec25.5 logical record Striped physical records Parity computed across recovery group to protect against hard disk failures 33% capacity cost for parity in this configuration wider arrays reduce capacity costs, decrease expected availability, increase reconstruction time Arms logically synchronized, spindles rotationally synchronized logically a single high capacity, high transfer rate disk Targeted for high bandwidth applications: Scientific, Image Processing Lec25.6

5 RAID 5+: High I/O Rate Parity Problems of Disk Arrays: Small Writes RAID-5: Small Write Algorithm A logical logical write write becomes four four physical I/Os I/Os Independent writes writes possible because of of interleaved parity parity Reed-Solomon Codes Codes ("Q") ("Q") for for protection during during reconstruction Targeted for mixed applications D D D2 D3 P D4 D5 D6 P D7 D8 D9 P D D D2 P D3 D4 D5 P D6 D7 D8 D9 Increasing Logical Disk Addresses Stripe Stripe Unit D new data Logical Write = 2 Physical Reads + 2 Physical Writes + D D D2 D3 P old data XOR (. Read) old (2. Read) parity + XOR (3. Write) (4. Write) D2 D2 D22 D23 P Disk Columns Lec25.7 D D D2 D3 P Lec25.8 Hewlett-Packard (HP) AutoRAID HP has interesting solution which combines both mirroring and RAID level 5. Dynamically adapts disk storage - For recent or highly used data, uses mirroring - For less recently used data, uses RAID 5 Gets speed of mirroring when it matters and density of RAID 5 on average Lec25.9 Administrivia: Not much left Go to the Projects link on home page and describe your project These descriptions should be up by Friday Monday: Sections in lab again (9 Cory) Just office hours Midterm II results: Mean: 67.2 Std deviation: 7. No solutions up yet! Remaining schedule: Wrap up lecture on 5/7 (Quantum computing, DNA computing?) Oral presentations/contest on Tuesday 2/ - 36 Soda Hall - Times: : :2, : 2:2 - Signup sheet on my door later today Grades out by 2/4 Oral Report Powerpoint 5 minute presentation, 5 minutes for questions Lec25.2

6 7 Talk Commandments for a Bad Talk Following all the commandments I. Thou shalt not illustrate. II. Thou shalt not covet brevity. III.Thou shalt not print large. IV. Thou shalt not use color. V. Thou shalt not skip slides in a long talk. VI. Thou shalt cover thy naked slides. VII. Thou shalt not practice. We describe the philosophy and design of the control flow machine, and present the results of detailed simulations of the performance of a single processing element. Each factor is compared with the measured performance of an advanced von Neumann computer running equivalent code. It is shown that the control flow processor compares favorablylism in the program. We present a denotational semantics for a logic program to construct a control flow for the logic program. The control flow is defined as an algebraic manipulator of idempotent substitutions and it virtually reflects the resolution deductions. We also present a bottom-up compilation of medium grain clusters from a fine grain control flow graph. We compare the basic block and the dependence sets algorithms that partition control flow graphs into clusters. Our compiling strategy is to exploit coarse-grain parallelism at function application level: and the function application level parallelism is implemented by fork-join mechanism. The compiler translates source programs into control flow graphs based on analyzing flow of control, and then serializes instructions within graphs according to flow arcs such that function applications, which have no control dependency, are executed in parallel. A hierarchical macro-control-flow computation allows them to exploit the coarse grain parallelism inside a macrotask, such as a subroutine or a loop, hierarchically. We use a hierarchical definition of macrotasks, a parallelism extraction scheme among macrotasks defined inside an upper layer macrotask, and a scheduling scheme which assigns hierarchical macrotasks on hierarchical clusters. We apply a parallel simulation scheme to a real problem: the simulation of a control flow architecture, and we compare the performance of this simulator with that of a sequential one. Moreover, we investigate the effect of modelling the application on the performance of the simulator. Our study indicates that parallel simulation can reduce the execution time significantly if appropriate modelling is used. We have demonstrated that to achieve the best execution time for a control flow program, the number of nodes within the system and the type of mapping scheme used are particularly important. In addition, we observe that a large number of subsystem nodes allows more actors to be fired concurrently, but the communication overhead in passing control tokens to their destination nodes causes the overall execution time to increase substantially. The relationship between the mapping scheme employed and locality effect in a program are discussed. The mapping scheme employed has to exhibit a strong locality effect in order to allow efficient execution. We assess the average number of instructions in a cluster and the reduction in matching operations compared with fine grain control flow execution. Medium grain execution can benefit from a higher output bandwidth of a processor and finally, a simple superscalar processor with an issue rate of ten is sufficient to exploit the internal parallelism of a cluster. Although the technique does not exhaustively detect all possible errors, it detects nontrivial errors with a worst-case complexity quadratic to the system size. It can be automated and applied to systems with arbitrary loops and nondeterminism. Lec25.2 Lec25.22 Alternatives to a Bad Talk Practice, Practice, Practice! Use casette tape recorder to listen, practice Try videotaping Seek feedback from friends Use phrases, not sentences Notes separate from slides (don t read slide) Pick appropriate font, size (~ 24 point to 32 point) Estimate talk length - 2 minutes per slide Use extras as backup slides (Question and Answer) Use color tastefully (graphs, emphasis) Don t cover slides Use overlays or builds in powerpoint Go to room early to find out what is WRONG with setup Beware: PC projection + dark rooms after meal! Lec25.23 Include in your final presentation Who is on team, and who did what Everyone should say something High-level description of what you did and how you combined components together Use block diagrams rather than detailed schematics Assume audience knows Chapters 6 and 7 already Include novel aspects of design Did you innovate? How? Why did you choose to do things the way that you did? Give Critical Path and Clock cycle time Bring paper copy of schematics in case there are detailed questions. What could be done to improve clock cycle time? Description of testing philosophy! Mystery program statistics: instructions, clock cycles, CPI, why stalls occur (cache miss, load-use interlocks, branch mispredictions,... ) Lessons learned, what might do different next time Lec25.24

7 OceanStore: The Oceanic Data Utility: OceanStore Context: Ubiquitous Computing ƒ &RPSXWLQJHYHU\ZKHUH 'HVNWRS/DSWRS3DOPWRS &DUV&HOOSKRQHV 6KRHV"&ORWKLQJ":DOOV" ƒ &RQQHFWLYLW\HYHU\ZKHUH 5DSLGJURZWKRIEDQGZLGWKLQWKHLQWHULRURIWKHQHW %URDGEDQGWRWKHKRPHDQGRIILFH :LUHOHVVWHFKQRORJLHVVXFKDV&'$6DWHOLWHODVHU Lec25.25 Lec25.26 Questions about information: First Observation: Want Utility Infrastructure ƒ :KHUHLVSHUVLVWHQWLQIRUPDWLRQVWRUHG" :DQW*HRJUDSKLFLQGHSHQGHQFHIRUDYDLODELOLW\ GXUDELOLW\DQGIUHHGRPWRDGDSWWRFLUFXPVWDQFHV ƒ +RZLVLWSURWHFWHG" :DQW(QFU\SWLRQIRUSULYDF\VLJQDWXUHVIRUDXWKHQWLFLW\ DQG%\]DQWLQHFRPPLWPHQWIRULQWHJULW\ ƒ &DQZHPDNHLWLQGHVWUXFWLEOH" :DQW5HGXQGDQF\ZLWKFRQWLQXRXVUHSDLUDQG UHGLVWULEXWLRQIRUORQJWHUPGXUDELOLW\ ƒ,vlwkdugwrpdqdjh" :DQWDXWRPDWLFRSWLPL]DWLRQGLDJQRVLVDQGUHSDLU ƒ :KRRZQVWKHDJJUHJDWHUHVRXFHV" :DQW8WLOLW\,QIUDVWUXFWXUH ƒ DUN :HLVHU IURP;HUR[ 7UDQVSDUHQWFRPSXWLQJLVWKHXOWLPDWHJRDO &RPSXWHUVVKRXOGGLVDSSHDULQWRWKHEDFNJURXQG ƒ,qvwrudjhfrqwh[w 'RQ WZDQWWRZRUU\DERXWEDFNXS 'RQ WZDQWWRZRUU\DERXWREVROHVFHQFH HHGORWVRIUHVRXUFHVWRPDNHGDWDVHFXUHDQG KLJKO\DYDLODEOH%87GRQ WZDQWWRRZQWKHP 2XWVRXUFLQJRIVWRUDJHDOUHDG\EHFRPLQJSRSXODU ƒ 3D\PRQWKO\IHHDQG\RXU GDWDLVRXWWKHUHµ 6LPSOHSD\PHQWLQWHUIDFH Ÿ RQHELOOIURPRQHFRPSDQ\ Lec25.27 Lec25.28

8 Second Observation: Want Automatic Maintenance ƒ &DQ WSRVVLEO\PDQDJHELOOLRQVRIVHUYHUVE\KDQG ƒ 6\VWHPVKRXOGDXWRPDWLFDOO\ $GDSWWRIDLOXUH 5HSDLULWVHOI,QFRUSRUDWHQHZHOHPHQWV ƒ &DQZHJXDUDQWHHGDWDLVDYDLODEOH IRU\HDUV" HZVHUYHUVDGGHGIURPWLPHWRWLPH 2OGVHUYHUVUHPRYHGIURPWLPHWRWLPH (YHU\WKLQJMXVWZRUNV ƒ DQ\ FRPSRQHQWVZLWKJHRJUDSKLF VHSDUDWLRQ 6\VWHPQRWGLVDEOHGE\QDWXUDOGLVDVWHUV &DQDGDSWWRFKDQJHVLQGHPDQGDQGUHJLRQDORXWDJHV *DLQLQVWDELOLW\WKURXJKVWDWLVWLFV Lec25.29 Utility-based Infrastructure Canadian OceanStore Pac Bell Sprint IBM AT&T IBM ƒ 7UDQVSDUHQWGDWDVHUYLFHSURYLGHGE\IHGHUDWLRQ RIFRPSDQLHV RQWKO\IHHSDLGWRRQHVHUYLFHSURYLGHU &RPSDQLHVEX\DQGVHOOFDSDFLW\IURPHDFKRWKHU Lec25.3 OceanStore: Everyone s Data, One Big Utility ƒ +RZPDQ\ILOHVLQWKH2FHDQ6WRUH" $VVXPH SHRSOHLQZRUOG 6D\ILOHVSHUVRQYHU\FRQVHUYDWLYH" 6R ILOHVLQ2FHDQ6WRUH,IJLJILOHVRNDVWUHWFKJHWPROHRIE\WHV 7UXO\LPSUHVVLYHQXPEHURIHOHPHQWV««EXWVPDOOUHODWLYHWRSK\VLFDOFRQVWDQWV $VLGHQHZUHVXOWV([DE\WHV\HDU Lec25.3 OceanStore Assumptions ƒ 8QWUXVWHG,QIUDVWUXFWXUH 7KH2FHDQ6WRUHLVFRPSULVHGRIXQWUXVWHGFRPSRQHQWV 2QO\FLSKHUWH[W ZLWKLQWKHLQIUDVWUXFWXUH ƒ 5HVSRQVLEOH3DUW\ 6RPHRUJDQL]DWLRQLHVHUYLFHSURYLGHUJXDUDQWHHV WKDW\RXUGDWDLVFRQVLVWHQWDQGGXUDEOH RWWUXVWHGZLWKFRQWHQW RIGDWDPHUHO\LWVLQWHJULW\ ƒ RVWO\:HOO&RQQHFWHG 'DWDSURGXFHUVDQGFRQVXPHUVDUHFRQQHFWHGWRDKLJK EDQGZLGWKQHWZRUNPRVWRIWKHWLPH ([SORLWPXOWLFDVWIRUTXLFNHUFRQVLVWHQF\ZKHQSRVVLEOH ƒ 3URPLVFXRXV&DFKLQJ 'DWDPD\EHFDFKHGDQ\ZKHUHDQ\WLPH ƒ 2SWLPLVWLF&RQFXUUHQF\YLD&RQIOLFW5HVROXWLRQ $YRLGORFNLQJLQWKHZLGHDUHD $SSOLFDWLRQVXVHREMHFWEDVHGLQWHUIDFHIRUXSGDWHV Lec25.32

9 Use of Moore s law gains: The OceanStore Creed Basic Structure: Irregular Mesh of Pools ƒ 4XHVWLRQ&DQZHXVHRRUH V ODZJDLQVIRU VRPHWKLQJRWKHUWKDQMXVWUDZSHUIRUPDQFH" ƒ ([DPSOHV 6WDELOLW\WKURXJK6WDWLVWLFV 8VHRIUHGXQGDQF\RIVHUYHUVQHWZRUNSDFNHWV HWF LQRUGHUWRJDLQPRUHSUHGLFWDEOHEHKDYLRU 6\VWHPVYHUVLRQRI7KHUPRG\QDPLFV ([WUHPH'XUDELOLW\\HDUWLPHVFDOH" 8VHRIHUDVXUHFRGLQJDQGFRQWLQXRXVUHSDLU 6HFXULW\DQG$XWKHQWLFDWLRQ 6LJQDWXUHVDQGVHFXUHKDVKHVLQPDQ\SODFHV &RQWLQXRXVG\QDPLFRSWLPL]DWLRQ Lec25.33 Lec25.34 Data Coding Model Archival Dissemination of Fragments Two distinct forms of data: active and archival Active Data in Floating Replicas Per object virtual server Logging for updates/conflict resolution Interaction with other replicas to keep data consistent May appear and disappear like bubbles Archival Data in Erasure-Coded Fragments M-of-n coding: Like hologram - Data coded into n fragments, any m of which are sufficient to reconstruct (e.g m=6, n=64) - Coding overhead is proportional to nym (e.g 4) - Law of large numbers advantage to fragmentation Fragments are self-verifying OceanStore equivalent of stable store Most data in the OceanStore is archival! Lec25.35 Lec25.36

10 Slides Borrowed from Bob Broderson Low Power Design Lec25.37 Lec25.38 Lec25.39 Lec25.4

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12 Lec25.45 Lec25.46 /4 3/4 x /4 = 3/6 Lec25.47 Lec25.48

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15 Lec25.57 Lec25.58 Back to original goal: Processor Usage Model Desired Compute-intensive and Throughput low-latency processes Ceiling: Set by top speed of the processor Single-user system not always computing Background and high-latency processes System Optimizations: Maximize Peak Throughput Minimize Average Energy/operation (maximize computation per battery life) time Lec25.59 Lec25.6

16 Typical Usage Delivered Throughput Peak Excess throughput Another approach: Reduce Frequency Delivered Throughput Frequency set by user Peak f CLK Reduced PowerBook Control Panel Slow Fast time Wake up Compute ASAP Go to idle/sleep mode Always high throughput Always high energy/operation time Energy/operation remains unchanged... while throughput scales down with f CLK Problems: Circuits designed to be fast are now wasted. Demand for peak throughput not met. Lec25.6 Lec25.62 Alternative: Dynamic Voltage Scaling Delivered Throughput Reduce throughput & f Peak CLK, Reduce energy/operation time Dynamically scale energy/operation with throughput Extend battery life by up to x with the same hardware! Key: Process scheduler determines operating point. Summary: I/O I/O performance limited by weakest link in chain between OS and device Queueing theory is important % utilization means very large latency Remember, for M/M/ queue (exponential source of requests/service) - queue size goes as u/(-u) - latency goes as T ser u/(-u) For M/G/ queue (more general server, exponential sources) - latency goes as m(z) x u/(-u) = T ser x {/2 x (+C)} x u/(-u) Redundancy + Repair is key to high reliability Lec25.63 Lec25.64

17 Conclusion Best way to say power or energy: do nothing! Most Important equations to remember: Energy = CV 2 Power = CV 2 f Slowing clock rate does not reduce energy for fixed operation! Ways of reducing energy: Pipelining with reduced voltage Parallelism with reduced voltage Lec25.65