Hello and welcome to this Renesas Interactive course that covers the Watchdog timer found on RX MCUs.

Transcription

1 Hello and welcome to this Renesas Interactive course that covers the Watchdog timer found on RX MCUs. 1

2 This course covers specific features of the watchdog timer on RX MCUs. If you need basic information on watchdog timers please refer to the Watchdog Timer Overview Course. If you are looking for information that applies to a specific RX group please refer to that group's Technical Marketing Overview Course. In this course we will cover the watchdog timer s block diagram, the available clocking options, the different operating modes available, how to start and refresh the watchdog, how to write to watchdog registers, general usage notes, and how to use the watchdog timer with the RX s independent watchdog timer. 2

3 This figure shows the block diagram of a typical WDT on an RX MCU. First notice that the WDT sits on the peripheral bus. At the bottom you will see the WINA and WINB registers that have arrows pointing to other watchdog timer registers. We will discuss the reason for this later. The other three watchdog timer registers are shown here. The TCNT is the watchdog timer counter register and RSTCSR and TCSR are registers for controlling the watchdog timer. At the top right of the figure you will see the different clock inputs that are available to the watchdog timer. Notice that they are all based upon the RX's peripheral clock. At the top left you will see the watchdog timer's interrupt control block. Depending on the configuration the watchdog timer can either trigger an interrupt or output an overflow signal when a timer overflow occurs. Below the interrupt control block is the reset control block. Notice that the RSTCSR register is feeding into this block. This register controls whether the watchdog timer sends a reset signal to the MCU when a timer overflow occurs. 3

4 Which clock is used for watchdog timer counting is chosen in the TCSR register. Each option is based upon the peripheral clock. Depending on which divisor is chosen the timeout period can range from as short as 20.4us or as long as 668.5ms. These numbers are calculated given a peripheral clock of 50MHz and will scale linearly. For instance, if the peripheral clock were cut in half to 25MHz then the shortest timeout period would be 40.8us and the longest 1337ms. 4

5 The watchdog timer has 2 modes that can it operate in. The user chooses which mode they want to use by changing the timer mode select bit in the TCSR register. The first mode is watchdog timer mode. In this mode when the watchdog timer overflows the WDTOVF signal is output and an internal reset can be generated. Whether a reset is generated depends on the setting of the reset enable bit in the RSTCSR register. The other mode is Interval Timer mode. In this mode the watchdog timer generates the watchdog overflow interrupt every time an overflow occurs. There is no option for the watchdog to reset the MCU in this mode. 5

6 Starting and refreshing the watchdog timer are simple tasks. To start the timer the user needs to set the TME bit in the TCSR register to 1. To refresh the watchdog timer, also known as kicking the dog, the user should write to the timer counter register. Since the watchdog timer is an up-counting timer, the user should write all zeros to the register. 6

7 Writing to the watchdog's registers requires extra care compared to writing other peripheral registers. For example, the TCNT and TCSR registers are both written using the Write Window A register. When writing this register the user should make sure to use a word transfer instead of a byte transfer even though the TCNT and TCSR registers are 8 bits each. The top 8 bits, bits 8 15, are what distinguish which register is written. To write the TCNT register, hex 5A should be in top byte. If the user was refreshing the watchdog timer they would put hex 5A in the top byte and hex 00 in the lower byte. To instead write the TCSR register, hex A5 should be in the top byte. The RSTCSR register is written to using the Write Window B register and it must also be written using a word transfer. This time, instead of writing to two different registers, the top 8 bits distinguish which bit is written in the RSTCSR register. To write the RSTE bit hex 5A should be in the top byte. To clear the WOVF bit hex A5 should be used. While writing the registers requires extra attention, reading the registers can be done with byte accesses just like with other peripheral registers. 7

8 On this slide some general usage notes for the watchdog timer are listed. The first is that the WDTOVF# signal should not be input directly to the reset pin on the MCU. This will cause the MCU to not be correctly initialized. Instead, it is recommended that the WDTOVF# signal be sent out as a reset signal for the entire system which will then cause the MCU to be reset in-turn. Users should also be careful when using low power modes along with the watchdog. If the watchdog is operating in watchdog timer mode and an attempt to transition into software standby mode is made, the MCU will not transition into software standby mode. Instead the MCU will transition into either sleep mode or all-module clock-stop mode depending on the MCU s configuration. In order to transition into software standby mode when the watchdog is in watchdog timer mode, the user must first halt the watchdog by clearing the Timer Enable bit in the TCSR register. This only applies to watchdog timer mode, if interval timer mode is used then software standby mode can be entered into with no problems. 8

9 The RX has two watchdog timer units: the watchdog timer and the independent watchdog timer. While the independent watchdog timer only has the option of resetting the MCU when a timeout occurs, the watchdog timer can trigger an interrupt. Using these two together the watchdog timer could be used as a controlled shutdown mechanism while the independent watchdog could still offer the hard reset functionality. With this setup the standard watchdog could be used to detect errors in the user s system that would only be recreated after a hard reset has occurred. 9

10 In summary, in this course we covered: -the block diagram of the RX's watchdog timer, -The clock options available, -The 2 different modes the watchdog supports -How to start and refresh the watchdog, -How to write the watchdog s registers -Usage notes for using the watchdog overflow signal and using the watchdog with low power modes -And how you could use the watchdog timer along with the independent watchdog timer peripheral We would like to thank for viewing this course. You may consider viewing the Technical Marketing Overview Course for more information on RX MCUs. 10

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12 Thank You 12