The 8255A: Programmable Peripheral Interface

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1 CMP:885 Peripherals Summary- EE39: Computer Organization, rchitecture and MicroProcessors sumantra/courses/up/up.html The 855: Programmable Peripheral Interface PROGRMMER S VIEW OF THE 855 CS CONTROL REGISTER 8 IT PORT 4 IT PORT C 4 IT PORT C U L and select entities: Selection Port Port Port C Control Register 8 IT PORT (4 PIN DEVICE: SME SIZE S THE 885!) COMMND WO: MODE PORT PORT : MODE MODE : MODE : MODE : MODE : MODE X: MODE (Intel Recommendation:Don t Cares:, for future compatibility) C U COMMND WO: SR MODE C L / / / / X X X : SR S/R IT NUMER : SET in Port C : RESET SR Mode To set / reset bits in Port C, the control word is written in the Control Register SR Control Word affects one bit at a time Does not affect the mode

2 CMP:885 Peripherals Summary- 855 MODE : INPUT CONFIG 855 MODE : OUTPUT CONFIG INTE INTE 6,7 PORT INPUT ST IF INTR PORT INPUT ST IF INTR PORT LINES + HNDSHKE PORT LINES + HNDSHKE INTE INTE 4,5 3 INTR PORT OUTPUT 6 7 PORT OUTPUT CK OF CK OF INTR PORT LINES + HNDSHKE PORT LINES + HNDSHKE STTUS WO STTUS WO IF INTE INTR IF INTE INTR OF INTE INTR INTE OF INTR (PORT C, WITH ST REPLCED Y INTE) (PORT C, WITH CK REPLCED Y INTE) Mode. Mode Simple for Ports,, C port is either an input port, or an output port Inputs are not latched, outputs are Ports do not have interrupt or handshake capability. Mode Ports and : a port is either an input port, or an output port Each port uses 3 lines of Port C for handshaking, the remaining bits can be used for simple (Mode ) Input and output data are latched Interrupt Logic is supported 3. Mode Port used as a bidirectional port Port can be used in either Mode or Mode Port uses 5 bits of Port C for handshaking: the remaining can be used for simple (Mode ) for Port in Mode, or as handshaking lines for Port in Mode

3 CMP:885 Peripherals Summary MODE & MODE (INPUT) 855 MODE & MODE (OUTPUT) PORT ST IF CK OF INTR PORT INPUT PORT LINES + HNDSHKE PORT ND C LINES PORT ST IF CK OF INTR PORT OUTPUT CK OF INTR PORT LINES + HNDSHKE PORT LINES + HNDSHKE The 853/4: Programmable Interval Timer The 6 Modes of the 853/4. Mode : Interrupt on Terminal Count : fter the count reaches, OUT goes high OUT remains high until a new count or command word is loaded Counting temporarily stops when the GTE is disabled, and continues again when the GTE goes to logic high uxiliary Rules: If count register reloaded while counting is on, then fter first byte of count written, the current counting stops fter second byte of count written, the counting restarts with the new count number Low / going low: disables counting High: enables counting. Mode : Programmable One-Shot / Hardware Retriggerable One-Shot When GTE is triggered, OUT goes low fter the end of the count, OUT goes high again uxiliary Rule: If new count loaded while output is low, doesn t affect duration of one-shot OUT negative pulse until the next trigger

4 PROGRMMER S VIEW OF THE 853/4 CMP:885 Peripherals Summary-4 CS CONTROL REGISTER COUNTER COUNTER COUNTER CLK GTE OUT CLK GTE OUT CLK GTE OUT (4 PIN DEVICE) and select entities: Selection Counter Counter Counter Control Register THE 853/4 CONTROL WO to : Modes to 5 to : Modes to 3 (Intel Recommendation: SELECT Don t Cares:, for future compatibility) COUNTER MODE to : Counter # to # : Read ack Command (854 only!) R / W : Counter Latch : R/W LS only : R/W MS only : R/W LS, then MS CD? :CD counter : inary Counter 854 RED CK COMMND 854 RED CK STTUS OUT #? #? #? X COUNT STTUS COUNTER NUMER : LTCH THE COUNT : LTCH THE STTUS NULL COUNT? R/W MODE CD? The current count can be read anytime, doesn t affect one-shot pulse, resets OUT on next clock 3. Mode : Interrupt on Terminal Count Generate a pulse of width = clock period, at a given interval When a count is loaded, OUT goes high and remains high until count =, then goes low for one clock period (at the count of ) Count reloaded automatically, the pulse generated continuously count = is not allowed! uxiliary Rule: If count register reloaded while counting is on, then The current output pulse timing is not affected The next one is, according to the new value of the count Low / going low: disables counting, OUT goes high immediately

5 CMP:885 Peripherals Summary-5 4. Mode 3: Square Wave Generator When the count N is loaded, OUT is high If N is even, the pulse stays high for the first N/ clock cycles, and low for the next N/. If N is odd, the pulse stays high for (N + )/ clock cycles, and then low for (N )/ clock cycles When the count should have hit ( is not counted), OUT goes low for the next cycle, and the count is reloaded again For an even count, the count is decremented by For an odd count, for the first (high) half, the count is first decremented by, then by. For the second (low) half, the count is first decremented by 3, then by. uxiliary Rule: If count register reloaded while counting is on, then The current output pulse timing is not affected The next one is, according to the value of N Low / going low: disables counting, OUT goes high immediately 5. Mode 4: Software-Triggered Strobe Goes low for one clock period at the end of the count, and then goes high after the end of the count uxiliary Rule If count register reloaded while counting is on, then the new count is initialized on the next clock pulse Low / going low: disables counting 6. Mode 5: Hardware-Triggered Strobe Goes low for one clock period at the end of the count uxiliary Rule If count register reloaded while counting is on, then the new count is initialized on the next clock pulse

General Purpose Programmable Peripheral Devices. Assistant Professor, EC Dept., Sankalchand Patel College of Engg.,Visnagar

Chapter 15 General Purpose Programmable Peripheral Devices by Rahul Patel, Assistant Professor, EC Dept., Sankalchand Patel College of Engg.,Visnagar Microprocessor & Interfacing (140701) Rahul Patel 1