Minimum cycle time analysis of Ethernet-based real-time protocols

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1 Minimum cycle ime analysis of Eherne-based real-ime proocols Jérémy Rober, Jean-Philippe Georges, Eric Rondeau, Thierry Divoux To cie his version: Jérémy Rober, Jean-Philippe Georges, Eric Rondeau, Thierry Divoux. Minimum cycle ime analysis of Eherne-based real-ime proocols. Inernaional Journal of Compuers, Communicaions and Conrol, Agora Universiy of Oradea, 01, 7 (4), pp <hal > HAL Id: hal hps://hal.archives-ouveres.fr/hal Submied on 5 Jul 01 HAL is a muli-disciplinary open access archive for he deposi and disseminaion of scienific research documens, wheher hey are published or no. The documens may come from eaching and research insiuions in France or abroad, or from public or privae research ceners. L archive ouvere pluridisciplinaire HAL, es desinée au dépô e à la diffusion de documens scienifiques de niveau recherche, publiés ou non, émanan des éablissemens d enseignemen e de recherche français ou érangers, des laboraoires publics ou privés.

2 Minimum Cycle Time Analysis of Eherne-Based Real-Time Proocols J. Rober, J.-P. Georges, É. Rondeau, T. Divoux Jérémy Rober, Jean-Philippe Georges, Éric Rondeau, Thierry Divoux Universié de Lorraine, CRAN, UMR 7039, Campus Sciences, Vandœuvre-lès-Nancy Cedex, 54506, France CNRS, CRAN, UMR 7039, France Absrac The Eherne sandard is a sandard soluion for inerconnecing indusrial devices despie is inrinsic drawbacks, paricularly is nondeerminisic medium access mehod. Many Eherne-based commercial soluions available (COTS - Componens Off he Shelves) on he marke guaranee ime performance. This means ha user selecion of one paricular soluion is a criical decision, bu he choice ofen depends more on poliical sraegizing wih an indusrial device manufacurer han on he inrinsic performance of Eherne-based inerfaces. The objecive of his paper is o provide a formal behavioural analysis of each Eherne-based soluion, in order o faciliae comparison. We also consider he issue of synchronizaion of disribued nodes. Keywords: Real-ime sysems, performance analysis, embedded sysems. 1 Inroducion Fieldbuses inerconnecing indusrial equipmen are ypically designed by Programmable Logic Conroller (PLC) manufacurers. This is mainly aribuable o specific consrains on indusrial communicaion, which require a high degree of experise. Fieldbuses mus be robus in he noisy environmens produced by he plan (physical layer), deerminisic in guaraneeing daa refresh during conroller cycle periods (link layer), and capable of exchanging informaion beween all ypes of indusrial devices (applicaion layer). Manufacurers provide differen soluions o saisfy he firs wo consrains, wihou necessarily considering he final consrain o be relevan in business erms. This has resuled in he specificaion of a large number of fieldbus sandards as described in [1]. A new rend endorsed paricularly by he IAONA (Indusrial Auomaion Open Neworking Alliance) consorium was o promoe he Eherne nework as a sandard for indusrial communicaions. The expeced benefis are less cosly nework insallaions, because equipmen is available off-he-shelf, and he avoidance of ineroperabiliy problems, because Eherne echnology is broadly used. Oher advanages are ha Eherne is a well-known proocol, which is widely implemened, and is performance improves coninuously wih echnological evoluion (especially bandwidh). However, access o he Eherne medium relies on he nondeerminisic CSMA/CD algorihm, which applies a sochasic mehod o resolving collisions and canno guaranee ha message ransmissions will be received in bounded ime. Consequenly, he naive Eherne 1

3 proocol canno be direcly implemened in a plan wih severe ime consrains, and many Eherne-based soluions have been proposed o overcome his issue, as menioned in [, 3, 4]. However, if hese Eherne-based soluions are adaped o indusry requiremens, hey lead o wo ypes of problem. The firs is ha differen soluions are no ineroperable because differen fieldbuses are developed by each manufacurer. The second problem is ha ime performances are insufficienly evaluaed or compared. According o [5], differen Eherne producs can be summarily classified ino hree main caegories: he naive Eherne sandard (Eherne/IP, Modbus/TCP), Eherne soluions using he prioriies defined in IEEE80.1D/Q, and Eherne-based soluions ha incorporae new scheduling feaures in ASIC/FPGA (EherCAT, Profine IRT). The las approach enables he eliminaion of all collisions and simplifies ransmission ime esimaion, as described in [5, 6]. The auhors compared EherCAT wih Profine IRT in a simplified conex using analyic models. This analysis was improved and refined in secion and exended o wo oher well-known indusrial Eherne producs: he Modbus/TCP soluion and Eherne/IP. In secion 3, we presen several scenarios ha use he analyic models o faciliae assessmen of differen Eherne producs. Esimaion of minimum cycle ime.1 Inroducion The general objecive of his sudy was o compare he ime performance of he major indusrial Eherne producs available on he marke. This comparison could be achieved only in a common applicaion conex. Thus, he specificaion of he communicaion scenario was based on one conroller (for example, a PLC), inerconnecing sensors, and acuaors in an Eherne nework. The conroller was reaed as he communicaion maser ha iniiaed all dialogues wih slave nodes (sensors and acuaors). The conroller was characerized by is conroller cycle ime period, which was divided ino hree seps, as shown in Figure 1: - he sensor daa refresh ime, in he conroller memory, - he processing ime, and - he acuaor updae ime. Seps (1) and (3) represen communicaion periods, which should be less han he difference beween he conroller cycle ime period and he processing ime period. Thus, he ime performance of each Eherne produc was compared according o a consrain named minimum cycle ime, which was defined as: The minimum cycle ime was he communicaion ime required by he conroller o boh collec and updae he daa memories of all sensors and acuaors. inpu reading processing oupu wriing inpu reading... Figure 1: PLC cycle ime In he following secion, he analyic models of minimum cycle ime are elaboraed for EherCAT, Profine IRT, Modbus/TCP, and Eherne/IP. These models all used he following parameers: he ransmission delay, he nework device laency, he propagaion delay, he link capaciy, he payload, and he number of slaves. The noaions of hese are given in able 1. I was assumed ha here were no ransmission errors and ha he nework was dedicaed o he PLC applicaion and was no shared wih oher applicaions.

4 Terms Table 1: Noaions Noaion Unis Minimum cycle ime Γ s Delivery ime (from frame i) d i s Transmission delay τ s Nework device laency l s Propagaion delay δ s Link capaciy C bis/s Payload x byes Number of nework devices (slaves) n. EherCAT The EherCAT nework was developed by he Beckhoff company (ype 1 in sandard IEC 61158, [7, 8]). In heory, EherCAT cards are sandard Eherne inerfaces. In pracice, specific hardware (FPGA, Field-Programmable Gae Array, or ASIC, Applicaion-Specific Inegraed Circui) is used o miigae he frame forwarding delay. The EherCAT nework adds a maser/slave proocol over he Eherne. A frame is sen by he maser and slaves can read and wrie daa on he fly. The duraion of reading or wriing operaions corresponds only o he nework device laency l, which is independen of frame size and he same for all slaves. A logical ring is defined beween he slaves such ha when a frame reaches he las slave in he ring i is reurned o he maser via all he slaves. The space ime diagram shown in Figure illusraes he behaviour of EherCAT communicaions. conroller slave 1 slave slave 3 δ l τ communicaion cycle ime Figure : EherCAT space-ime diagram The EherCAT proocol can suppor boh line and ring opologies. Because he line opology is used mainly in he indusrial framework, his opology was invesigaed in our sudy(figure 3). conroller slave 1 slave slave n Figure 3: EherCAT line opology The EherCAT daagram is direcly encapsulaed inside he basic Eherne frame as shown in Figure 4. An EherCAT frame is composed of a header specifying he lengh of he frame and a lis of daagrams. The number of daagrams depends on he number of slaves. A daagram is 3

5 defined for each slave, and i conains he command ype and associaed daa Pre. DA SA ETEH DG 1... DG n CRC EherCAT elegram 10 x H daa Wc Pre: Preamble, SA/DA: Source/Desinaion Address, ET: Eherype EH: EherCAT Header, DG: Daagram, H: Header, Wc: Working couner Figure 4: EherCAT frame (field lenghs are given in byes) In his sudy, our analysis of EherCAT performance considered he following hypoheical es scenario: - he opology was a line, - he iniializaion sep was ignored and only cyclic communicaion was sudied, - he maser sen only one frame per cycle, and - he payload x was he same for each slave. The minimum cycle ime shown in Figure was deermined for his scenario. The link ransmission delay is he raio beween frame size and link capaciy C. The oal frame size can be divided ino wo pars: - a consan value ha equals he sum of he Eherne proocol (6 byes), he inerframe gap (corresponding o he ime of 1 byes), and he Eher- CAT header ( byes) and - a variable value ha depends on he slave number n, he amoun of daa o ranspor x, and he header (1 byes). The link ransmission delay is: τ = 8(40+max(44,n(1+x))). (1) C The erm 44 in he equaion (1) was added o ensure he minimum daa size defined by he Eherne proocol. If he EherCAT elegram lengh was less han 46 byes, an equivalen amoun of padding was insered in he Eherne frame. The EherCAT elegram already included a byes header, which mean ha here was no padding requiremen when he lengh of he daagram sequence was larger han 44 byes. As shown in Figure, he cycle ime was esimaed using he expression: Γ = (n 1)l+nδ +τ = (n 1)l+nδ + 8(40+max(44,n(1+x))). () C I should be noed ha () considers only one frame. Because he Eherne payload size depends direcly on he number of slaves and he Eherne frame size canno exceed 156 byes (and hereforehedaafield 1500 byes), () is only valid if henumberof devices inerconneced o he nework is less han: 1500 EH n n max =, 1+x whereehisheehercatheadersize(byes)andn max ishemaximumnumberofdaagrams, of lengh x, which can be included in a single frame (in he following, we have assumed ha x 1486 byes). In general, he number of slave devices on he nework can be greaer han he frame size capaciy. This means ha he conroller has o send more han one frame in a cycle ime. In 4

6 fac, he number of Eherne frames required o suppor n devices wih a consan payload x is given by: n k =. n max Consequenly, () now inegraes a differen ransmission ime for each frame and finally gives: Γ =(n 1)l+nδ + 8 ( ) 40k +(k 1)n max (1+x) C + 8 ) (44,(n (k 1)n C max max )(1+x) The final erm of expression(3) was used o differeniae cases where he las frame generaed padding. Similar resuls are given in [5] bu, in conras o his earlier work, expression (3): akes ino accoun he on he fly minimum cycle ime mechanism proposed by EherCAT; he main advanage of his is ha a device can begin frame forwarding before complee recepion of a frame (in conras o, e.g., sore-and-forward mode), which significanly reduces he forwarding ime as shown in Figure, considers he use of padding, as defined by Eherne, inegraes he ime required o forward he informaion sen from devices o he conroller, as shown in Figure, and considers cases where he number of slaves and heir payload requires he uilizaion of several frames. The accuracy of he EherCAT synchronizaion mechanism was repored in [9], which shows ha his issue need no be considered because i was esimaed as equal o a few nanoseconds..3 Profine IRT.3.1 Inroducion The Profine proocol was developed by he Siemens company(ype 10 in sandard IEC 61158, [7, 8]). Profine IRT manages real-ime communicaions. However, sandard Eherne cards canno be used because Profine IRT requires he operaion of specific hardware on slaves (ASIC ype or 4 pors inbuil swich). Profine IRT is based on he ime-slice mechanism, which specifies wo modes, he asynchronous mode and he isochronous mode The asynchronous and isochronous modes are used for unconsrained raffic and real-ime raffic, respecively. Our sudy deal only wih real-ime raffic. Thus, only he isochronous mode was analysed. For more informaion on hese wo modes, he reader can refer o [10]. In he isochronous mode, he maser sends one daa frame o each device and each device replies o he maser. Profine can suppor line, sar, and ring opologies. Only he line opology (see Figure 5), wih full-duplex links, was analysed in his sudy (as for EherCAT). In his sudy, he Profine IRT used he slipsreaming effec, where he conroller began by sending frames o he mos remoe slave in he line opology, and hen o he second remoe slave slave and so on, unil i reached he neares slave. This mechanism enabled a reducion in he cycle ime by minimizing he ransmission ime. The slipsreaming effec was also applied o exchanges from slaves o he conroller. The links were se up in full-duplex mode. The global communicaion scheme is given in Figure 6. (3) 5

7 conroller device 1 device device n Figure 5: Profine line opology conroller device 1 device device 3 l δ τ communicaion cycle ime Figure 6: Profine IRT space-ime diagram wih slipsreaming effec The space ime diagram shown in Figure 6 illusraes he opimum use of he Profine IRT proocol. Devices were assumed o be synchronized using a clock synchronizaion proocol, such as he IEEE 1588 sandard. The IEEE 1588 sandard generaes synchronizaion frames (PTP) beween devices, bu hese frames were no relevan o his sudy..3. Minimum cycle ime esimaion The slave devices periodically sen heir messages o he conroller a he same imes as messages were sen by he conroller o slaves. Only he posiive characerisics of he slipsream effec were considered. This required ha τ δ +l, as noed by [5]. In such cases, he minimum cycle ime was given by [5, 6] as he sum of: he laency l ha crosses all devices plus he propagaion delay δ for each link and and he link ransmission ime τ for each frame sen by he conroller. Hence, he minimum cycle ime is wrien as: Γ = δ +l+nτ. (4) Equaion (4) was developed by analysing he ransmission delay τ. The Profine daagram is encapsulaed in he Eherne frame as shown in Figure x 4 4 Pre. DA SA ET ID daa ST CRC Profine elegram Pre: Preamble, SA/DA: Source/Desinaion Address, ET: Eherype, ID: Idenifier, ST: Saus Figure 7: Profine IRT frame (field lenghs are given in byes) 6

8 Three fields are added o he Eherne frame: a daa idenifier ( byes), he daa value (wih he assumpion ha x 1494 byes), and an informaion saus (4 byes). When considering he consrain of he minimal Eherne frame size, he ransmission delay of a Profine frame was given by: τ = 8 38+max(46,6+x). (5) C The erm 38 in he equaion (5) corresponds o he size of he Eherne layer (6 byes) plus he inerframe gap (1 byes). As wih EherCAT, he erm 46 was added in order o ensure he minimum daa size as defined by he Eherne proocol. If he EherCAT elegram lengh was less han 46 byes, an equivalen amoun of padding was insered in he Eherne frame. The final form of equaion (4) was expressed as: Γ = δ +l+n 8 ( ) 38+max(46,6+x) C.3.3 Commens The EherCAT minimum cycle (3) was less han he Profine IRT one (4), because he Profine IRT ransmission delay was muliplied by he number of devices. The Profine IRT analysis assumed ha all devices had he same clock reference. Figure 6 shows ha all devices were synchronized because of he IEEE 1588 proocol. They shared he same clock and periodically sen heir messages a he same ime. Hence, i may be expeced ha clock synchronizaion errors will increase he minimum cycle ime. This paper aims only a comparing opimal performances of COTS Eherne-based proocols, i.e. Profine IRT nodes sharing he same clock reference. Nex sudies will hence aim a reporing his synchronizaion issue..4 Modbus/TCP Modbus is a serial communicaion proocol developed by Modicon in Modbus/TCP is a varian of he Modbus proocol (ype 15 in sandard IEC 61158, [7, 8]), which uses he Eherne physical and link layers [1]. Modbus/TCP encapsulaes a Modbus frame ino a TCP frame as shown in Figure 8. The Modbus daagram is composed of he ModBus Applicaion Proocol Header (MBAP), he funcion (read/wrie), and he daa value Pre. DA SA ET Ref. WcBc reques 0 IP 1 0 TCP 3Ref. Wc x daa 7 H 4 ModBus CRC Modbus/TCP elegram 3Bc reply Pre: Preamble, SA/DA: Source/Desinaion Address, ET: Eherype IP: Inerne Proocol, TCP: Transmission Conrol Proocol, H: header Ref.: Reference number, Wc: Word Couner, Bc: Bye Couner Ref. Wc Figure 8: General Modbus/TCP frame and funcion specific Modbus applicaion frame (field lenghs are given in byes) Modbus/TCP is a pragmaic approach ha works on several ypes of configuraions ha impac on is performance. Parameers, including opology, exchange managemen in he applicaion layer, and he processing capaciy of devices, change he Modbus/TCP ime behaviour. x daa 7

9 Modbus/TCP is based on connecion-oriened ransacions and i can use differen exchange models, such as maser/slaves, producer/consumer, or clien/server. The objecive of his sudy was o compare several Eherne producs, so i was necessary o use similar conexs for all Eherne producs. Because EherCa and Profine IRT were previously analysed using a maser/slaves model, his model was also used for Modbus/TCP evaluaion. The maser/slaves model also simplified he analysis because all he devices were synchronized by nework evens (none clock synchronizaion proocol is required). The communicaion scheme defined in his sudy followed hese seps. The maser sen a frame o one slave and when he slave received his frame, i sen a reply o he maser. When he maser received he reply, i repeaed he same procedure wih anoher slave. All he slaves were processed by he maser using a round-robin mehod. This communicaion scheme was implemened in he applicaion layer of he OSI model. The reques/reply proocol is shown in Figure 9. conroller req. #1 hub device 1 rep. #1 req. # rep. # device lδ τ communicaion cycle ime Figure 9: Modbus/TCP space-ime diagram Modbus/TCP no only suppors applicaion daa bu also TCP PDU, and i comprises opening and closing TCP connecions when acknowledging segmen recepion. The acknowledgmen can be achieved eiher immediaely a segmen is received, afer he recepion of several segmens, or inside he nex daa ransmission (piggybacking). In pracice, TCP behaviour changes according o he operaing sysem, he TCP configuraion, and wheher or no he Nagle algorihm is used. In his sudy, we assumed ha he imeou o send he acknowledgemen was 0.5 s, meaning ha only piggybacking was analysed, as shown in Figure 9. The ransien saes of he TCP opening and closing seps were no considered in he modelling. Modbus/TCP suppors line, sar, and ring opologies. Complex archiecures based on swiches can be used, especially when he nework is shared by several applicaions, alhough swiches induce addiional coss. However, because only he maser/slaves communicaion scheme was considered in his sudy, a bus infrasrucure was used I was assumed ha each device was inerconneced hrough a common hub, and he propagaion delay was equal o δ. Figure 9 shows ha he cycle ime was equal o he number of devices n muliplied by he ime required o poll one device. Given previous assumpions, his can be wrien as: Γ = n(τ req +τ rep +(δ +l)). (6) In he wors case, where a TCP acknowledgmen is sen for each segmen, he minimal cycle ime would be equal o:gamma = n(τ req +τ rep +3 (δ +l)+τ ack ) where τ ack = 67/C and 67 is he minimal size in bis for an Eherne frame (inerframe gap included). When he archiecure was composed of several hubs, he propagaion delay increased and (6) was slighly differen. The frame ransmission ime was composed of: 8

10 a consan par relaed o he sum of he Eherne proocol (38 byes wih he inerframe gap), he IP header(0 byes wihou opions), he TCP header(0 byes wihou opions), and he Modbus/TCP header (7 byes for he ModBus Applicaion Proocol Header), a variable par relaed o he ype of Modbus message, wih he size changing according o he ype of daa (funcion code) and he ransacion model sae (reques or reply).consequenly, he analysis of Modbus/TCP was only valid for an applicaion framework. In his sudy, we considered only wrie requess. a variable par proporional o he payload (because he bye coun field was sored as a single bye, his indicaes ha he dae field lengh was limied o x 55 byes). The sum of IP, TCP, and Modbus header sizes was larger han he minimal Eherne daa lengh. Thus, no added padding was required. The delay is direcly given by: τ req10h +τ rep10h = 8 91+x C +890 C such ha (6) corresponds o: ( Γ 10h = n x ) +(δ +l). (7) C.5 EherNe/IP.5.1 Inroducion EherNe/IP (IP, Indusrial Proocol) is a nework developed by Rockwell Auomaion in 001 and suppored by ODVA (Open DeviceNe Vendor Associaion) [13, 14]. EherNe/IP (ype in sandard IEC 61158, [7, 8]) uses he Common Indusrial Proocol (CIP) for off-he-shelf Eherne producs and TCP-UDP/IP sack. Eherne/IP is a connecion-based nework. A CIP connecion defines he ype of packe sen o he nework. There are wo ypes of connecions: he Explici Messaging connecion and he I/O(or Implici) connecion. Explici Messaging provides generic and muli-purpose communicaion pahs beween wo nodes, whereas I/O messaging is specific o applicaion I/O daa and provides serial purpose communicaion pahs. When he applicaion is ime-consrained, I/O Messaging is he preferred mode because i employs UDP raher han TCP sockes. CIP uses he producer/consumer model and requires broadcas exchanges encapsulaed in UDP. This sudy evaluaed only I/O connecions. Because EherNe/IP relies on COTS, no paricular opology was specified. Bus- or swichbased archiecures are boh possible. Swiches are ineresing because hey break he collision domain, allowing he suppor of VLAN and he classificaion of service mechanisms [15]. Swiched archiecures are recommended for exchange managemen wih ime-criical (implici) messaging. However, several swiched Eherne archiecures are possible. In his sudy, a linear swiched opology was seleced, as shown in Figure 10. This can be viewed as an exension of he experimenal se-up considered in [16], where he number of swiches varied according o he number of pors per swich. In conras o Modbus/TCP, uilizaion of a slipsreaming effec on Eherne/IP does no faciliae he use of a bus opology. Indeed, i is possible ha wo messages can be on he nework a he same ime (as shown in Figure 11). In order o compare he oher proocols wih Eherne/IP, a similar exchange scenario was proposed. The conroller sen a frame o each slave device and each slave device produced daa ha were sen o he conroller. Figure 11 shows his behaviour. 9

11 conroller device 1 device device n Figure 10: EherNe/IP swiched linear opology conroller swich A device 1 device swich B device 3 communicaion cycle ime Figure 11: EherNe/IP space-ime diagram for 4-pors swiches Iniially, EherNe/IP did no suppor medium access synchronizaion poins, as found in he maser/slaves echnique used in Modbus/TCP. This mean ha any device could access he nework a any ime. However, he ime synchronizaion mechanism can be used because of he suppor of EherNe/IP by he IEEE 1588 [17] proocol (implemened by he CIPSync profile). Consequenly, devices can send messages using he same clock reference. We used he slipsreaming effec for he conroller and a common deparure ime for he devices, as shown in Figure 11. Obviously, his profile corresponded o an ideal case relaed o he minimal cycle ime for his archiecure, because lock synchronizaion errors would lead o anoher profile inducing a longer cycle ime and he use of he slipsreaming effec requires (see Profine IRT) ha τ δ +l..5. Minimum cycle ime Considering he profile given in Figure 11, he minimum cycle ime corresponded o he sum of: - he laency l for crossing only one swich plus wice he propagaion delay δ, beween a conroller/device and a swich and - he link ransmission ime τ for each frame sen by he conroller. Thus, he minimum cycle ime can be wrien as: Γ = δ +l+nτ. (8) The erm given in (8) was valid only if τ δ + l, meaning ha swiches did no work in he sore-and-forward mode. The link ransmission ime was compued according o he encapsulaion forma of I/O messages Figure 1 shows ha 18 byes were added by he CIP proocol, 8 byes by UDP, 0 byes by IP, and finally 38 byes by Eherne. In his case, here was no padding. Thus, under he 10

12 8 6 6 Pre. DA SA ET 0 IP 8 UDP 4 EherNe/IP elegram CRC I T 4 ALConn. 4 Seq DTDL x daa Pre: Preamble, SA/DA: Source/Desinaion Address, ET: Eherype IP: Inerne Proocol, UDP: Uniform Daa Proocol I: Iem coun, T: Type ID, AL: Address Lengh, Conn.: Connecion ID Seq.: Sequence number, DT: Daa Type ID, DL: Daa Lengh Figure 1: EherNe/IP I/O messaging frame (field lenghs are given in byes) assumpion ha x 1454 byes, he link ransmission ime was given by: (8) can be modified as: τ = x. C Γ = δ +l+8n 84+x C. (9) The profile given in Figure 11 can be opimized if several iems (daa) are encapsulaed inside one frame, as specified in he CIP proocol. I induces a miigaion of he minimum cycle ime. Since we employed he same approach ha for Profine IRT (in paricular he slipsreaming effec), nex sudies will hence aim a reporing he synchronizaion effec on he minimum cycle ime. In he nex secion, he resuls obained for EherCAT, Profine IRT, Modbus/TCP, and EherNe/IP are compared in differen applicaion conexs. 3 Comparisons The objecive was o analyse and compare he behaviour of differen Eherne-based soluions. The opologies used in each assessmen were linear. Two bandwidhs were sudied: 100 Mb/s and 1 Gb/s. We analysed wo payload sizes inroduced by [6] as being represenaive of an indusrial conex: 16 byes and 100 byes. The nework device laencies l were defined in [5, 6] and hose used in our sudy are described in Table. I was assumed he performances of swiches used in EherNe/IP were he same as hose used by Profine IRT. Clearly, alernaive assumed values would yield differen resuls. Thus, he resuls for he sudy using EherNe/IP are only valid when τ δ + l. The link propagaion delay was 50 ns and corresponded o a disance of 10 m beween wo devices. The comparison is relaed o he minimum cycle ime wihou synchronizaion errors. Proocol Table : Laencies FasEherne (100 M b/s) GigaEherne (1 Gb/s) EherCa 1.35 µs 0.85 µs Profine IRT 3 µs 0.6 µs Modbus/TCP 1 µs (hub) EherNe/IP 3 µs 0.6 µs 13 show he minimum cycle imes (in ms), according o he number of slave devices wih a payload equal o 100 byes 11

13 Minimum cycle ime (ms) 1 x EherCAT 100 Mb/s EherCAT 1 Gb/s Profine IRT 100 Mb/s Profine IRT 1 Gb/s Modbus TCP 100 Mb/s Modbus TCP 1 Gb/s EherNe IP 100 Mb/s EherNe IP 1 Gb/s Number of devices Figure 13: Minimum cycle ime as a funcion of he number of devices wih a consan payload of 100 byes per device and wo bi raes of 100 Mb/s and 1 Gb/s The firs observaion was ha Modbus/TCP provided he wors resuls, whaever he payload. This was because of is medium access mechanism, which is based on polling a he applicaion level. In he case of a small payload, EherCa provided he bes resuls in he FasEherne mode. The impac of bandwidh on Profine IRT and Eherne/IP was very significan, because i enabled a reducion in he minimum cycle ime. This benefi was lower wih EherCa. The explanaion is simple: EherCa sends only one frame for communicaing wih all is slaves and so EherCa provides only one link per ransmission. In conras, Profine IRT and Eherne/IP sen n frames o dialogue wih n slaves, which provides n imes he link ransmission. The bandwidh was he mos crucial parameer in reducing he ime cycle. Moreover, n laencies mus be considered wih EherCa because Profine and EherNe/IP cycle imes were composed of only one swich laency l, because of he slipsreaming effec. Profine IRT provided he bes resuls a 1 Gb/s. Figure 13 shows ha all he Eherne soluions, wih he excepion of FasEherne Modbus/TCP, could inerconnec wih more han 60 slaves in cycle imes of less han 1 ms. This cycle ime consrain, and he number of slaves and he frame size, enables adequae coverage for mos indusrial applicaions. Performances were similar when he payload was increased. The only difference was ha he EherCa minimal cycle ime was larger han Profine when he number of devices was increased. This was because he EherCa elegram had o be fragmened, which decreased proocol performance. An increase in frame size means ha he choice of he FasEherne soluions mus be carefully considered because he cycle ime grows quickly. The GigaEherne soluion eliminaed his problem. 4 Conclusion This sudy analysed he ime performance of Indusrial Eherne proocols. The general conclusion was ha all Eherne proocols perform suiably wih a bandwidh of 1 Gb/s for in- 1

14 erconneced real-ime sysems. A 100 Mb/s, special aenion is required by engineers in he selecion of Eherne-based proocols. Oher consideraions have o be aken ino accoun in he selecion of Eherne-based producs, including persisence in he marke and ineroperabiliy wih oher indusrial equipmen and nework. Regarding ineroperabiliy concerns, Eherne/IP is a sandardized soluion and provides accepable performance for conrolling indusrial sysems. Eherne/IP can also implemen prioriy mechanisms (IEEE 80.1p), which is imporan when a nework is shared wih oher applicaions because his faciliy enables he differeniaion of nework services offered by real-ime raffic and unconsrained raffic. Fuure works are relaed o he clock synchronizaion issue, especially for soluions based on he slipsreaming effec. The objecive is o deal wih non opimal siuaions for Profine IRT and Eherne/IP where synchronizaion errors appear. References [1] M. Felser, T. Sauer, The fieldbus war: Hisory or shor break beween bales?, 4h IEEE Inernaional Workshop on Facory Communicaion Sysems, pp.73-80, 00. [] M.Alves, E.Tovar, and F.Vasques, Eherne goes real-ime: a survey on research and echnological developmens, Technical Repor HURRAY-TR-K01, IPP-HURRAY, Polyechnic Insiue of Poro (ISEP-IPP), 000. [3] J.-D. Decoignie, A perspecive on eherne-cp/ip as a fieldbus, 4h IFAC Inernaional Conference on Fieldbus Sysems and heir Applicaions, pp , 001. [4] J.-D. Decoignie, Eherne-based real-ime and indusrial communicaions, Proceedings of he IEEE, 93(6): , 005. [5] J.Jasperneie, M.Schumacher, K.Weber, Limis of increasing he performance of indusrial eherne proocols, 1h IEEE Conference on Emerging Technologies and Facory Auomaion, pp.17-4, 007. [6] G.Pryz, A performance analysis of eherca and profine ir, 13h IEEE Conference on Emerging Technologies and Facory Auomaion, pp , 008. [7] IEC, Digial daa communicaions for measuremen and conrol? fieldbus for use in indusrial conrol sysems: Par 3: Daa link service definiion, IEC Sandard 61158, Par 3, 006. [8] IEC, Digial daa communicaions for measuremen and conrol? fieldbus for use in indusrial conrol sysems: Par 4: Daa link proocol specificaion, IEC Sandard 61158, Par 4, 006. [9] G. Cena, I C. Berloi, S. Scanzio, On he accuracy of he disribued clock mechanism in eherca, 4h IEEE Inernaional Workshop on Facory Communicaion Sysems, pp.43-5, 010. [10] J.Jasperneie, E.Elsayed, Invesigaions on a disribued ime-riggered eherne realime proocol used by profine, 3rd Inernaional Workshop on Real-Time Neworks, 004. [11] The Modbus Organizaion. Modbus. [1] Modbus-IDA, Modbus applicaion proocol specificaion v1.1b,

15 [13] P.Brooks, Eherne/IP-indusrial proocol, 8h IEEE Inernaional Conference on Emerging Technologies and Facory Auomaion, Vol., pp , 001. [14] V.Schiffer, The common indusrial proocol(cip) and he family of CIP neworks, Technical Repor PUB0013R0, Open DeviceNe Vendor Associaion, Inc. (ODVA), 006. [15] A.Modlovansky, Uilizaion of modern swiching echnology in eherne/ip neworks, 1s Inernaional Workshop on Real-Time LANs in he Inerne Age, pp.35-37, 00. [16] E.Alessandria, L.Seno, S.Viuri, Performance analysis of eherne/ip neworks, 7h IFAC Inernaional Conference on Fieldbuses and Neworks in Indusrial and Embedded Sysems, Vol.7, 007. [17] IEEE Compuer Sociey, IEEE sandard for a precision clock synchronizaion proocol for neworked measuremen and conrol sysems, ANSI/IEEE sandard ,

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