UML for Embedded Systems IV. Validation

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1 UML for Embedded Systems IV. Validation Ludovic Apvrille Eurecom, Office 470 Memo on Methodology III. Detailed design Behavior of the system IV. Validation of the system Simulation Code generation II. Design Classes of the system Architecture of the system I. Analysis Use case First class diagram Relevant scenarios slide 2 Page 1

2 Validation Stage Purpose Check that the behavior of the system corresponds to the targeted one Steps Simulation - Validation of the modeling as soon as possible - Modeling made at analysis stage and design stages are compared - Use case diagrams, sequence diagrams vs. class diagrams, composite structure diagrams and state machine diagrams Implementation - Automatic code generation C, C++, Java, Ada - Class diagrams, composite structure diagrams and state machine diagrams slide 3 Validation Code generation Simulation slide 4 Page 2

3 Basics of Code Generation Provided by the UML toolkit Class Libraries Composite Structure Code generator Compiler Linker State Machine s C, C++, Java files Executable file (Windows, VxWorks, etc.) slide 5 How Do Code Generators Work? Class Composite Structure State Machine s 1st step Code skeleton 2nd step Code skeleton + code for communication structure (implementation of message mailboxes and interconnection between 3rd step classes outputs and mailboxes) Behavior of classes is generated: message sending and receiving, loop structures, etc. slide 6 Page 3

4 Classifying Code Generators Easy-of-use Readability of generated code Debug ability of generated code Mapping between UML modeling and generated code - Code generation should avoid using complex macros, etc. Ability to pilot the generated code from external applications - Graphical interface, etc. Customization of code generator slide 7 Customizing Code Generation Same UML Design 2-step code generation (1) Generation of an intermediate code for example, call to function like createthread() PowerPC 603e DSP Other (2) Mapping from generic functions to functions supported by the target createthread() -> spawntask() on VxWorks slide 8 Page 4

5 Customizing Code Generation (Cont.) 1st step Memory allocations - dynamic - static Use of threads / Processes Default stack memory allocated to threads Etc. 2nd step Port for various OS / targets slide 9 Debugging UML Designs (1) UML Design (6) Modification of the UML Design (5) Analysis of generated code to find the bugs (2) Code generator + compiler (4) Debug traces (BDM / JTAG) (3) Download on target + execution slide 10 Page 5

6 Validation Code generation Simulation slide 11 Simulation with Model Animation General idea The UML toolkit generates code for local platform - It makes it possible to validate functions before the hardware platform is available The UML toolkit executes this code and gathers information about its execution It accordingly animates UML modeling - Draws sequence diagrams -> traces of execution - Shows in which state are each objects State machine diagrams Possibility to manually send signals to custom the simulation slide 12 Page 6

7 Simulation with Model Animation: Process Class Libraries Libraries for diagram animation Composite Structure Code generator Compiler Linker State Machine s C, C++, Java files Executable file (Windows, VxWorks, etc.) slide 13 Debugging with Simulation (1) UML Design (6) Modification of the UML Design (5) Animation of diagrams and generation of sequence diagrams. The engineer can perform step by step execution, etc. (2) Code generator + compiler (4) Traces intercepted by the toolkit (3) Local execution slide 14 Page 7

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