S12 MagniV Mixed-Signal Microcontrollers Overview

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1 S12 MagniV Mixed-Signal Microcontrollers Overview Mixed-signal MCUs for motor & CAN/LIN 천광수과장 J U N TM External Use

2 Agenda Overview Products details S12VR S12ZVM S12ZVL S12ZVC S12ZVH External Use 1

3 Overview External Use 2

4 S12 MagniV Benefits S12 MagniV portfolio solutions deliver optimal system cost and physical footprint for sensor and actuator applications. Reduced PCB Space Up to 30% Improved manufacturing efficiency Replacing three ICs with one S12 MagniV mixed-signal MCU reduces assembly and test cost while quality improves Reduced Bill Of Material (BOM) Fewer components to purchase, handle, store and qualify Simplified motor control that speeds up time-to-market Save up to six months on development, validation and ISO implementation Abstract the complexity of 3-phase motor control software development Production ready automotive quality software and tools SafeAssure program External Use 3

5 A Technology Sweet Spot for Sensor and Actuators Digital Logic S12, PWMs, Timers, SRAM, SPI, SCI, GPIO, Watchdogs, etc. Non-Volatile Memory Flash, High-Voltage Analog Low-Side & High- Side Drivers, Voltage Regulator LIN/CAN Phy. etc. Existing Low Leakage 180 nm CMOS+NVM 40 V UHV Devices External Use 4

6 S12 MagniV Portfolio: Integration Beyond the MCU Our S12 MagniV portfolio simplifies system design with the integration of highvoltage analog features onto MCUs for automotive applications MM912/S12VR Window Lift S12ZVM BLDC Motor Control S12ZVC Small CAN Nodes S12ZVL LIN Nodes MM912_S812 S12ZVL S12VR S12ZVC Reduced PCB space Reduced Bill of Material MM912_S812 Improved manufacturing efficiency Simplified development External Use 5

7 External Use 6

8 S12 CPU with an integrated voltage regulator, LIN physical layer and high-side / low-side drivers for relay driven window lift motor External Use 7

9 S12VR Key Details Features Digital MCU Core and Memories 5V Analogue High-Voltage 2 UARTs One linked to LIN Phy, 2 nd as reardoor communication or indep. test Interface SPI As alternative test Interf. Up to 16 Wakeup pins Combined with Analog Input pins and HV pins 4ch 16bit Timer Hall inputs, SW timing 8ch PWM Routable to HS and LS outputs, for LED dimming External Supply 5V / 20mA switchable for local (same PCB), over current protected. Eg. supplying Hallsensors LIN Physical Layer LIN2.2 and SAE J2602 compliant +/- 8kV ESD capability G P I O LIN -PHY SCI 1 SCI 0 SPI BDM KWU Win Wdog TIM 16b 4ch PWM 8ch 8b or 4ch 16b 1# EVDD 4 High Voltage Inputs 12V Inputs for Switch Monitoring Routable to ADC S12 CPU 16-bit, compatible with S12G Family and existing SiP Solutions. RCosc. +/-1.3% 48-64kB Flash 512B 4 HV Inputs Pierce Osc. PLL S12 25MHz Bus 2 kb RAM VSENSE (battery) 4 byte eraseable 100k program/ erase cycles On chip RC OSC factorytrimmed to +/- 1.3%, meets LIN -needs Temp Sense 10-Bit ADC 2 HS Drivers 2 Low Side Drivers VREG 70mA VSUP sense Flash (48/64kB) 512B erasable, 10k p/e cycles Can be used for Data (parameter, config, calibr.) ADC - up to 6 ext. Ch. +4 int. channels for temp sense, supply monitors, HV inputs, internal ref Voltages Up to 2 HS drivers For LED and Switch supply 2 Low-Side Drivers Protected LS Drivers to drive relays directly Voltage Regulator 5V/70mA for the whole system Supply- and Batterysensing Voltage sense before (VSENSE) and after protection diode (VSUP) Packaging Options 32LQFP and 48LQFP External Use 8

10 VDDA VDDX LIN LGND VSUP VSENSE Window Lift with S12VR LIN Digital MCU Core and Memories Vbat 5V Analogue High-Voltage Switches Indicator LED Debug & Programming Connector Altern. SPI&UART Based Test Connector HVI0 HVI1 HVI2 HVI3 HS1 HS0 HVI High- Side BDM SCI1 SPI LIN PHY SCI0 S12 RAM IRC Temp Sense Win W dog VReg Flash PLL ADC 10-bit PWM 8 ch. KWU Low Side Relay Driver EVDD TIM 5 V input 5 V input LS1 LSGND LS0 EVDD IOC IOC Hallout Hall Sensor M Pinout representing functionality, physical pins location is not correct External Use 9

11 S12VR Package & Feature Options Product Name S12VR Package 32LQFP / QFN 32LQFP 48-LQFP Flash Memory 32 or 16kB 64/48kB 64/48kB 128B 512B 512B RAM 2kB 2kB 2kB High Side Drivers Low Side Drivers HV Inputs Sensor Supply (EVDD) A/D ext. Channels 2 (+2HVIs) 2 (+4HVIs) 6 (+4HVIs) PWM channels 8 x 8-bit (4x16-bit) 8 x 8-bit (4x16-bit) 8 x 8-bit (4x16-bit) Timer Channels 4 x 16 Bit 4 x 16 Bit 4 x 16 Bit SCI modules SPI modules Max. 5V GPIOs Interrupt/Wakeup Inputs Package Body Size 7x7mm 2 / 5x5mm 2 7x7mm 2 7x7mm 2 Pin Pitch 0.8mm / 0.5mm 0.8mm 0.5mm 32 LQFP 32 QFN 32 LQFP 48 LQFP External Use 10

12 16bit MCU with 12/5V voltage regulator, LIN physical layer, and MOSFET predrivers for DC, BLDC and PMSM motors External Use 11

13 S12ZVML (LIN Version) Details Key Features Digital MCU Core and Memories 5V Analogue High-Voltage 2x UARTs One linked to LIN Phy, 2 nd as independant Test Intf. SPI As alternative test Interf or for peripherals (sensors, ) MSCAN 2.0A/B CAN Controller Up to 18 Wakeup pins Combined with Analog Input pins 4ch 16bit Timer Hall Inputs, SW timing 6-ch PMF 15bit PWM for motor control with dead time, fault mgmt External Supply 5V / 20mA switchable for local (same PCB), over current protected. Eg. supplying Hallsensors LIN Physical Layer LIN2.2 and SAE J2602 compliant +/- 8kV ESD capability G P I O SCI 1 SPI External Use 12 LIN-PHY BDM BDC TIM 16b 4ch 6ch PMF (PWM) EVDD SCI 0 MSCAN KWU Win Wdog PTU Enables synchronization between PMF and ADC 2ch PTU AEC-Q100 Grade 0 Qual ed up to 150 C Ta S12Z CPU 16-bit, 32-bit MAC, linear addressing Harvard architech compatible within S12 MagniV RCosc. +/-1.3% S12Z 50MHz Bus KB Flash 512B Pierce Osc. PLL 4-8kB RAM Current Sense (2 x Op-Amp) Flash (32/64/128kB) 512B erasable. 10K p/e cycles. Can be used for Data Temp Sense VREG On chip RC OSC factorytrimmed to +/- 1.3%, meets LIN -needs 2 x 12-Bit LADC 3x Phase Comparators GDU 6ch MOS-FET-Predriver Charge Pump VSUP sense 70mA total supply 4 byte eraseable, 100K program / erase cycles Packaging Option 64LQFP-EP 2 x 12-bit list based ADC Simultaneous measurement 5+4ch external. Plus 8ch int (temp sence, GDU phase, Ref voltages) with DMA 3x Phase Comparators for BEMF zero crossing detection in sensorless BLDC 6-ch GDU Low side and high side FET pre-drivers for each phase with nC total gate Charge Charge Pump To support reverse battery protection and boostrap assist for 100% duty-cycle Vsup sense Monitoring supply voltage Voltage Regulator 5V/70mA for whole system 2x Op-Amp for current measurement / sensing

14 S12ZVMC (CAN Version kB) Key Details Features Digital MCU Core and Memories 5V Analogue High-Voltage 2x UARTs As independant Test Intf. SPI As alternative test Interf or for peripherals (sensors, ) MSCAN 2.0A/B CAN Controller Up to 18 Wakeup pins Combined with Analog Input pins 4ch 16bit Timer Hall Inputs, SW timing 6-ch PMF 15bit PWM for motor control with dead time, fault mgmt External Supply 5V / 20mA switchable for local (same PCB), over current protected. Eg. supplying Hallsensors 2nd 5V Vreg For supplying an external CAN- PHY independant from main VREG G P I O SCI 1 SPI External Use 13 5V VREG BDM BDC TIM 16b 4ch 6ch PMF (PWM) EVDD SCI 0 MSCAN KWU Win Wdog PTU Enables synchronization between PMF and ADC 2ch PTU AEC-Q100 Grade 0 Qual ed up to 150 C Ta S12Z CPU 16-bit, 32-bit MAC, linear addressing Harvard architech compatible within S12 MagniV RCosc. +/-1.3% S12Z 50MHz Bus KB Flash 512B Pierce Osc. PLL 4-8kB RAM Current Sense (2 x Op-Amp) Flash (64/128kB) 512B erasable. 10K p/e cycles. Can be used for Data Temp Sense VREG On chip RC OSC factorytrimmed to +/- 1.3% 2 x 12-Bit LADC 3x Phase Comparators GDU 6ch MOS-FET-Predriver Charge Pump VSUP sense 70mA total supply 4 byte eraseable, 100K program / erase cycles Packaging Option 64LQFP-EP 2 x 12-bit list based ADC Simultaneous measurement 5+4ch external. Plus 8ch int (temp sence, GDU phase, Ref voltages) with DMA 3x Phase Comparators for BEMF zero crossing detection in sensorless BLDC 6-ch GDU Low side and high side FET pre-drivers for each phase with nC total gate Charge Charge Pump To support reverse battery protection and boostrap assist for 100% duty-cycle Vsup sense Monitoring supply voltage Voltage Regulator 5V/70mA for whole system 2x Op-Amp for current measurement / sensing

15 VDDX BCTL LIN LINGND VSUP AMP0 AMPM0 BST AMPP0 EVDD AMP1 5V Sensor supply AMPM1 AMPP1 S12ZVML Application Schematic Reverse protection VBAT Optional Bypass option Boost option CP option IO/IOC Hallout AN0_x AN1_x AMRcos Ext Osc G P I O IRC BDM Wdog SPI SCI SCI PLL KWU RTI TIM 4ch/16b MSCAN Dual 12bit ADC 5+4ch. Ext. (Mux d with Op-Amps) + 8ch. Int. S12Z core 128 kb Flash 8 kb RAM 512Bytes PTU PMF 6-ch PWM Voltage regulators 5V VDDX, 5V CAN supply Boost mode EVDD sensor 11V VLS Temp Sense LIN Physical Interface GDU 3 phase Bridge Predriver Current Sense (2 x Op-Amp) Charge Pump VCP CP VLSOUT VLSx VBS0 VBS1 VBS2 HD HG0 HG1 HG2 HS0 HS1 HS2 LG0 LG1 LG2 LS0 LS1 LS2 EVDD AMRsin AMRcos Hallout AMR/ GMR/ Hall Sensor M AMRsin Shunt1 LIN / HV Phy Shunt0 External Use 14

16 Gate Driver Unit (GDU) 11V LDO supplies the LS drivers charges bootstrap cap for the HS drivers Voltage Monitoring HD High Voltage typ. 21/27.3 V VLS Low Voltage trip point: V 11V LDO + V ref - Charge Pump Charge Pump Supplies HS Gate Drive Supports 100% duty cycle Integrated Dividers HD: divider 12 ; HS : divider 6 Phase Comparators Compares HS against DCbus/2 in HW Phase Multiplexer Switched in each sector Slew Rate Control Output current limitation of Iout via selectable Iref 8 selectable slew rates External Use 15 Drive Strength Typ nC Gate Driver ADC INT INT ADC HD Div & Monitor Phase Comp Phase Mux Typ. 6.3 Ohm Switch on Typ. 16 Ohm Switch off Pull-Down Resistor 80 kohm pull down integrated HS Topology Bootstrap for HS Gate supply Max. PWM Frequency Min driver pulse width = 2µs HG / HS /LG /LS Max. rating: V

17 S12ZVM Family Feature Set Summary Connectivity CAN LIN CAN LIN CAN LIN PWM Product Name VMC256 VML128 VMC128 VML64 VMC64 VML32 VML31 VML31 VM32 VM16 Package 80LQFP- EP 64LQFP- EP 64LQFP- EP 64LQFP- EP 64LQFP- EP 64LQFP- EP 64LQFP- EP 48LQFP- EP 64LQFP- EP 48LQFP- EP 64LQFP- EP (bytes) 1 K PHY CAN LIN 0 LIN 0 LIN LIN LIN HV HV HV HV Separate VREG GDU (HS / LS) 3/3 3/3 3/3 3/3 3/3 3/3 3/3 3/3 3/3 3/3 3/3 3/3 Bootstrap Diodes Op Amp ADC (ext. channels) MSCAN SCI SPI TIM (IC/OC channels) PWM channels LQFP- EP Internal timers RTI+API RTI+API RTI+API RTI+API RTI+API RTI+API RTI+API RTI+API RTI+API RTI+API RTI+API RTI+API External FET Nominal Total Gate Charge (nc) Package Size mm x 12 mm 10 mm x 10 mm 10 mm x 10 mm 10 mm x 10 mm 10 mm x 10 mm 10 mm x 10 mm 10 mm x 10 mm 7 mm x 7 mm 10 mm x 10 mm 7 mm x 7 mm 10 mm x 10 mm 7 mm x 7 mm Samples availability H Now Now Now Now Now Now Q Now Q Now Q Production release H Q Q Q Q Q Q Q Q Q Q Q External Use 16

18 General Purpose S12 MagniV 16bit MCU with 12/5V voltage regulator, LIN-physical layer External Use 17

19 Target Applications LIN-Sensors LIN-switch panels LIN-Actuator Product Function Hooking up sensors into automotive LIN-Network (with signal preconditioning) Market Requirements LIN-PHY, 12V-Vreg, MCU Small formfactor (QFN) ADC, SPI Product Function Reading multiple switchpositions and feeding into LIN-network Market Requirements LIN-PHY, 12V-Vreg, MCU Multiple GPIOs ADC Product Function Converting LINcommand into an activity (eg driving LEDs) Market Requirements LIN-PHY, 12V-Vreg, MCU Drivers (3x25mA drive strength in case of RGB- LED) ADC External Use 18

20 S12ZVL64/96/128 (VL128) Key Details Features Digital MCU Core and Memories 5V Analogue High-Voltage 2 UARTs One linked to LIN Phy, 2 nd as independant Test Intf. MSCAN Eg. CAN/LIN-gateway SPI, IIC - Serial link to other Ics (sensors, ASICs) or indep. test Interface Up to 23 Wakeup pins Combined with Analog Input pins and HV pins 2 Timer modules 8ch / 16Bit + 4ch / 16 Bit 8ch 16Bit PWM Eg. LED-dimming NGPIO (PP1/3/5) 1-3# 5V / 25mA sink Eg. for RGB-LED External Supply 5V or 3.3V / 20mA switchable for local (same PCB), over current protected. Eg. Sensor supply LIN Physical Layer LIN2.2 and SAE J2602 compliant +/- 8kV ESD capability G P I O LIN-PHY MS CAN SPI BDM BDC TIM 16b 8+4ch 1# EVDD 2x SCI IIC KWU Win Wdog PWM 8ch 8b or 4ch 16b 1-3# NGPIO High Voltage Input 12V Input for Switch Monitoring Routable to ADC S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV RCosc. +/-1.3% S12Z 32MHz Bus 128KB Flash 2KB Pierce Osc. 1 HV Input PLL 8kB RAM 4 byte eraseable 100k program/ erase cycles Temp Sense 1ch ACMP On chip RC OSC factorytrimmed to +/- 1.3%, meets LIN -needs 8-bit DAC + OpAmp 12-Bit LADC PGA (20/40/80x) VREG VSUP sense 70, or up to 170mA with ext. Ballast Flash (64-128k) 512B erasable 10k p/e cycles Can be used for Data (parameter, config, calibr.) 12Bit list based ADC up to 10 ext. Ch.+7 int. Ch (temp sense, supply mon., HVI, int. Ref. Voltages) Executes command list & write result directly to RAM (DMA) Analog Comparator With rail to rail input; fast reaction to analog values Digital/Analog Converter Inc. Op-Amp. Feed ACMP Programable Gain Amp. measuring few mv-signals Voltage Regulator 5V or 3.3V 70mA total supply (up to 170mA with ext. ballast for more current and lower power dissipation) Supply sensing Monitoring supply voltage (sense after protection) Packaging Options 32-LQFP and 48-LQFP 32-QFN 5x5mm External Use 19

21 VL128/96/64 Comparison Memory UHV Analog Comms Tim I/O 48-LQFP 32-LQFP 32-QFN S12ZVLA S12ZVL S12ZVLA S12ZVL S12ZVLA Flash [kb] [kb] RAM [kb] V reg 5V / 3.3V ; 70mA or up to 170 (with ballast option / BCTL) V reg tolerance 2% 3% 2% 3% 2% PHY LIN HVI 1 ADC (LB) channel ADC (LB) resolution 12 Bit 10 Bit 12 Bit 10 Bit 12 Bit ACMP with 8Bit DAC PGA PGA levels 10/20/40/80x - 10/20/40/80x - 10/20/40/80x SCI 2 SPI 1 IIC 1 MSCAN Timer (8+4ch on 8ch + 4ch (16 8ch + 4ch (16 Bit) 8ch + 4ch (16 Bit) silicon) Bit) PWM 8ch (16Bit) GPIO intrr. Cap. IO (5/12V) 22/1 16/1 16/1 evdd (5V/20mA) 1 N-GPIOs (5V / 25mA) Temperature options V / M External Use 20

22 Product Name S12ZVL S12ZVLS Package 48-LQFP 32-LQFP 32-QFN Flash memory 32 / 16 / 8 kb 32 / 16 kb 128B RAM 1kB SCI / SPI / IIC 2 / 1 / 1 LIN-PHY 1 HVI 1 V reg 12V/70mA; extendable to 170mA with ext. Ballast Timer 6ch + 2ch (16 Bit) PWM 8ch 8 Bit (or 4ch 16Bit) ADC 10ch 10Bit 6ch 10Bit evdd (5V/20mA) 1ch (source) N-GPIOs (5V / 25mA) 3ch (sink) 1ch (sink) 3ch (sink) Temperature options C / V / M External Use 21

23 S12ZVL for Sensor Applications Digital MCU Core and Memories 5V Analogue High-Voltage LIN Bus G P I O LIN-PHY SCI 1 SCI 0 SPI BDM BDC TIM 16b 6+2ch 1# EVDD IIC KWU Win Wdog PWM 8ch 8b or 4ch 16b 1-3# NGPIO RCosc. +/-1.3% S12Z 32MHz Bus 8-32KB Flash 128B Pierce Osc. HV Input PLL 1kB RAM Temp Sense LADC VREG VSUP sense 70, or up to 170mA with ext. Ballast Rain / Light Sensor ASIC Automotive Voltage 5V Supply /technology_guide/articles/rain_sensor.html External Use 22

24 General Purpose S12 MagniV 16bit MCU with 12/5V voltage regulator, CAN-physical layer External Use 23

25 S12ZVCA (Hearst-fully featured) key Details features Digital MCU Core and Memories 5V Analogue High-Voltage MS-CAN 2.0A/B linked to CAN Phy SENT (tx) Sent Transmitter Module 2SCI, 2SPI, IIC Interfacing to other Ics (Sensors, ASICs), or for debugging, programming Up to 34 Wakeup pins Combined with Analog Input pins and HV pins 4ch+4ch 16Bit PWMs 16ns / 64MHz resolution for ultrasonic signals 4ch+8ch 16Bit Timers 16ns / 64MHz resolution for ultrasonic signals NGPIO (PP1/4/5/6) 4# 5V/25mA sink; Eg. LED External Supply 5V/20mA switch-able for local (same PCB), over current protected. Eg. Sensor supply CAN Physical Layer (HighSpeed) Supporting dominant Txd timeout G P I O CAN-PHY 2 x SCI MSCAN 2x SPI BDM BDC HR-PWM 4ch16b HR-Tim 4ch16b 1# EVDD IIC Sent tx KWU Win Wdog 2 High Voltage Inputs 12V Inputs for Switch Monitoring Routable to ADC PWM 4ch16b Tim 8ch16b 4# NGPIO S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV RCosc. +/-1.3% S12Z 32MHz Bus kB Flash 1-2kB Pierce Osc. 2 HV Input PLL 4-12kB RAM 4 byte eraseable 100k program/ erase cycles On chip RC OSC factory-trimmed to +/- 1.3% Temp Sense 12-Bit LADC 2ch 2ch ACMP + With ACMP 1x6-Bit-DAC - 8-bit DAC + OpAmp + - VREG for CAN PHY with ext. ballast VREG VSUP sense 70, or up to 170mA with ext. Ballast Flash (64-192k) 512B erasable 10k p/e cycles Can be used for Data (parameter, config, calibr.) 12Bit list based ADC up to 16 ext. Ch. (+8ch int for temp sense, supply mon., HVI, int. Ref. Voltages) Executes command list & write result directly to RAM 2# Analog Comparator With rail to rail input; fast reaction to analog values Digital/Analog Converter Inc. Op-Amp. Eg. feed ACMP 2nd Voltage Regulator For CAN-Phy-supply Voltage Regulator 5V/70mA total supply (up to 170mA with ext. ballast for more current and lower power dissipation) Supply sensing Monitoring supply voltage (sense after protection) Packaging Options 48-LQFP (Grade1) 64-LQFP-EP (Grade 0) External Use 24

26 S12ZVC Family Differences in Feature Set Product Name S12ZVCAx (fully featured) S12ZVCx (reduced feature set) Package 64-LQFP-EP 48-LQFP 64-LQFP-EP 48-LQFP Flash memory 192 / 128 / 96kB 64kB 192 / 128 / 96kB 64kB 192 / 128 / 96kB 64kB 192 / 128 / 96kB 64kB 2kB 1kB 2kB 1kB 2kB 1kB 2kB 1kB RAM 12kB 4kB 12kB 4kB 12kB 4kB 12kB 4kB CAN / SCI / SPI / IIC 1/2/2/1 1/2/2/1 1/1/1/1 1/1/1/1 1/2/2/1 1/2/2/1 1/1/1/1 1/1/1/1 SENT (Tx) Bit Timer (16ns) 4ch 4ch 4ch 4ch 4ch 4ch 4ch 4ch 16Bit Timer (std.) 8ch 8ch 4ch 4ch 8ch 8ch 4ch 4ch 16Bit PWM (16ns) 4ch 4ch 3ch 3ch 4ch 4ch 3ch 3ch 16Bit PWM (std.) 4ch 4ch 4ch 4ch 4ch 4ch 4ch 4ch LADC 16c/12b 16c/12b 10c/12b 10c/12b 16c/10b 16c/10b 10c/10b 10c/10b ACMP 5V (rail to rail) DAC (8Bit) External Use 25

27 S12ZVC for Sensors in Powertrain Urea-Sensor Hydrocarbon- Sensor CAN BUS G P I O CAN-PHY 2 x SCI MSCAN 2x SPI BDM BDC HR-PWM 4ch16b HR-Tim 4ch16b 1# EVDD IIC Sent tx KWU Win Wdog PWM 4ch16b Tim 8ch16b 4# NGPIO RCosc. +/-1.3% S12Z 32MHz Bus kB Flash 1-2kB Pierce Osc. 2 HV Input PLL 4-12kB RAM Temp Sense 12-Bit LADC 2ch 2ch ACMP + With ACMP 1x6-Bit-DAC - 8-bit DAC + OpAmp + - VREG for CAN PHY with ext. ballast VREG VSUP sense 70, or up to 170mA with ext. Ballast Hi-temp Sensor NOX- Sensor Particle Sensor Humidity/Air Mass Battery Voltage 3.5 to 40V 5V Sensor Supply S12ZVC benefits: Limited PCB-space ASIL-requirements High resolution timers and DMA enabled LADC On-chip analog comparator and DAC EVDD 5V switchable sensor supply External Use 26

28 S12ZVC for Seatbelt Pre-pretentioner CAN BUS G P I O CAN-PHY 2 x SCI MSCAN 2x SPI BDM BDC HR-PWM 4ch16b HR-Tim 4ch16b 1# EVDD IIC Sent tx KWU Win Wdog PWM 4ch16b Tim 8ch16b 4# NGPIO RCosc. +/-1.3% S12Z 32MHz Bus kB Flash 1-2kB Pierce Osc. 2 HV Input PLL 4-12kB RAM Temp Sense 12-Bit LADC 2ch 2ch ACMP + With ACMP 1x6-Bit-DAC - 8-bit DAC + OpAmp + - VREG for CAN PHY with ext. ballast VREG VSUP sense 70, or up to 170mA with ext. Ballast M 5V Supply Hall Sensor S12ZVC benefits: CAN-based (LIN too slow) Limited PCB-space ASIL-requirements External Use 27

29 Most integrated solution for the instrument cluster market at the best price S12 MagniV portfolio simplifies system design with easy-to-use, expertly integrated mixed-signal MCUs for automotive applications Improved Reliability Reducing the number of components in a system greatly improves reliability, requires less power which provides a greener footprint Core Efficiency S12Z core performance improves code density which reduces system flash requirements Ease of Use In addition to excellent support, availability of a full featured reference design and enablement facilitates ease of use and faster time to market External Use 28

30 S12ZVH Key Details Features Digital MCU Core and Memories 5V Analogue High-Voltage MS-CAN 2.0A/B linked to CAN Phy 2SCI, SPI, IIC Serial link to other Ics (sensors, peripherals), debugging & programming Key wakeup pins Combined with Analog Input pins Realtime Counter with calendar for h/m/s 4ch 16bit PWM Eg. LED Dimming 2x 8ch Timer Sensor inputs, SW Timing 10 Open Drain IO s For connecting external 3.3V peripherals CAN Physical Layer (HighSpeed) Supporting dominant Txd timeout G P I O CANPHY 2 x SCI MSCAN SPI BDM BDC RTC Timer 8ch16b IIC KWP 10 Open Drain Win Wdog PWM 4ch16b Timer 8ch16b 4 byte eraseable 100K program / erase cyctle S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV Pierce Osc. IRC +/-1.3% S12Z 32MHz Bus kB Flash 4kB VSENSE 32kHz Osc PLL 4-8kB RAM Flash 64/128kB 512B erasable 10K p/e cycles. Can be used for Data On chip RC OSC factory-trimmed to +/- 1.3% Additional 32kHz- Osc. for LCD & RTC in low power Temp Sense 2-4 SMC with SSD 10-Bit LADC Segment LCD (Up to 4x40) Soundgenerator VREG for CAN PHY with ext. ballast VREG VSUP sense 70, or up to 170mA with ext. Ballast Packaging Options 100-LQFP 144-LQFP 10Bit list basedadc upto 8 ext. Ch.+ int. channels for temp sense, supply monitors, internal ref Voltages. Executes command list & writesresul directly to RAM (DMA) 2-4 Stepper motor Controller with stall detection (Gauge) LCD controller 4x32 or 4x40 segment SGM Generates monotonic sounds with auto amplitude control 2nd Voltage Regulator For CAN-Phy-supply Supply & Battery sensing Supply sense before and after protection diode Voltage Regulator 70mA total supply (upto 170mA with external ballast for more current and lower poer dissipation External Use 29

31 Speed RPM Vbat Ignition 12V switches (e.g.- L/R/Cancel) 4 Gauge Cluster Use Case Ballast Transistors Vsup Vddc Signal Conditioning Vreg RTC 5V OSC 32 khz Timer (Input Capture) 16bit x 8ch GPIO XOSCLCP 4-16 MHz IRC Timer 16bit x 8ch S12ZVH 128k Flash 4k 8k RAM LCD drive 4x40 4 x Stepper Motor Drivers (w/ SSD) SPI 2xSCI IIC SSGM Digital MCU Core and Memories 4x40 Segment LCD 5V Speedometer Tachometer Fuel Level Coolant Temp Amp 5V Analogue High-Voltage Vsup Temperature Sensor Fuel Level Input ADC 10-bit, 8-ch on pins S12Z CPU CAN PWM 8b,6ch / 16b, 3ch Typical MCU CAN PHY S12ZVH Integration External Use 30 CAN Bus

32 S12ZVHL Key Details Features Digital MCU Core and Memories 5V Analogue High-Voltage MS-CAN 2.0A/B CAN Controller 2SCI, SPI, IIC Serial link to other Ics (sensors, peripherals), debugging & programming Key wakeup pins Combined with Analog Input pins Realtime Counter with calendar for h/m/s 4ch 16bit PWM Eg. LED Dimming 2x 8ch Timer Sensor inputs, SW Timing 10 Open Drain IO s For connecting external 3.3V peripherals LIN Physical Layer LIN 2.2 / 2.1 compliant +/- 8kV ESD capability G P I O LIN-PHY 2 x SCI MSCAN SPI BDM BDC RTC Timer 8ch16b IIC KWP 10 Open Drain Win Wdog PWM 4ch16b Timer 8ch16b 4 byte eraseable 100K program / erase cyctle S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV Pierce Osc. IRC +/-1.3% S12Z 32MHz Bus 32-64kB Flash 2kB VSENSE 32kHz Osc PLL 2-4kB RAM Flash 32/64kB 512B erasable 10K p/e cycles. Can be used for Data On chip RC OSC factory-trimmed to +/- 1.3% Additional 32kHz- Osc. for LCD & RTC in low power Temp Sense 2 SMC with SSD 10-Bit LADC Segment LCD (Up to 4x40) Soundgenerator VREG VSUP sense 70, or up to 170mA with ext. Ballast Packaging Options 100-LQFP 144-LQFP 10Bit list basedadc upto 8 ext. Ch.+ int. channels for temp sense, supply monitors, internal ref Voltages. Executes command list & writesresul directly to RAM (DMA) 2 Stepper motor Controller with stall detection (Gauge) LCD controller 4x32 or 4x40 segment SGM Generates monotonic sounds with auto amplitude control Supply & Battery sensing Supply sense before and after protection diode Voltage Regulator 70mA total supply (upto 170mA with external ballast for more current and lower poer dissipation External Use 31

33 Signal Conditioning TM S12ZVHL 2 Gauge Cluster Use Case Speed RPM Ignition Vbat Ballast Transistor Vsup Vreg 5V 32 khz OSC RTC Timer (Input Capture) 16bit x 8ch XOSCLCP 4-16 MHz IRC Timer 16bit x 8ch S12ZVHL LCD drive Up to 4x40 2 x Stepper Motor Drivers (w/ SSD) SPI SCI1 IIC Monotonic Sound Generator Digital MCU Core and Memories 4x40 Segment LCD 5V Speedometer Tachometer 5V Analogue High-Voltage 12V switches (e.g.- L/R/Cancel) Temperature Sensor Fuel Level Input GPIO ADC 10-bit, 4-ch on pins 64KB Flash 2KB 4KB RAM S12Z CPU PWM_1 8b,4ch / 16b, 2ch PWM_2 8b,6ch / 16b, 3ch Amp Vsup CAN SCI0 Typical MCU LINPHY S12ZVHL Integration LIN Bus External Use 32

34 S12ZVHL S12ZVFP Details Key Features Digital MCU Core and Memories 5V Analogue High-Voltage MS-CAN 2.0A/B CAN Controller 2SCI, SPI, IIC Serial link to other Ics (sensors, peripherals), debugging & programming Key wakeup pins Combined with Analog Input pins Realtime Counter with calendar for h/m/s 4ch 16bit PWM Eg. LED Dimming 2x 8ch Timer Sensor inputs, SW Timing 10 Open Drain IO s For connecting external 3.3V peripherals LIN Physical Layer LIN 2.2 / 2.1 compliant +/- 8kV ESD capability G P I O LIN-PHY 2 x SCI MSCAN SPI BDM BDC RTC Timer 8ch16b IIC KWP 10 Open Drain Win Wdog PWM 4ch16b Timer 8ch16b 4 byte eraseable 100K program / erase cyctle S12Z CPU 16-bit, 32b MAC, linear addressing Harvard architec. compatible within MagniV Pierce Osc. IRC +/-1.3% S12Z 32MHz Bus 64kB Flash 2kB VSENSE 32kHz Osc PLL 4kB RAM Flash 64kB 512B erasable 10K p/e cycles. Can be used for Data On chip RC OSC factory-trimmed to +/- 1.3% Additional 32kHz- Osc. for LCD Temp Sense 10-Bit LADC 8 High Current IO s Segment LCD (Up to 4x40) Soundgenerator VREG VSUP sense 70, or up to 170mA with ext. Ballast Packaging Options 100-LQFP 144-LQFP 10Bit list basedadc upto 8 ext. Ch.+ int. channels for temp sense, supply monitors, internal ref Voltages. Executes command list & writesresul directly to RAM (DMA) 8x High Current IO s Direct LED drive with PWM capability LCD controller 4x32 or 4x40 segment SGM Generates monotonic sounds with auto amplitude control Supply & Battery sensing Supply sense before and after protection diode Voltage Regulator 70mA total supply (upto 170mA with external ballast for more current and lower poer dissipation External Use 33

35 S12ZVFP - HVAC Use Case Ballast Transistor 5V 32 khz 4-16 MHz 4x40 Segment LCD Vbat Vsup Encoder Knob Vreg OSC XOSCLCP IRC Timer 16bit x 8ch LCD drive Up to 4x40 8 High Current GPIOs Function ON Indicator Function Buttons 5V Timer (Input Capture) 16bit x 8ch S12ZVFP SPI SCI1 IIC GPIO 64KB Flash 2KB 4KB RAM PWM_1 8b,4ch / 16b, 2ch Dimmable Backlight Vsup ADC 10-bit, 4-ch on pins S12Z CPU PWM_2 8b,6ch / 16b, 3ch Temperature Battery CAN SCI0 Typical MCU LINPHY S12ZVFP Integration LIN Bus External Use 34

36 S12ZVH/VHL/VHY/VFP 144 pin Family Feature Set Product Name S12ZVH S12ZVHL S12ZVHY S12ZVFP Package 144-LQFP Flash memory 128kB 64kB 64kB 32kB 64kB 32kB 64kB 4kB 4kB 2kB 2kB 2kB 2kB 2kB RAM 8kB 4kB 4kB 2kB 4kB 2kB 4kB Stepper Motor Controller (with HW SSD) High Current Output pins (20mA) Segment LCD 4x40 4x40 4x40 4x40 4x40 4x40 4x40 Simple Sound Generator (SSG) CAN / SCI / SPI / IIC 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 CAN Physical Layer LIN Physical Layer Real Time Clock ADC (external pins) 8ch/10Bit 8ch/10Bit 8ch/10Bit 8ch/10Bit 8ch/10Bit 8ch/10Bit 8ch/10Bit Key Wakeup Pins-pins Vbat / Vsup sense 1/1 1/1 1/1 1/1 1/1 1/1 1/1 External Use 35

37 S12ZVH/VHL/VHY/VFP 100 pin Family Feature Set Product Name S12ZVH S12ZVHL S12ZVHY S12ZVFP Package 100-LQFP Flash memory 128kB 64kB 32kB 64kB 32kB 64kB 4kB 2kB 2kB 2kB 2kB 2kB RAM 8kB 4kB 2kB 4kB 2kB 4kB Stepper Motor Controller (with HW SSD) High Current Output pins (20mA) Segment LCD 4x32 4x32 4x32 4x32 4x32 4x32 Simple Sound Generator (SSG) CAN / SCI / SPI / IIC 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 1 / 2 / 1 / 1 CAN Physical Layer LIN Physical Layer Real Time Clock ADC (external pins) 4ch/10Bit 4ch/10Bit 4ch/10Bit 4ch/10Bit 4ch/10Bit 4ch/10Bit Key Wakeup Pins-pins Vbat / Vsup sense 1/1 1/1 1/1 1/1 1/1 1/1 External Use 36

38 Freescale Semiconductor, Inc. External Use

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