Update on logistics ECS 15

Transcription

1 Update on logistics ECS 15 Topic 2: 2.2 Digital Logic: Transistors, Topic 3: Computers 3.1 Hardware Lab 4 starts Tues. Building html pages. Progress report due Friday. Get advice at labs this week! Direct feedback from TA s. You can alter your topic : You will find this is an inevitable part of research. Review Problems to be posted shortly. Switch Transistor Circuit Review: Topic 2.3 Digital Logic AND, OR, NOT gates. Switch Switch OFF, Vout = 1. Switch ON, Vout = 0. (An INVERTER)

2 Switch! Transistor The not gate (the simplest transistor-based logic element) Vbase=0, Switch OFF, Vout = Vbase=1, Switch ON, Vout = 0. (An INVERTER) Input: 0 (switch is off /open: no current flows to ground) Input Input: 1 (switch is on /closed: current flows to ground) Output Truth table Combine these into a circuit: An implementation of an OR gate Using 3 transistors Basic Concepts (2) Transistors 1 and 2 connected in PARALLEL. V1 = 1 OR 2 V1 V2 OUTPUT: The OR of 1 and 2 connected in SERIAL with 3. V2 = V1 AND V2 = (1 OR 2) AND 3 Input A Input B Output (V2) Logic Proposition Operation on propositions Digital Logic - The transistor - Gates Order of operations Speed Lawrence Snyder, Fluency with Information Technology

3 Acknowledgments The Central Process Unit () Thanks to the following web site for the images used in this presentation: ALU Control Input - Wikipedia Memory The consists of three parts: - the Arithmetic Logic Unit (ALU) - The Control Unit - Memory Output The Fetch/Execute Cycle Step 1: Instruction Fetch The cycles through a series of operations or instructions, organized in a cycle, the Fetch/Execute cycle: 1. Instruction Fetch (IF) 2. Instruction Decode (DP) 3. Data Fetch (DF) 4. Instruction Execute (IE) 5. Result Return Fetch instruction from memory position 2200: Add numbers in memory positions 884 and 428, and store results at position 800

4 Step 2: Instruction Decode Step 3: Data Fetch PC: 2200 Decode instruction: Defines operation (+), and set memory pointers in ALU Fetch data: Get numbers at memory positions 428 and 884: 42 and 12 and put in ALU Step 4: Instruction Execution Step 5: Return Result PC: 2200 PC: 2200 [800] Execute: Add numbers 42 and 12 in ALU: 54 Return: Put results (54) in position 800 in memory

5 Possible operations Repeating the F/E cycle Computers can only perform about 100 different types of operations; all other operations must be broken down into simpler operations among these 100. Some of these operations: - Add, Mult, Div - AND, OR, NAND, NOR, - Bit shifts - Test if a bit is 0 or 1 - Move information in memory - Computers get their impressive capabilities by performing many of these F/E cycles per second. The computer clock determines the rate of F/E cycles per second; it is now expressed in GHz, i.e. in billions of cycles per seconds! Note that the rate given is not an exact measurement. Indicative numbers (Millions of Instructions Per Second) Computer Layers Hardware BIOS Operating System Software Programming languages

6 Computer Layers Looking inside a computer Hardware BIOS Operating System Software Programming languages Computers come in different shapes and sizes, from small laptops (notebooks), desktops to mainframe computers. They all share however the same internal architecture! Computer: basic scheme The motherboard: backbone of the computer Power supply connector Input devices Output devices Slot for memory: RAM Slot for Hard drive connectors Storage Input/Output: Keyboard, Mouse, Extension cards: Video, sound, internet

7 The Central Process Unit (): The brain of the computer Memory: Working Space s are getting smaller, and can include more than one core (or processors). s get hot, as their internal components dissipate heat (remember all those transistors!): it is important to add a heat sink and fans to keep them cool. Storage Hard drive Floppy disk CD or DVD USB key

8 Communicating with a computer Some Input/Output Interfaces Screen Video cards Sound card Keyboard Mouse Ethernet card Hardware communication: buses (The wires transport, like a real bus, only they transport electrons not people) The memory bus: Hardware communication: buses (33 to 1333 MHz) Cache Backside bus (speed of processor) a 16 bit bus ISA devices ISA bus (8.3 MHz) (66 MHz) (33 to 1333 MHz) (33 or 66 MHz) RAM Communication between the and the RAM is defined by: - the speed - The RAM speed - The number of bits transferred per cycle Other buses: (up to 300 MHz) USB, Firewire, PCI Express,