Microprogrammed Control. ECE 238L μseq 2006 Page 1
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1 Microprogrammed Control ECE 238L μseq 26 Page 1
2 Sample Control Unit FSM Add Ld Ld1 Ld2 Jsr Jsr1 F F1 F2 D Ldi Ldi1 Ldi2 Ldi3 Ldi4 Ldr Ldr1 Ldr2 Not Sti Sti1 Sti2 Sti3 Sti4 ECE 238L μseq 26 Page 2
3 Sample Output Forming Logic F1 Jmp Jsr1 ldpc Onehot encoding leads to pretty simple OFL! Jsrr1 TakeBr Add And Not enaalu Ld1 Ldr1 Ldi3 ECE 238L μseq 26 Page 3
4 The Control Unit The LC3 control lecture discussed a hardwired approach to controller design The functionality is fixed after the design Microprogrammed controllers allow functionality to be easily changed Instructions can be added or changed with only minor changes to the microcode ECE 238L μseq 26 Page 4
5 Microprogrammed Control An internal memory called the control store (or Microstore) contains the settings for all of the control signals for all. Each memory location contains one complete set of control values. Memory (Microstore) ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 5
6 Microprogrammed Control An internal memory called the control store (or microstore) contains the settings for all of the control signals for all. Each memory location contains one complete set of control values. Microinstructions ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 6
7 Microprogrammed Control How do you determine which control string to use? Address? ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 7
8 Microprogrammed Control Use a register to select the address in memory which contains the appropriate control string. μcode Address ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 8
9 (2) 1 1 ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr Fetch Microprogrammed Control Address = () (1) ECE 238L μseq 26 Page 9
10 (2) 1 1 ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr Fetch 1 Microprogrammed Control Address = 1 () (1) ECE 238L μseq 26 Page 1
11 (2) 1 1 ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr Fetch 2 Microprogrammed Control Address = 2 () (1) ECE 238L μseq 26 Page 11
12 Microprogrammed Control Use incrementer to get sequential control strings. +1 μcode Address ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 12
13 Decode IR[15:12] Instruction Lookup Table Address in the μstore for the current instruction Use a lookup table to get to the appropriate control strings after an instruction has been loaded into the Instruction Register. This occurs in the Decode stage of the instruction. ECE 238L μseq 26 Page 13
14 Decode Use a MUX to select between the sources for the μcode Address. IR[15:12] Instruction Lookup Table Address in the ustore for the current instruction MUX Decode +1 μcode Address ECE 238L μseq 26 Page 14
15 Microprogrammed Control Instruction Execution μcode Address 1 (F) (F1) (F2) (D) (Add) Decode ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 15
16 Microprogrammed Control How to return to the fetch cycle? μcode Address 1 (F) (F1) (F2) (D) (Add) Decode ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 16
17 Microprogrammed Control Use a special field to designate the next address which should be executed! μcode Address 1 (F) (F1) (F2) (D) (Add) Decode Address ALUCtrl selpc seleab2 seleab1 enaalu regwe enamarm selmar enapc ldpc ldir ldmar ldmdr selmdr memwe enamdr ECE 238L μseq 26 Page 17
18 Jump to a New μcode Address Because of the Target Address field, the incrementer is no longer needed. IR[15:12] Instruction Lookup Table Target Address from ustore Address in the ustore for the current instruction MUX Decode μcode Address ECE 238L μseq 26 Page 18
19 Selecting Operand and Destination Register Addresses ECE 238L μseq 26 Page 19
20 Selecting Operand and Destination Register Addresses Two more control signals are required in the μstore: SR1 and DR. These signals select the source for the register addresses. IR[8:6] IR[11:9] 1 Source Reg 1 Address IR[11:9] Dest Reg Address SR1 DR ECE 238L μseq 26 Page 2
21 Selecting Operand and Destination Register Addresses : 1: decode 1: branch 11: JSRcond Addresses go to the Register File ECE 238L μseq 26 Page 21
22 Selecting Load Program Counter Sources For a Branch instruction, loading of the PC depends upon the N, Z and P register flags and the n, z and p bits in the instruction. Another control signal is needed to select the source for the load PC control signal. ldpc from ustore Take Branch (n N)+(z Z)+(p P) 1 ldpc going to PC register Branch Instruction ECE 238L μseq 26 Page 22
23 Selecting Load Program Counter Sources Special Code bit for branch instruction (n N)+(z Z)+(p P) ECE 238L μseq 26 Page 23
24 Selecting Jump Subroutine MUX control sources The two types of JSR instructions use different control signals but share the same opcode. JSR clock1 R7 PC enapc 1 DR 7 regwe 1 clock2 PC EAddr seleab1 seleab2 11 selpc 1 ldpc 1 JSRR clock1 R7 PC enapc 1 DR 7 regwe 1 clock2 PC EAddr seleab1 1 seleab2 selpc 1 ldpc 1 ECE 238L μseq 26 Page 24
25 Selecting Jump Subroutine MUX control sources Use IR[11] to distinguish between the two forms of JSR. JSR clock1 R7 PC enapc 1 DR 7 regwe 1 clock2 PC EAddr seleab1 seleab2 11 selpc 1 ldpc 1 JSRR clock1 R7 PC enapc 1 DR 7 regwe 1 clock2 PC EAddr seleab1 1 seleab2 selpc 1 ldpc 1 ECE 238L μseq 26 Page 25
26 Selecting Jump Subroutine MUX control sources Luckily, the control signals which differ are the complements of each other. JSR clock2 PC EAddr seleab1 seleab2 11 JSRR clock2 PC EAddr seleab1 1 seleab2 : 1: decode 1: branch 11: JSRcond Again, we require Special Code to specify when a JSR instruction is being executed. Use XOR gates to perform the selective complement function. ECE 238L μseq 26 Page 26
27 Selecting Jump Subroutine MUX control sources ECE 238L μseq 26 Page 27
28 IR[2:] IR[11:9] IR[8:6] 111 IR[11] IR[15:12] Instruction Lookup Table uaddress MicroStore TakeBranch ECE 238L μseq 26 Page 28 src2 src1 dr ALUCtrl srelpc seleab1 seleab2 enaalu regwe enamm selmar enapc ldir ldmar ldmdr selmdr memwe enamdr ldpc : 1: decode 1: branch 11: JSRcond
29 MicroStore ECE 238L μseq 26 Page 29
30 Instruction Lookup Table Opcode Instruction Next Address (decimal) Next Address (binary) BR ADD LD ST JSR AND LDR STR RTI 11 NOT LDI STI JMP LEA TRAP ECE 238L μseq 26 Page 3
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