TRACE32 Documents... ICD In-Circuit Debugger... Processor Architecture Manuals... C166 Family... C166 Family Trace... 1

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1 C166 Family Trace TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Documents... ICD In-Circuit Debugger... Processor Architecture Manuals... C166 Family... C166 Family Trace... 1 Installation... 3 Packing List 3 TRACE32 Software and Hardware Installation 3 Configuration and Target Adaption 4 Adapter-Configuration for C166 CBC Family (TCON) 5 Function... 6 Quick Start 6 SYStem Window 6 Trace Structure 9 Trace Features 9 Selective Tracing 10 Background information 11 TriggerOnchip Window Setup 12 Map Window Setup 14 Example 14 Commands MAP.MONITOR 17 PER.view 17 SYStem.Option 18 TrOnchip 18 FAQ Technical Data Operation Voltage 20 Operation Frequency 20 Dimensions 21 Adapter 25 Support C166 Family Trace 1

2 Available Tools 26 Compilers 27 Target Operating Systems 27 3rd Party Tool Integrations 28 Products Product Information 29 Order Information 30 C166 Family Trace 2

3 C166 Family Trace Version 06-Nov-2017 Installation Packing List The complete TRACE32-ICD trace extension consist of the following parts: 1. A RISC TRACE module 2. C166 family preprocessor 3. Three flat band cables with different length and blue plugs 4. A short flat band cable with black plugs 5. A cpu specific adapter board 6. This documentation Please check if all parts are available! TRACE32 Software and Hardware Installation The TRACE32-ICD software includes also the TRACE32-ICD Trace support. No extra software installation is required to run the TRACE32-ICD Trace. The RISC TRACE box has to be added to the PODBUS. The preprocessor is usually connected to the RISC TRACE module with the blue-pluged flat band cables. The correct order shows the following picture: C B A ABC The flatband cables have different length. The shortest is used for connecting plug A, the middle for plug B and the longest for plug C. C166 Family Trace 3

4 Configuration and Target Adaption There are two ways to adapt the preprocessor for the C166 family to the target: 1. The black 80pin ICE connector is located on the top of the preprocessor. Using the black-pluged flat band cable the target adpation is done like shown in the picture below: Flat cable Preprocessor Target With this connection the address and data lines can be traced. 2. The target adaption using the CPU specific adapter board looks as shown in the picture below: There are three different adapters available: - EGOLD (TCON160) - EGOLD+ (TCON200) - C161, C165 and C167 (ET80, ET100, ET144) With this connection the address and data lines plus Port 2 and Port 3 can be traced. The pinout is similar to the pinout of each CPU. That means pin 1 of EGOLD-TCON is at the same position as pin 1 of the CPU. Dimension and technical data are described in Technical Data. C166 Family Trace 4

5 Adapter-Configuration for C166 CBC Family (TCON) The C166 CBC-family (EGOLD, EGOLD+) supports different sources for the address lines A23 to A21. To set the right configuration DIP-switches are implemented on the TCON adapters. If no selection is made all lines are pulled down via 10K resistors (trace side only). That means, the trace assumes that the address line is 0. Set the switches corresponding to your target: CPU TRACE CLKSXM CC06I0 DSPOUT0 DSPOUT1 PDOUT TOUT12 VCCEXT N/C N/C A21 A22 A23 ALE After removing the protection foil the selection is possible with a small screwdriver O F F Insert the adapter into your target carefully. Check where is pin 1 of your CPU. First clip the adapter on the preprocessor then place it on your target. C166 Family Trace 5

6 Function Quick Start In order to work correctly, the TRACE32-ICD Trace needs the information on how the bus interface to the memory you want to trace is configured. This configuration is done by your software. SYStem Window The SYStem window contains also settings for the ICD Trace. It can be opened using the System Setting command in the CPU menu or by using the SYStem command. CS configuration Bus configuration B::SYStem Mode MemAccess Option ADDRSELx BUSCONx Down CPU BOOTSTRAP 0x0 0x0 NoDebug Denied PERSTOP 0x0 0x0 Go CpuAccess DUALPORT 0x0 0x0 Attach Enable IMASKASM 0x0 0x0 Up Denied IMASKHLL 0x0 0x0 MONBASE BusType SYSCON CPU 0x3FFE0 MUX8 0x0 PMB2850 BrkVector SGT 0x8 OFF ResVector CS 0x0 0 Bus type Number of CS lines Segment size C166 Family Trace 6

7 BUSCON x SYSCON ADDRSEL x BUSTYPE CS SGT The values for BUSCON x have to correspond to the BUSCONx register of your CPU. The value can also be copied from the BUSCONx register in the PER window after your software has finished its initialisation. The value for SYSCON have to correspond to the SYSCON register of your CPU. The value can also be copied from the SYSCON register in the PER window after your software has finished its initialisation. The values for ADDRSELx have to correspond to the ADDRSELx register of your CPU. ADDRSEL0 functioned as ADDRSELx, but this value is not supported by the cpu. The value is needed in case of cs0 base address<>0. The value can also be copied from the SYSCON register in the PER window after your software has finished its initialisation. Specifices the bustype for the memory which will be traced. Defines the max number of used CS lines. Unused lines has to be pulled up! Defines the number of address lines which are used. All lines have to be driven within this segment! It is recommended to use a PRACTICE script (*.cmm) to set up TRACE32-ICD trace to guarantee a proper start-up sequence. We assume that such a PRACTICE script exists already to start up the In-Circuit Debugger TRACE32-ICD. So please add the following lines to this configuration file. C166 Family Trace 7

8 This is a example to start up the EGOLD board. ; MAIN SETUP SYStem.RESet SYStem.CPU PMB2850 SYS.O MONBASE 3ffe0 SYStem.Up ; Initialize system ; Select CPU type ; Monitor base address ; Start debugger Target Setup d.s 0ffd6 %w 8800 ; ; PROGRAM SETUP D.LOAD.I taskcc.abs R.S pc CSTART_TASK ; TRACE SETUP SYS.O BUSTYPE NOMUX16 SYS.O ADDRSEL SYS.O ADDRSEL1 9 SYS.O SGT 2M SYS.O CS 2 SYS.O BUSCON0 049e SYS.O BUSCON1 04BF SYS.O SYSCON 1484 MAP.MONITOR 3ffe0--3ffff ; END OF FILE ENDDO ; Load example program ; Set pc to program start ; Bustype 16bit, non multiplexed ; Base address for CS0 ; Base address for CS1 ; A20-0 are used, 2MB ; CS0 and CS1 are used ; same value as BUSCON0 register ; same value as BUSCON1 register ; same value as SYSCON register ; where the monitor routine is ; situated ; End of file C166 Family Trace 8

9 Trace Structure The TRACE32-ICD Trace for the C166 family works as a bus trace and runs up to a max. speed of??. For a bus trace the address and data bus and certain state lines are recorded for every CPU cycle. As a result the complete information about the program and data flow is available. If no trace control is used, TRACE32-ICD Trace samples all bus cycles. But recontruction of the addresses is only possible if all 24 address line are sampled or if the address is within a 1 MByte range. The bus interface configuration for this 1 MByte memory range has to be entered in the SYStem window. Trace Features TRACE32-ICD Trace for the C166(CBC) family allows: to do selective tracing to start and stop the sampling at specific addresses to stop the program at a specific address. A delay counter can be used to delay the program stop The trace control is implemented by a special trigger RAM, that covers a maximum memory block of 1Mbyte (0x0* x0*FFFFF). Within this trigger RAM address selectors can be set in form of a hardware breakpoint. 1 MByte trigger RAM Within 1 MByte full trace control Lower and upper 8 MByte are mirrored Breakpoints can be set outside of the 1 MByte block, but the lower addresses (A0-A11) have to be different 16 MByte adress space If all cycles were sampled until the program was stop, the Context Tracking System can be used to debug out of the trace buffer or to get an HLL analysis of the trace contents with all stack and register variables. For more information on this feature refer to CTS. in General Commands Reference Guide C (general_ref_c.pdf). C166 Family Trace 9

10 Selective Tracing Selective tracing is controlled by the TEnable field in the TrOnchip Window (Break Menu -> OnChip Trigger ). By default an Echo hardware breakpoint is used to control the sampling. Selective trace (trace enable) B::TrOnchip tronchip Data TEnable TBegin TStop RESet Alpha Alpha Alpha CONVert TaskID Beta Beta Beta Charly Charly Charly Delta Delta Delta CYcle Address Echo Echo Echo Read Alpha Write Beta execute Charly compare Delta NoMatch Echo TTrigger Alpha Beta Charly Delta Echo TDelay 0. On-chip area Trace control area C166 Family Trace 10

11 Background information The trace is designed as bus trace for the C166(CBC) family. Trace control (start, stop, selective and trigger) is possible with special break points. The trigger RAM covers a maximum memory block of 1Mbyte (0x0* x0*FFFFF) where break points can be set in any way and any number. The complete memory area of the cpu will be covered with mapping and mirroring of the trigger RAM. The mapping will be done by software Using of more than 1Mbyte block or setting break points higher than 0x results in mirroring of the trigger RAM. For a better understanding follow some examples. Break.Set Commands B.S 0x /A B.S 0x0ffffe /B B.S 0x /A B.S 0x /C B.S 0x /A B.S 0x /B B.S 0x /A B.S 0x /B B.S 0x /A B.S 0x /B B.S 0x /C Effect ALPHA occurs on 0x and 0x BETA occurs on 0x0FFFFE and 0x8FFFFE ALPHA and BETA occur on 0x000010, 0x100010, 0x800010, 0x ALPHA occurs on: 0x000010, 0x100010, 0x800010, 0x BETA occurs on: 0x000020, 0x100020, 0x800020, 0x ALPHA occurs on: 0x000010, 0x100010, 0x800010, 0x BETA occurs on: 0x000020, 0x100020, 0x800020, 0x ALPHA occurs on: 0x000010, 0x100010, 0x800010, 0x BETA occurs on: 0x000020, 0x100020, 0x800020, 0x CHARLY occurs on: 0x000030, 0x100030, 0x800030, 0x C166 Family Trace 11

12 TriggerOnchip Window Setup The trigger onchip window can be opened with >TO< and will look like the following: Selective trace (trace enable) Start trace Stop trace Trigger trace B::to tronchip Data TEnable TBegin TStop RESet Alpha Alpha Alpha CONVert TaskID Beta Beta Beta Charly Charly Charly Delta Delta Delta CYcle Address Echo Echo Echo Read Alpha Write Beta execute Charly compare Delta NoMatch Echo TTrigger Alpha Beta Charly Delta Echo TDelay 0. Trigger delay Normaly the standard configuration will fit all needs, but it is possible to define the trace functionality for each break point (e.g. alpha). TENABLE All marked addresses will be traced selective. TSTART All marked addresses will start tracing. TSTOP All marked addresses will stop tracing with the ability to restart the trace with TSTART. TTRIGGER The first marked address that will reached starts the delay counter and after the counter reaches zero the recording stops. Restart with TSTART is not possible. TDELAY Presets the delay counter, one count reflects one record cycle. Marking is possible with simple B.Set commands: B.S 0x4C5A /A B.S 0x4C60 /B B.S 0x4C6A /C B.S 0x4C5C--0x4C5E /E ALPHA occurs on FETCH/EXECUTE of 0x4C5A BETA occurs on FETCH/EXECUTE of 0x4C60 CHARLY occurs on FETCH/EXECUTE of 0x4C6A ECHO occurs on FETCH/EXECUTE of 0x4C5C--0x4C5E C166 Family Trace 12

13 A breakpoint of a marked address will occur, when the address is fetched. This includes also prefetches! The marked addresses are visible in break list and data list window. For seeing the breakpoints in the data list window move per drag&drop the address line to the right: B::d.l EDCBAWRSHP addr/line code label mnemonic comment > register int i, primz, k; > int anzahl; > 741> anzahl = 0; P:004C58>E00F sieve: mov r15,#0x0 ED BA 743 for ( i = 0 ; i <= SIZE ; flags[ i++ ] = TRUE ) ; A P:004C5A E00C mov r12,#0x0 E P:004C5C E112 movb rl1,#0x1 E P:004C5E F0DC mov r13,r12 ; r13,i B P:004C60 08C1 add r12,#0x1 ; i,#1 P:004C62 E42D2E82 movb [r13+#0x822e],rl1 P:004C66 46FC1200 cmp r12,#0x12 ; i,#18 D P:004C6A BDF8 jmpr cc_sle,0x4c5c 745 for ( i = 0 ; i <= SIZE ; i++ ) P:004C6C E00C mov r12,#0x0 ; i,#0 { 747 if ( flags[ i ] ) P:004C6E F42C2E82 movb rl1,[r12+#0x822e]; rl1,[i+#flags] P:004C72 2D0F jmpr cc_eq,0x4c92 Marked Addresses The break list window shows the same information in another way. B::b.l address types state C:004C5A A MARK \\taskcl\taskc_c\sieve\6 C:004C5C--004C5F E MARK (\\taskcl\taskc_c\sieve\6+0x2) C:004C60 B MARK \\taskcl\taskc_c\sieve\6+0x6 C:004C6A D MARK \\taskcl\taskc_c\sieve\6+0x10 C166 Family Trace 13

14 Map Window Setup The TRACE32 RiscTrace extension records all bus cycles which occure. Normaly it is not interessting to trace the ROM monitor. In this case it is possible to blank out all this monitor cycles using >MAP.MONITOR range<. All maped ranges can be listed with MAP.List. B::map.l address type bus monitor attributes C: FFFDF C:3FFFE0--3FFFFF monitor C: FFFFFF Example The following example of a memory configuration will be used: 0x x00FFFF 0x x1FFFFF 0x x2FFFFF 0x xFFFFFF ; ROM on CS2/ 8bit multiplexed ; RAM on CS0/16bit not multiplexed ; FLASH on CS1/16bit not multiplexed ; RAM on CS0/16bit not multiplexed ; A00-A22 are driven by cpu The TRACE32 RiscTrace extension will trace all buscycles, but outside the specified trace control range the address reconstruction and code disassembling can fail. C166 Family Trace 14

15 1. Trace control within the ROM area ; TRACE SETUP SYS.O BUSTYPE MUX8 SYS.O ADDRSEL SYS.O ADDRSEL SYS.O ADDRSEL SYS.O SGT 8M SYS.O CS 3 SYS.O BUSCON0 06BF SYS.O BUSCON1 04BF SYS.O BUSCON2 047F SYS.O SYSCON 1484 MAP.MONITOR 0ffe0--0ffff ; Bustype 8bit, multiplexed ; Base address for CS0 ; Base address for CS1 ; Base address for CS2 ; A00-A22 are used, 8MB ; used CS lines ; same value as BUSCON0 register ; same value as BUSCON1 register ; same value as BUSCON2 register ; same value as SYSCON register ; where the monitor routine is ; situated 2. Trace control within the first RAM area (0x x1FFFFF) ; TRACE SETUP SYS.O BUSTYPE NOMUX16 SYS.O ADDRSEL SYS.O ADDRSEL SYS.O ADDRSEL SYS.O SGT 8M SYS.O CS 3 SYS.O BUSCON0 06BF SYS.O BUSCON1 04BF SYS.O BUSCON2 047F SYS.O SYSCON 1484 MAP.MONITOR 0ffe0--0ffff ; Bustype 16bit, non multiplexed ; Base address for CS0 ; Base address for CS1 ; Base address for CS2 ; A00-A22 are used, 8MB ; used CS lines ; same value as BUSCON0 register ; same value as BUSCON1 register ; same value as BUSCON2 register ; same value as SYSCON register ; where the monitor routine is ; situated 3. Trace control within the FLASH area ; TRACE SETUP SYS.O BUSTYPE NOMUX16 SYS.O ADDRSEL SYS.O ADDRSEL SYS.O ADDRSEL SYS.O SGT 8M SYS.O CS 3 SYS.O BUSCON0 06BF SYS.O BUSCON1 04BF SYS.O BUSCON2 047F SYS.O SYSCON 1484 MAP.MONITOR 0ffe0--0ffff ; Bustype 16bit, non multiplexed ; Base address for CS0 ; Base address for CS1 ; Base address for CS2 ; A00-A22 are used, 8MB ; used CS lines ; same value as BUSCON0 register ; same value as BUSCON1 register ; same value as BUSCON2 register ; same value as SYSCON register ; where the monitor routine is ; situated C166 Family Trace 15

16 4. Trace control within the second RAM area (0x xFFFFFF) ; TRACE SETUP SYS.O BUSTYPE NOMUX16 SYS.O ADDRSEL SYS.O ADDRSEL SYS.O ADDRSEL SYS.O SGT 8M SYS.O CS 3 SYS.O BUSCON0 06BF SYS.O BUSCON1 04BF SYS.O BUSCON2 047F SYS.O SYSCON 1484 MAP.MONITOR 0ffe0--0ffff ; Bustype 16bit, non multiplexed ; Base address for CS0 ; Base address for CS1 ; Base address for CS2 ; A00-A22 are used, 8MB ; used CS lines ; same value as BUSCON0 register ; same value as BUSCON1 register ; same value as BUSCON2 register ; same value as SYSCON register ; where the monitor routine is ; situated C166 Family Trace 16

17 Commands MAP.MONITOR Format: MAP.MONITOR <range> Blanks out the monitor routine from analyzer listing. PER.view Format: PER.view Shows peripheral window of the cpu. It contains important data for the trace setup. C166 Family Trace 17

18 SYStem.Option Format: SYStem.Option <def> <value> <def>: BUSTYPE SGT CS ADDRSEL0 ADDRSEL1 ADDRSEL2 ADDRSEL3 ADDRSEL4 BUSCON0 BUSCON1 BUSCON2 BUSCON3 BUSCON4 SYSCON MONBASE Bus type Number of used address lines Number of used CS lines Address selector of CS0 Address selector of CS1 Address selector of CS2 Address selector of CS3 Address selector of CS4 Bus configuration of CS0 Bus configuration of CS1 Bus configuration of CS2 Bus configuration of CS3 Bus configuration of CS4 System configuration Monitor base address <value>= Data value Sets trace significant options. TrOnchip Format: TrOnchip Shows the trigger on-chip window. C166 Family Trace 18

19 FAQ No information available C166 Family Trace 19

20 Technical Data Operation Voltage Adapter OrderNo Voltage Range Preprocessor for complete EGOLD family LA V Preprocessor for C166 family LA V Preprocessor for EGOLD family LA V Preprocessor for EGOLD+ family LA V Operation Frequency Module CPU TRACE LA-7857 PMB6850_E-GOLD MHz LA-7857 PMB7850_E-GOLD MHz LA-7857 PMB MHz LA-7857 PMB MHz LA-7857 PMB MHz LA-7880 C MHz LA-7880 C161U 66.0 MHz LA-7880 C165H 66.0 MHz LA-7880 C165UTAH 30.0 MHz LA-7880 C166CBC 30.0 MHz LA-7880 INCA-P 30.0 MHz LA-7880 PMB2850_E-GOLD 26.0 MHz LA-7880 SDA6000_M MHz LA-7880 ST MHz LA-7880 XC161CJ 30.0 MHz LA-7880 XC161CS 30.0 MHz LA-7880 XC164CM 30.0 MHz LA-7880 XC164CS 30.0 MHz LA-7880 XC167CI 30.0 MHz C166 Family Trace 20

21 Dimensions Dimension LA-7880 PP-C166-FAMILY 2850 PIN1 PIN1 PIN PIN1 ET80QF14 PIN1 ET100QF49 PIN1 ET144QF C166 Family Trace 21

22 Dimension LA-7881 PP-EGOLD C166 Family Trace 22

23 Dimension LA-7893 PP-EGOLD+ C166 Family Trace 23

24 Dimension LA-7851 CON-ICECON1-ICECON2 TOP VIEW SPACE BETWEEN TWO MICTOR SIDE VIEW PIN AMP MODU SYSTEM PIN MICTOR 38PIN MICTOR 1 1 ALL DIMENSIONS IN 1/1000 INCH LA-7857 PP-EGOLD+V3 TOP VIEW CABLE PIN PIN1 663 SIDE VIEW ALL DIMENSIONS IN 1/1000 INCH C166 Family Trace 24

25 Dimension LA-7858 CON-ICECON2-ICECON1 TOP VIEW PIN PIN1 PIN ALL DIMENSIONS IN 1/1000 INCH Adapter Not necessary. C166 Family Trace 25

26 Support Available Tools CPU ICE FIRE ICD DEBUG ICD MONITOR ICD TRACE POWER INTEGRATOR INSTRUCTION SIMULATOR C YES YES YES C161U YES YES YES YES C165H YES YES YES YES C165UTAH YES YES YES YES C166CBC YES YES YES YES INCA-P YES YES YES YES PMB2850_E-GOLD YES YES YES YES PMB6850_E-GOLD+ YES YES YES YES PMB7850_E-GOLD+ YES YES YES YES PMB7860 YES YES YES YES PMB7870 YES YES YES YES PMB7880 YES YES YES YES SDA6000_M2 YES YES YES YES ST10... YES YES YES XC161CJ YES YES YES YES XC161CS YES YES YES YES XC164CM YES YES YES YES XC164CS YES YES YES YES XC167CI YES YES YES YES C166 Family Trace 26

27 Compilers Language Compiler Company Option Comment C XC16X/ST10 Cosmic Software ELF/DWARF C GNU-GCC166 HighTec EDV-Systeme DBX GmbH C C166 ARM Germany GmbH EOMF-166 C C166 TASKING IEEE C++ GNU-CPP166 HighTec EDV-Systeme DBX GmbH C++ CP166 TASKING IEEE Target Operating Systems Company Product Comment ARM Germany GmbH ARTX-166 CMX Systems Inc. CMX-RTX Elektrobit Automotive Elektrobit tresos via ORTI GmbH Evidence Erika via ORTI Mentor Graphics Nucleus PLUS Corporation Vector oscan via ORTI Enea OSE Systems OSE Basic (OS166) Enea OSE Systems OSE Epsilon (OS166), 3.x - OSEK via ORTI Elektrobit Automotive ProOSEK via ORTI GmbH HighTec EDV-Systeme PXROS GmbH ARM Germany GmbH RTX166/-tiny Quadros Systems Inc. RTXC 3.2 Quadros Systems Inc. RTXC Quadros Articus Systems AB Rubus OS IBM Corp. SDT-Cmicro Micrium Inc. uc/os-ii 2.0 to 2.92 C166 Family Trace 27

28 3rd Party Tool Integrations CPU Tool Company Host WINDOWS CE PLATF. - Windows BUILDER CODE::BLOCKS - - C++TEST - Windows ADENEO - X-TOOLS / X32 blue river software GmbH Windows CODEWRIGHT Borland Software Windows Corporation CODE CONFIDENCE Code Confidence Ltd Windows TOOLS CODE CONFIDENCE Code Confidence Ltd Linux TOOLS EASYCODE EASYCODE GmbH Windows ECLIPSE Eclipse Foundation, Inc Windows CHRONVIEW Inchron GmbH Windows LDRA TOOL SUITE LDRA Technology, Inc. Windows UML DEBUGGER LieberLieber Software Windows GmbH SIMULINK The MathWorks Inc. Windows ATTOL TOOLS MicroMax Inc. Windows VISUAL BASIC Microsoft Corporation Windows INTERFACE LABVIEW NATIONAL Windows INSTRUMENTS Corporation RAPITIME Rapita Systems Ltd. Windows RHAPSODY IN MICROC IBM Corp. Windows RHAPSODY IN C++ IBM Corp. Windows DA-C RistanCASE Windows TRACEANALYZER Symtavision GmbH Windows TA INSPECTOR Timing Architects GmbH Windows UNDODB Undo Software Linux VECTORCAST UNIT Vector Software Windows TESTING VECTORCAST CODE Vector Software Windows COVERAGE C166 SDT CMICRO IBM Corp. Windows C166 Family Trace 28

29 Products Product Information OrderNo Code LA-7880 PP-C166-FAMILY LA-7857 PP-EGOLD+V3 LA-7851 CON-ICECON1-ICECON2 LA-7858 CON-ICECON2-ICECON1 Text Preprocessor for C166 family Preprocessor for C161.. C167 adaption to connector for evaluation boards Does not support Egold+V3! Preprocessor for complete EGOLD family Preprocessor for EGOLD, EGOLD+, EGOLD+V3 and EGOLDlite, adaption to ICECON2, Up to 56 MHz, extended trace features: 4 x 1MB Trigger RAM plus trigger features, requires PowerTrace requires LA-7858 if 80 pin AMP connector is used on the target Converter from AMP MODU SYSTEM50 to Mictor fo Converter from the 80 pin AMP MODU SYSTEM50 connectors on Preprocessor for C16x and XC16x family (LA-7880), EGOLD+ family (LA-7893) or EGOLD family (LA-7881) to 2 x 38 pin Mictor connectors Converter from 2 Mictor to AMP MODU SYSTEM50 Converter from the 2 x 38 pin mictor connectors on Preprocessor for complete EGOLD family (LA-7857) to 80 pin AMP connector + 80pol. Cable C166 Family Trace 29

30 Order Information Order No. Code Text LA-7880 PP-C166-FAMILY Preprocessor for C166 family LA-7857 PP-EGOLD+V3 Preprocessor for complete EGOLD family LA-7851 CON-ICECON1-ICECON2 Converter from AMP MODU SYSTEM50 to Mictor fo LA-7858 CON-ICECON2-ICECON1 Converter from 2 Mictor to AMP MODU SYSTEM50 C166 Family Trace 30