Chapter 2: Data Manipulation. Copyright 2015 Pearson Education, Inc.

Transcription

1 Chapter 2: Data Manipulation

2 Chapter 2: Data Manipulation 2.1 Computer Architecture 2.2 Machine Language 2.3 Program Execution 2.4 Arithmetic/Logic Instructions 2.5 Communicating with Other Devices 2.6 Program Data Manipulation 2.7 Other Architectures 2-2

3 Computer Architecture Central Processing Unit (CPU) or processor Arithmetic/Logic unit versus Control unit Registers General purpose Special purpose Bus Motherboard 2-3

4 Figure 2.1 CPU and main memory connected via a bus 2-4

5 Stored Program Concept A program can be encoded as bit patterns and stored in main memory. From there, the CPU can then extract the instructions and execute them. In turn, the program to be executed can be altered easily. 2-5

6 Cache Memory CPU 내부에위치한고속메모리 현재자주사용하는주기억장치부분의복사본을유지 레지스터와주기억장치사이에일어날데이터전송작업을레지스터와캐시메모리사이에일어나게함 신속한계산을가능하게함 Pearson Addison-Wesley. All rights reserved

7 Terminology Machine instruction: An instruction (or command) encoded as a bit pattern recognizable by the CPU Machine language: The set of all instructions recognized by a machine 프로그램내장개념을적용하기위하여 CPU 가해석할수있도록비트패턴으로인코딩한명령집합 ( 기계명령 /machine instruction) 과인코딩체계 2-7

8 Machine Language Philosophies Reduced Instruction Set Computing (RISC) Few, simple, efficient, and fast instructions Examples: PowerPC from Apple/IBM/Motorola and ARM Complex Instruction Set Computing (CISC) Many, convenient, and powerful instructions Example: Intel 2-8

9 Machine Instruction Types Data Transfer: copy data from one location to another(load, Store, I/O 명령 ) Arithmetic/Logic: use existing bit patterns to compute a new bit patterns (ADD, AND, OR, SHIFT etc.) Control: direct the execution of the program(jump) 2-9

10 Figure 2.2 Adding values stored in memory 2-10

11 Figure 2.3 Dividing values stored in memory 2-11

12 Figure 2.4 The architecture of the machine described in Appendix C 2-12

13 Parts of a Machine Instruction Op-code ( 명령코드 ): Specifies which operation to execute Operand ( 피연산자 ): Gives more detailed information about the operation Interpretation of operand varies depending on op-code 2-13

14 Figure 2.5 The composition of an instruction for the machine in Appendix C 2-14

15 Figure 2.6 Decoding the instruction 35A7 2-15

16 Figure 2.7 An encoded version of the instructions in Figure

17 Program Execution Controlled by two special-purpose registers Program counter: address of next instruction Instruction register: current instruction Machine Cycle Fetch ( 인출 ) Decode ( 해석 ) Execute ( 실행 ) 2-17

18 Figure 2.8 The machine cycle ( 인출 ) ( 해석 ) ( 실행 ) 2-18

19 Figure 2.9 Decoding the instruction B

20 Figure 2.10 The program from Figure 2.7 stored in main memory ready for execution 2-20

21 Figure 2.11 Performing the fetch step of the machine cycle 2-21

22 Figure 2.11 Performing the fetch step of the machine cycle (continued) 2-22

23 Arithmetic/Logic Operations Logic: AND, OR, XOR Masking Rotate and Shift: circular shift, logical shift, arithmetic shift Arithmetic: add, subtract, multiply, divide Precise action depends on how the values are encoded (two s complement versus floatingpoint). 2-23

24 Figure 2.12 Rotating the bit pattern 65 (hexadecimal) one bit to the right 2-24

25 Communicating with Other Devices Controller: An intermediary apparatus that handles communication between the computer and a device Specialized controllers for each type of device General purpose controllers (USB and FireWire) Port: The point at which a device connects to a computer Memory-mapped I/O: CPU communicates with peripheral devices as though they were memory cells 2-25

26 Figure 2.13 Controllers attached to a machine s bus 2-26

27 Figure 2.14 A conceptual representation of memory-mapped I/O 2-27

28 Communicating with Other Devices (continued) Direct memory access (DMA): Main memory access by a controller over the bus Von Neumann Bottleneck: Insufficient bus speed impedes performance (CPU 와제어기들의경쟁 ) Handshaking: The process of coordinating the transfer of data between components 2-28

29 Communicating with Other Devices (continued) Parallel Communication: Several communication paths transfer bits simultaneously. Serial Communication: Bits are transferred one after the other over a single communication path. 2-29

30 Data Communication Rates Measurement units Bps: Bits per second Kbps: Kilo-bps (1,000 bps) Mbps: Mega-bps (1,000,000 bps) Gbps: Giga-bps (1,000,000,000 bps) Bandwidth: Maximum available rate 2-30

31 기타컴퓨터구조 처리율 (throughput) 개선을위한기술 : 파이프라이닝 (pipelining): 기계주기의단계들을중첩시킨다. 병렬처리 (parallel processing): 여러개의프로세서를동시에사용한다. SISD: 병렬처리않음 MIMD: 여러개의프로그램이각자다른데이터를사용하여수행됨 SIMD: 동일한프로그램이여러데이터에적용됨 Pearson Addison-Wesley. All rights reserved

32 End of Chapter