EXPERIMENT 1 INTRODUCTION TO MEMS Pro v5.1: DESIGNING a PIEZO- RESISTIVE PRESSURE SENSOR
|
|
- Cameron Harvey
- 6 years ago
- Views:
Transcription
1 EXPERIMENT 1 INTRODUCTION TO MEMS Pro v5.1: DESIGNING a PIEZO- RESISTIVE PRESSURE SENSOR 1. OBJECTIVE: 1.1 To learn and get familiar with the MEMS Pro environment and tools 1.2 To learn the basis of process setup and design. 2. INTRODUCTION 2.1 Introduction In these MEMS Pro tutorial you will go over the design flow of a MEMS device. This example tutorial is based on the design of a piezo-resistive pressure sensor. Figure 1: Piezo-resistive pressure sensor You will start by creating the schematic design using a piezo-resistor model, and analyze the system behavior with MEMS Pro s tools S-Edit and T-SPICE.
2 The goal is this design is to create a pressure sensor device with an output gain about 100mV/bar and gain linearity lower than 1%. In the second step, you will create the mask data and generate a 3D Model in L-Edit. This tutorial is delivered with files that will be used during each step of the design. We strongly recommend that you create a tutorial folder where you will save this material. 2.2 Starting with MEMS Pro Create the tutorial directory where you will store the tutorial libraries and save your work. Start by opening the MEMS Pro Project Manager by clicking on: Start -> Programs -> MEMS Pro v5.1 -> MEMS Pro The MEMS Pro Project Manager will help you in configuring and starting the different tools of the MEMS Pro suite. Figure 2: MEMS Pro Project Manager
3 3.0 SCHEMATIC DESIGN AND SIMULATION During this first part we will capture the schematic of the piezo-resistor Wheatstone bridge. Once designed, we will perform simulation to view the behavior of the device. From the MEMS Pro Project Manager, Select the Schematic Editor environment. Figure 3: Schematic Editor Environment As we will create a new design, leave the fields empty and click on Run button. This will automatically launch S-Edit Schematic Editor. Once opened, we will save the schematic as Pressure_Sensor.sdb in the working directory by clicking on: File -> Save As from the S-Edit Menu Bar. Then rename the module as Bridge by clicking on: Module -> Rename 3.1 Piezo-resistor Wheatstone Bridge Open the symbol Browser by clicking on the icon or from the menu bar: Module -> Symbol Browser Click on the Add Library button and select the PR_LIB.sdb library file delivered with the tutorial. Once loaded, select the rpiezo_behavioral symbol from the Modules part of the Symbol Browser.
4 Figure 4: Symbol Browser Click on Place button to instantiate the piezoresistor symbol in the schematic then Close to close the Symbol Browser window
5 Figure 5: Rpiezo symbol instanced in the schematic This instance will represent the piezoresistor placed on the top edge of the membrane. Use the Duplicate function from the menu bar: Edit -> Duplicate to copy the piezoresistor instance and place the right, the bottom and finally the left piezoresistors in the schematic as in Figure 6. Select the Top piezoresistor instance and from the menu bar, click on: Edit -> Flip -> Vertical to change the orientation of the instance. The Pressure pin must be place on the bottom of the device and Rpiezo on the top as on Figure 6.
6 Figure 6: Placement of symbols in the schematic Edit the properties of the piezoresistor by using the icon or the menu bar: Edit -> Edit Object For each piezoresistor instance set the property named position with PIEZO_TOP, PIEZO_RIGHT, PIEZO_BOTTOM, PIEZO_LEFT, according to its position in the layout. Figure 7: Instance properties
7 Figure 8: Piezoresistor instances with modified placement properties Once updated, connect the instances together using the Wire icon Wheatstone bridge as below: to create the full
8 Figure 9: Wheatstone bridge with connections and ports Once connected, we will add the Input and Output ports and add names on nodes. Add the Pressure, VBias+ and VBias- input ports by using the Input Port icon. Also add the VSense+ and VSense- output ports by using the Output Port icon. Finally, add node names R_Piezo1, R_Piezo2, R_Piezo3, R_Piezo4 on each unconnected pin of the rpiezo instances by using the Node Label icon. The R_Piezo pins correspond to the resistance of each piezoresistor element. 3.2 Loads and Electronics We will now add the Pressure load using the pulse width voltage source called Source_V_pwl from the PR_LIB library.
9 Figure 10: Loads and Electrical supply Edit the properties of the Source_V_pwl instance and set the load pattern sequence as following: Pattern: 0 0 1u 0 2u 100k 3u 100k 10u 50k 11u 0 12u 0 Note: 100k Volt is equivalent to Pa, or 1000 hpa thus One atmosphere. Add a wire on the plus pin of the voltage source, and attach a label called Pressure. Naming nodes with the same name is equivalent to drawing a wire. Thu the node named Pressure will be connected to the input port called Pressure. Using the Global Symbol Instance icon, add the ground connected to the minus pin of the voltage source. Add two DC voltage source to supply the Wheatstone bridge using the Source_V_dc instance of the PR_LIB library. Edit the properties to make sure the supply voltage is 5 volts. Connect the middle node to the ground and add two wires called VBias+ on the top and VBias- on the bottom. VBias+ will generate +5V while VBias- will be 5V. We will add the output stage composed of an operational amplifier to combine the two output signals of the wheatstone bridge. Use the opamp symbol of the PR_LIB library.
10 Figure 11: Operational Amplifier Connect the positive input to VSense+, and negative input to VSense-. To output a positive signal, connect the negative output to the ground and add a wire called Vout on the positive output of the amplifier. 3.3 Simulation Directive In order to simulate the device, we will add some directive onto the schematic. These directives will be automatically exported to the spice netlist and used for the simulation.
11 Figure 12: Simulation Directives To set the simulation directives, we use the TSPICECOMMAND symbol of the PR_LIB library. Place the symbol on the schematic, and then edit the properties to set the SPICE OUTPUT parameter as follows:.model rpiezo external winfile= PATH/TO/RPIEZO.c Where PATH/TO/ corresponds to the path where you saved the tutorial material and the rpiezo.c file This first statement will determine which model to use to simulate the piezo resistor. Warning: The Paths delimiter is the / character (and not \ as in windows) A second instance will be set with:.include PATH/TO/process.sp This second statement indicates to the simulator to include the process.sp file that contains process dependant parameters. And a third instance with:.tran 0.1u 20u This last statement specifies the type of simulation to perform (transient), the maximum simulation step (0.1us) and the simulation end time (20us). We can save the design and run the simulation.
12 3.4 Simulation The T-Spice simulator can be ran directly from the S-Edit environment by clicking on T- Spice icon: Figure 13: T-Spice environment As the directives have already been set at the schematic level, we can directly run the simulation by clicking on the Run Simulation icon: The Run Simulation window should appear. Check the input and output file names, and click on Start Simulation button. During the simulation, the Simulation Status window allows you to monitor the simulation.
13 Figure 14: Simulation Status window The simulation is completed when the message Simulation completed with appears. At this step, you can run the Waveform viewer W-Edit from the T-Spice environment, or S-Edit by clicking on: 3.5 Probing Simulation Results: Measuring Gain Once the W-Edit environment is open, you can select from S-Edit the signals you want to plot. For this, use the Probe icon: Then, with the probe, select the nodes Pressure and Vout on the schematic. The W-Edit window automatically updates with the traces of the signals. Note: All the traces are gathered in the same graph. Use the Expand Chart icon display each trace in different charts. to
14 Figure 15: W-Edit Simulation Results Using the Markers button pressure., you can determine the output voltage as a function of the The output voltage value for a 1 bar pressure variation = mv The output gain, A1= mv/bar This value corresponds to the minimum gain of 100mV/bar we wanted to achieve. Close W-Edit and T-Spice. To measure the linearity of the gain, change in S-Edit the maximum Pressure load from 1 bar to 1 mbar and perform a new simulation. Again, using the Markers button pressure., determine the output voltage as a function of the The output voltage value for a 1 bar pressure variation = mv The output gain, A2= mv/bar
15 The gain linearity is given by the equation: Calculate the output linearity using the above equation. From the W-Edit window, click on: Chart -> New Chart To add a chart entry, then to add traces in this chart, click on: Chart -> Traces The Traces Windows appears: Figure 16: Adding traces From the Traces available trace list, select the R_Piezo voltages and click on Load button to copy them in the Traces in chart list. Click on OK to validate.
16 Figure 17: W-Edit Simulation Results with Piezo Resistors From the new chart you can see that the variation of the piezo-resistors resistances vary in opposition according to their position on the design. R_Piezo1 and R_Piezo3, the top and bottom piezoresistors are varying negatively while R_Piezo2 and R_Piezo4 are varying positively. Moreover the amplitude is not the same. These variations behave as given by the following equation: Where In our case, the transverse and longitudinal coefficient values are for a p-type substrate along the [110] direction: Longitudinal: 71.75e-11 /Pa Transverse: -66.3e-11 /Pa Thus for R_Piezo1 and R_Piezo3, the transverse value is predominant while for R_Piezo2 and R_Piezo4, it is the longitudinal value. You can easily modify the parameters of the piezo-resistors in the Schematic, run a new simulation and quickly see how they will impact on the target you want to reach.
17 4. LAYOUT CAPTURE 4.1 Starting MEMS L-Edit Pro From the MEMS Pro Project Manager, go in the Settings section to setup the process file we will use to capture the layout. Figure 18: MEMS Pro Project Manager In the Technology part, set the Technology name to Sensor and using the browse button, select the PR_Sensor_Tech.tdb file delivered with the tutorial material. Finally, from the Layout Editor section click on Run button to start L-Edit. Figure 19: Layout Editor section
18 4.2 Create Layout The process Layers is described as below Sub: Substrate Bulk-Etch: Substrate Etching NEpi: N-Type Silicon P-Diff: P-Type Diffusion (Piezoresistor) Contact Metal Cross Section View of the Process: We will first define the membrane: Figure 20: Cross Section view of the process Draw a NEpi box of 1600 * 1600 um using the Draw Box icon. Centered on the NEpi, add a 1000*1000 um Back_Ecth Box that corresponds to the membrane area. We will add the 4 piezoresistors. Select the Pdiff Layer, and draw 4 boxes of 100 * 20 um. Place the piezoresistors on the top, right, bottom and left inner border of the membrane. Finally, add the Metal pads and the connections with the piezoresistor.
19 Once completed save your design. Figure 21: Final Layout 4.3 3D Model Generation Before generating the 3D model, you need to generate a derived layer that will properly define the opening area for the back etch step as a function of the wafer thickness. Use the menu bar: Tools -> Generate Layers... Then from the Generate Layers window click on OK to perform. To generate the 3D model, click on the View 3D Model icon Pro Toolbar, click on:, or from the MEMS 3D Tools -> View 3D Model
20 The generator goes down the process steps to finally create the 3D model according to your mask layout. Figure 22: 3D Model of the Pressure sensor Using the orbit view icon, you can rotate the 3D model to see the other side. Figure 23: Backside view of the membrane By clicking on the Cross-Section icon 3D Model., you can perform a cutaway view from your In the Generate 3D Model Cross Section window Click on Horizontal button to perform a horizontal cutaway. Finally click on OK.
21 Figure 24: Cross Section view of the membrane By zooming close to the edge of the membrane, you can see the piezo-resistor. Figure 25: Zoom on the Piezo-resistor From the Generate 3D Model Cross Section you can also perform 3D Cross Sections. This feature is a mix between a traditional cutaway view and the 3D Model as it only cuts the 3D model along the cross-section line. Figure 26: 3D Cross Section View By using the MEMS Pro Palette menu: 3D Tools -> Export 3D Model you can save your model in SAT format to perform a structural analysis in a FEM Solver such as ANSYS.
22 EMT 432/4 MEMS Design and Fabrication Laboratory Module Name : Date : Matrix No : 3.5. RESULT: - Using 1 bar pressure: The output voltage value for a 1 bar pressure variation = mv The output gain, A1= mv/bar - After changing the maximum Pressure load from 1 bar to 1 mbar: The output voltage value for a 1 bar pressure variation = mv The output gain, A2= mv/bar The gain linearity is given by the equation: Calculate the output linearity using the above equation. Gain = A1 A2 Gain = A2 2
23 EMT 432/4 MEMS Design and Fabrication Laboratory Module 5. DISCUSSION: List and discuss all the MEMS Pro Tools that were used during piezo-resistive pressure sensor designing processes. 6. CONCLUSION: The conclusion for this lab is 3
DC Circuit Simulation
Chapter 2 DC Circuit Simulation 2.1 Starting the Project Manager 1. Select Project Manager from the Start All Program Cadence Release 16.5 Project Manager. 2. Select Allegro PCB Designer (Schematic) from
More informationMEMS Pro v5.1 Layout Tutorial Physical Design Mask complexity
MEMS Pro v5.1 Layout Tutorial 1 Physical Design Mask complexity MEMS masks are complex with curvilinear geometries Verification of manufacturing design rules is important Automatic generation of mask layout
More informationOrCad & Spice Tutorial By, Ronak Gandhi Syracuse University
OrCad & Spice Tutorial By, Ronak Gandhi Syracuse University Brief overview: OrCad is a suite of tools from Cadence for the design and layout of circuit design and PCB design. We are currently using version
More informationTutorial 3: Using the Waveform Viewer Introduces the basics of using the waveform viewer. Read Tutorial SIMPLIS Tutorials SIMPLIS provide a range of t
Tutorials Introductory Tutorials These tutorials are designed to give new users a basic understanding of how to use SIMetrix and SIMetrix/SIMPLIS. Tutorial 1: Getting Started Guides you through getting
More information1. Working with PSpice:
Applied Electronics, Southwest Texas State University, 1, 13 1. Working with PSpice: PSpice is a circuit simulator. It uses the Kirchhoff s laws and the iv-relation of the used components to calculate
More informationEE 210 Lab Assignment #2: Intro to PSPICE
EE 210 Lab Assignment #2: Intro to PSPICE ITEMS REQUIRED None Non-formal Report due at the ASSIGNMENT beginning of the next lab no conclusion required Answers and results from all of the numbered, bolded
More informationGetting started. Starting Capture. To start Capture. This chapter describes how to start OrCAD Capture.
Getting started 1 This chapter describes how to start OrCAD Capture. Starting Capture The OrCAD Release 9 installation process puts Capture in the \PROGRAM FILES\ORCAD\CAPTURE folder, and adds Pspice Student
More informationCPE/EE 427, CPE 527, VLSI Design I: Tutorial #2, Schematic Capture, DC Analysis, Transient Analysis (Inverter, NAND2)
CPE/EE 427, CPE 527, VLSI Design I: Tutorial #2, Schematic Capture, DC Analysis, Transient Analysis (Inverter, NAND2) Joel Wilder, Aleksandar Milenkovic, ECE Dept., The University of Alabama in Huntsville
More informationRevision Notes: July2004 Generate tutorial for single transistor analysis. Based on existing schematic entry tutorial developed for ECE410
Cadence Analog Tutorial 1: Schematic Entry and Transistor Characterization Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group. Revision Notes: July2004 Generate tutorial for
More informationSOUTHERN POLYTECHNIC S. U.
SOUTHERN POLYTECHNIC S. U. ECET 1012 Laboratory Exercise #4 ELECTRICAL & COMPUTER ENGINEERING TECHNOLOGY Introduction to PSpice Name Lab Section Date Overview: This laboratory experiment introduces the
More informationCadence Schematic Tutorial. EEE5320/EEE4306 Fall 2015 University of Florida ECE
Cadence Schematic Tutorial EEE5320/EEE4306 Fall 2015 University of Florida ECE 1 Remote access You may access the Linux server directly from the NEB Computer Lab using your GatorLink username and password.
More informationCadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Andrew Mason and the AMSaC lab group.
Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Andrew Mason and the AMSaC lab group. Revision Notes: Aug. 2003 update and edit A. Mason add intro/revision/contents
More informationAnalysis of a silicon piezoresistive pressure sensor
Analysis of a silicon piezoresistive pressure sensor This lab uses the general purpose finite element solver COMSOL to determine the stress in the resistors in a silicon piezoresistive pressure sensor
More informationStart ADS and Create an Empty Project
Start ADS and Create an Empty Project Look for a desktop icon or start menu item entitled Advanced Design System 2011 ADS will start up and you will see ultimately: ADS Session 1 click for new project
More informationIntroduction to NI Multisim & Ultiboard
George Washington University School of Engineering and Applied Science Electrical and Computer Engineering Department Introduction to NI Multisim & Ultiboard Dr. Amir Aslani 8/20/2017 2 Outline Design
More informationPSpice with Orcad 10
PSpice with Orcad 10 1. Creating Circuits Using PSpice Tutorial 2. AC Analysis 3. Step Response 4. Dependent Sources 5. Variable Phase VSin Source Page 1 of 29 Creating Circuits using PSpice Start Orcad
More informationLab 2: Functional Simulation Using. Affirma Analog Simulator
Lab 2: Functional Simulation Using Affirma Analog Simulator This Lab will go over: 1. Creating a test bench 2. Simulation in Spectre Spice using the Analog Design environment 1. Creating a test bench:
More informationManual for Wavenology EM Graphic Circuit Editor. Wave Computation Technologies, Inc. Jan., 2013
Manual for Wavenology EM Graphic Circuit Editor Wave Computation Technologies, Inc. Jan., 2013 1 Introduction WCT Graphic Circuit Editor is used to build a Spice circuit model in WCT EM full wave simulator.
More informationVLSI Lab Tutorial 3. Virtuoso Layout Editing Introduction
VLSI Lab Tutorial 3 Virtuoso Layout Editing Introduction 1.0 Introduction The purpose of this lab tutorial is to guide you through the design process in creating a custom IC layout for your CMOS inverter
More informationCadence Tutorial. Introduction to Cadence 0.18um, Implementation and Simulation of an inverter. A. Moradi, A. Miled et M. Sawan
Cadence Tutorial Introduction to Cadence 0.18um, Implementation and Simulation of an inverter A. Moradi, A. Miled et M. Sawan Section 1: Introduction to Cadence You will see how to create a new library
More informationGETTING STARTED WITH ADS
ADS Startup Tutorial v2 Page 1 of 17 GETTING STARTED WITH ADS Advanced Design System (ADS) from Agilent Technologies is an extremely powerful design tool for many aspects of electrical and computer engineering
More informationEECS 211 CAD Tutorial. 1. Introduction
EECS 211 CAD Tutorial 1. Introduction This tutorial has been devised to run through all the steps involved in the design and simulation of an audio tone control amplifier using the Mentor Graphics CAD
More informationCadence Tutorial: Schematic Entry and Circuit Simulation of a CMOS Inverter
Cadence Tutorial: Schematic Entry and Circuit Simulation of a CMOS Inverter Introduction This tutorial describes the steps involved in the design and simulation of a CMOS inverter using the Cadence Virtuoso
More informationAnalog IC Simulation. Mentor Graphics 2006
Analog IC Simulation Mentor Graphics 2006 Santa Clara University Department of Electrical Engineering Date of Last Revision: March 29, 2007 Table of Contents 1. Objective... 3 2. Basic Test Circuit Creation...
More informationMEMS Pro V3 Layout Tutorial
MEMS Pro V3 Layout Tutorial MEMSCAP Yiching Liang March 6, 2002 Launching MEMS Pro V3 Double click on the MEMS Pro V3 icon on your desktop to launch MEMS Pro Menu bar Standard toolbar Drawing toolbar SPR/BPR
More informationProcess technology and introduction to physical
Neuromorphic Engineering II Lab 3, Spring 2014 1 Lab 3 March 10, 2014 Process technology and introduction to physical layout Today you will start to learn to use the Virtuoso layout editor XL which is
More informationLTSPICE MANUAL. For Teaching Module EE4415 ZHENG HAUN QUN. December 2016
LTSPICE MANUAL For Teaching Module EE4415 ZHENG HAUN QUN December 2016 DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINNERING NATIONAL UNIVERSITY OF SINGAPORE Contents 1. Introduction... 2 1.1 Installation...
More informationUsing PSpice to Simulate Transmission Lines K. A. Connor Summer 2000 Fields and Waves I
Using PSpice to Simulate Transmission Lines K. A. Connor Summer 2000 Fields and Waves I We want to produce the image shown above as a screen capture or below as the schematic of this circuit. R1 V1 25
More informationEE 330 Spring 2018 Laboratory 2: Basic Boolean Circuits
EE 330 Spring 2018 Laboratory 2: Basic Boolean Circuits Contents Objective:... 2 Part 1: Introduction... 2 Part 2 Simulation of a CMOS Inverter... 3 Part 2.1 Attaching technology information... 3 Part
More informationUniversity of Kansas EECS Circuit Board Fabrication Tutorial for 212 Lab
University of Kansas EECS Circuit Board Fabrication Tutorial for 212 Lab Preparing For Export... 1 Assigning Footprints... 1 Recommended Footprints... 2 No Connects... 3 Design Rules Check... 3 Create
More informationExperiment 0: Introduction to Cadence
UNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE105 Lab Experiments Experiment 0: Introduction to Cadence Contents 1. Introduction...
More informationHow to Get Started. Figure 3
Tutorial PSpice How to Get Started To start a simulation, begin by going to the Start button on the Windows toolbar, then select Engineering Tools, then OrCAD Demo. From now on the document menu selection
More informationSimulation examples Chapter overview
Simulation examples 2 Chapter overview The examples in this chapter provide an introduction to the methods and tools for creating circuit designs, running simulations, and analyzing simulation results.
More informationCopyright 2008 Linear Technology. All rights reserved. Getting Started
Copyright. All rights reserved. Getting Started Copyright. All rights reserved. Draft a Design Using the Schematic Editor 14 Start with a New Schematic New Schematic Left click on the New Schematic symbol
More informationCadence Tutorial 2: Layout, DRC/LVS and Circuit Simulation with Extracted Parasitics
Cadence Tutorial 2: Layout, DRC/LVS and Circuit Simulation with Extracted Parasitics Introduction This tutorial describes how to generate a mask layout in the Cadence Virtuoso Layout Editor. Use of DIVA
More informationExperiment 1 Electrical Circuits Simulation using Multisim Electronics Workbench: An Introduction
Experiment 1 Electrical Circuits Simulation using Multisim Electronics Workbench: An Introduction Simulation is a mathematical way of emulating the behavior of a circuit. With simulation, you can determine
More informationActel Libero TM Integrated Design Environment v2.3 Structural Schematic Flow Design Tutorial
Actel Libero TM Integrated Design Environment v2.3 Structural Schematic Flow Design Tutorial 1 Table of Contents Design Flow in Libero TM IDE v2.3 Step 1 - Design Creation 3 Step 2 - Design Verification
More informationVLSI Lab Tutorial 1. Cadence Virtuoso Schematic Composer Introduction
VLSI Lab Tutorial 1 Cadence Virtuoso Schematic Composer Introduction 1.0 Introduction The purpose of the first lab tutorial is to help you become familiar with the schematic editor, Virtuoso Schematic
More informationCMOS Design Lab Manual
CMOS Design Lab Manual Developed By University Program Team CoreEl Technologies (I) Pvt. Ltd. 1 Objective Objective of this lab is to learn the Mentor Graphics HEP2 tools as well learn the flow of the
More informationFACULTY OF ENGINEERING MULTIMEDIA UNIVERSITY LAB SHEET DIGITAL INTEGRATED CIRCUIT
FACULTY OF ENGINEERING MULTIMEDIA UNIVERSITY LAB SHEET DIGITAL INTEGRATED CIRCUIT DIC1: Schematic Design Entry, Simulation & Verification DIC2: Schematic Driven Layout Drawing (SDL) Design Rule Check (DRC)
More informationSetting up an initial ".tcshrc" file
ECE445 Fall 2005 Introduction to SaberSketch The SABER simulator is a tool for computer simulation of analog systems, digital systems and mixed signal systems. SaberDesigner consists of the three tools,
More informationUNIVERSITY OF WATERLOO
UNIVERSITY OF WATERLOO UW ASIC DESIGN TEAM: Cadence Tutorial Description: Part I: Layout & DRC of a CMOS inverter. Part II: Extraction & LVS of a CMOS inverter. Part III: Post-Layout Simulation. The Cadence
More informationWhat s new in MEMS Pro V8.0 Highlights
Click to edit Master title style 1 What s new in MEMS Pro V8.0 Highlights Click Contents to edit Master title style New platform support File I/O enhancements 3D Modeling enhancements Layout enhancements
More informationCMOS INVERTER LAYOUT TUTORIAL
PRINCESS SUMAYA UNIVERSITY FOR TECHNOLOGY CMOS INVERTER LAYOUT TUTORIAL We will start the inverter by drawing a PMOS. The first step is to draw a poly layer. Click on draw a rectangle and choose the poly
More informationKiCad Example Schematic ( ) Wien Bridge Oscillator
KiCad Example Schematic (2010-05-05) Wien Bridge Oscillator University of Hartford College of Engineering, Technology, and Architecture The following tutorial in that it walks you through steps to use
More informationLesson 2: DC Bias Point Analysis
2 Lesson 2: DC Bias Point Analysis Lesson Objectives After you complete this lesson you will be able to: Create a simulation profile for DC Bias analysis Netlist the design for simulation Run a DC Bias
More informationCREATING A 3D VIA MODEL IN HYPERLYNX FOR CHANNEL ANALYSIS
CREATING A 3D VIA MODEL IN HYPERLYNX FOR CHANNEL ANALYSIS w w w. m e n t o r. c o m Creating a 3D Via Model in HyperLynx for Channel Analysis This lab will illustrate the integrated 3D via solver within
More informationBulk MEMS Layout 2017 Dr. Lynn Fuller, Casey Gonta, Patsy Cadareanu Webpage:
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Bulk MEMS Layout 2017 Dr. Lynn Fuller, Casey Gonta, Patsy Cadareanu Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester,
More information- create new schematic to the new project, PCB design begins with a schematic diagram, which present how components are connected
Eagle 8.x tutorial - create a new project, Eagle designs are organized as projects - create new schematic to the new project, PCB design begins with a schematic diagram, which present how components are
More informationESE 570 Cadence Lab Assignment 2: Introduction to Spectre, Manual Layout Drawing and Post Layout Simulation (PLS)
ESE 570 Cadence Lab Assignment 2: Introduction to Spectre, Manual Layout Drawing and Post Layout Simulation (PLS) Objective Part A: To become acquainted with Spectre (or HSpice) by simulating an inverter,
More informationA Crash Course on Using Agilent Advanced Design System (ADS)
A Crash Course on Using Agilent Advanced Design System (ADS) By Chris Sanabria, sanabria@ece.ucsb.edu 2/9/02 If you are an engineer and have anything to do with circuit simulation, in particular high frequency
More informationUsing KiCad with AimSpice Doc 0.2 CETA - Univ. Hartford, Connecticut, USA
Using KiCad with AimSpice Doc 0.2 CETA - Univ. Hartford, Connecticut, USA KiCad is a open source software package for schematic capture and PC board layout. KiCad also provides some capability in producing
More informationInstructions for EE 42 PSpice Assignment
Instructions for EE 42 PSpice Assignment This assignment gives you an introduction to the SPICE circuit simulator. You will use the PSpice version of it to analyze a few problems from previous homework
More informationExercise 1. Section 2. Working in Capture
Exercise 1 Section 1. Introduction In this exercise, a simple circuit will be drawn in OrCAD Capture and a netlist file will be generated. Then the netlist file will be read into OrCAD Layout. In Layout,
More informationAMS 0.18 µm PDK Setup and Cadence Tutorial Contributors
AMS 0.18 µm PDK Setup and Cadence Tutorial Contributors Muhammad Ahmed, Sita Asar, and Ayman Fayed, Power Management Research Lab, https://pmrl.osu.edu, Department of Electrical and Computer Engineering,
More informationWhat s New in PADS
What s New in PADS 2007.4 Copyright Mentor Graphics Corporation 2008 All Rights Reserved. Mentor Graphics, Board Station, ViewDraw, Falcon Framework, IdeaStation, ICX and Tau are registered trademarks
More informationLesson 9: Processing a Schematic Design
Lesson 9: Processing a Schematic Design Lesson Objectives After you complete this lab you will be able to: Assign reference designators Check the design for errors Create a netlist for OrCAD and Allegro
More informationCadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group.
Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group. Revision Notes: Jan. 2006 Updated for use with spectre simulator
More informationMENTOR GRAPHICS IC DESIGN MANUAL. Schematic & Simulation. Gun Jun K Praveen Jayakar Thomas Zheng Huan Qun
MENTOR GRAPHICS IC DESIGN MANUAL Schematic & Simulation By Gun Jun K Praveen Jayakar Thomas Zheng Huan Qun August 2004 Signal Processing & VLSI Design Laboratory Department of Electrical & Computer Engineering
More informationProfessor Muller Fall 2016 Sameet Ramakrishnan Eric Chang Adapted from prior EE140 and EE141 labs. EE 140/240A Lab 0 Full IC Design Flow
Professor Muller Fall 2016 Sameet Ramakrishnan Eric Chang Adapted from prior EE140 and EE141 labs EE 140/240A Lab 0 Full IC Design Flow In this lab, you will walk through the full process an analog designer
More informationEECE 285 VLSI Design. Cadence Tutorial EECE 285 VLSI. By: Kevin Dick Co-author: Jeff Kauppila Co-author: Dr. Arthur Witulski
Cadence Tutorial EECE 285 VLSI By: Kevin Dick Co-author: Jeff Kauppila Co-author: Dr. Arthur Witulski 1 Table of Contents Purpose of Cadence 1) The Purpose of Cadence pg. 4 Linux 1) The Purpose of Linux
More informationCadence Virtuoso Schematic Design and Circuit Simulation Tutorial
Cadence Virtuoso Schematic Design and Circuit Simulation Tutorial Introduction This tutorial is an introduction to schematic capture and circuit simulation for ENGN1600 using Cadence Virtuoso. These courses
More informationAPPENDIX-A INTRODUCTION TO OrCAD PSPICE
220 APPENDIX-A INTRODUCTION TO OrCAD PSPICE 221 APPENDIX-A INTRODUCTION TO OrCAD PSPICE 1.0 INTRODUCTION Computer aided circuit analysis provides additional information about the circuit performance that
More informationPSpice Tutorial. Physics 160 Spring 2006
PSpice Tutorial This is a tutorial designed to guide you through the simulation assignment included in the first homework set. You may either use the program as installed in the lab, or you may install
More informationClick on the SwCAD III shortcut created by the software installation.
LTSpice Guide Click on the SwCAD III shortcut created by the software installation. Select File and New Schematic. Add a component Add a resistor Press R or click the resistor button to insert a resistor.
More informationUsing Cadence Virtuoso, a UNIX based OrCAD PSpice like program, Remotely on a Windows Machine
Using Cadence Virtuoso, a UNIX based OrCAD PSpice like program, Remotely on a Windows Machine A. Launch PuTTY. 1. Load the Saved Session that has Enable X11 forwarding and the Host Name is cvl.ece.vt.edu.
More informationEE 330 Laboratory 3 Layout, DRC, and LVS Fall 2015
EE 330 Laboratory 3 Layout, DRC, and LVS Fall 2015 Contents Objective:... 2 Part 1 Creating a layout... 2 1.1 Run DRC Early and Often... 2 1.2 Create N active and connect the transistors... 3 1.3 Vias...
More informationQuick Start Training Guide
Quick Start Training Guide Table of Contents 1 INTRODUCTION TO MAPLESIM... 5 1.1 USER INTERFACE... 5 2 WORKING WITH A SAMPLE MODEL... 7 2.1 RUNNING A SIMULATION... 7 2.2 GRAPHICAL OUTPUT... 7 2.3 3D VISUALIZATION...
More informationLab 1: Analysis of DC and AC circuits using PSPICE
Lab 1: Analysis of DC and AC circuits using PSPICE 1. Objectives. 1) Familiarize yourself with PSPICE simulation software environment. 2) Obtain confidence in performing DC and AC circuit simulation. 2.
More informationSCHEMATIC1 SCHEMATIC2 SCHEMATIC1 SCHEMATIC2 SCHEMATIC3 PAGE1 PAGE2 PAGE3 PAGE1 PAGE1 PAGE2 PAGE1 PAGE1 PAGE2
An OrCAD Tutorial Dr. S.S.Limaye 1. Introduction OrCAD is a suite of tools from Cadence company for the design and layout of printed circuit boards (PCBs). This is the most popular tool in the industry.
More informationPOL BMR466 Evaluation Board
1/28701- Rev A May 2018 POL BMR466 Evaluation Board 2 1/28701- Rev A May 2018 Contents 1 Introduction... 3 1.1 Prerequisites... 3 2 Reference Board... 4 3 USB to PMBus adaptor... 5 3.1 Connection of Flex
More informationComplete Tutorial (Includes Schematic & Layout)
Complete Tutorial (Includes Schematic & Layout) Download 1. Go to the "Download Free PCB123 Software" button or click here. 2. Enter your e-mail address and for your primary interest in the product. (Your
More informationOrcad Tutorial: Oscillator design and Simulation Schematic Design and Simulation in Orcad Capture CIS Full Version
Orcad Tutorial: Oscillator design and Simulation Prof. Law Schematic Design and Simulation in Orcad Capture CIS Full Version Notation: To simplify what one should click to perform a task, the following
More informationFigure 1: ADE Test Editor
Due to some issues that ADE GXL simulation environment has (probably because of inappropriate setup), we will run simulations in the ADE L design environment, which includes all the necessary tools that
More informationCPE/EE 427, CPE 527, VLSI Design I: Tutorial #1, Full Custom VLSI (inverter layout)
CPE/EE 427, CPE 527, VLSI Design I: Tutorial #1, Full Custom VLSI (inverter layout) Joel Wilder, Aleksandar Milenkovic, ECE Dept., The University of Alabama in Huntsville Adapted from Virginia Tech, Dept.
More informationLTspice Getting Started Guide. Copyright 2007 Linear Technology. All rights reserved.
Copyright 2007 Linear Technology. All rights reserved. Why Use LTspice? Stable SPICE circuit simulation with Unlimited number of nodes Schematic/symbol editor Waveform viewer Library of passive devices
More information2008 년안산일대디지털정보통신학과 CAD 강의용자료 PADS 2007
2008 년안산일대디지털정보통신학과 CAD 강의용자료 PADS 2007 1 Learning the PADS User Interface What you will learn: Modeless Commands Panning & Zooming Object Selection Methods Note: This tutorial will use PADS Layout to
More informationTUTORIAL II ECE 555 / 755 Updated on September 11 th 2006 CADENCE LAYOUT AND PARASITIC EXTRACTION
TUTORIAL II ECE 555 / 755 Updated on September 11 th 2006 CADENCE LAYOUT AND PARASITIC EXTRACTION After finishing a schematic of your design (Tutorial-I), the next step is creating masks which are for
More informationCadence Virtuoso Simulation of a pixel
MEMS AND MICROSENSORS 2018/2019 Cadence Virtuoso Simulation of a pixel 11/12/2018 Giorgio Mussi giorgio.mussi@polimi.it Introduction In this lab, we will use Cadence Virtuoso to simulate a sub-array of
More informationDocument Manager 6.0 Users Manual by Scanlon Associates
Document Manager 6.0 Users Manual by Scanlon Associates Version 6.0.70725 I Document Manager 6.0.70725 Table of Contents Part I Getting Started 2 1 Steps to a Successful... Implementation 2 2 Edit Document...
More informationCadence IC Design Manual
Cadence IC Design Manual For EE5518 ZHENG Huan Qun Lin Long Yang Revised on May 2017 Department of Electrical & Computer Engineering National University of Singapore 1 P age Contents 1 INTRODUCTION...
More informationMapleSim User's Guide
MapleSim User's Guide Copyright Maplesoft, a division of Waterloo Maple Inc. 2001-2009 MapleSim User's Guide Copyright Maplesoft, MapleSim, and Maple are all trademarks of Waterloo Maple Inc. Maplesoft,
More informationCadence Analog Circuit Tutorial
Cadence Analog Circuit Tutorial Schematic Entry for Analog Designs- Passive Circuits (RLC Circuit) In this tutorial, we will build the circuit shown in figure 1 below, using the Cadence Composer tool.
More informationEE 330 Laboratory Experiment Number 11
EE 330 Laboratory Experiment Number 11 Design and Simulation of Digital Circuits using Hardware Description Languages Fall 2017 Contents Purpose:... 3 Background... 3 Part 1: Inverter... 4 1.1 Simulating
More informationHW #2 - Eagle Tutorial
HW #2 - Eagle Tutorial The goal of this homework is to teach the user the basic steps of producing a switching power supply schematic and a printed circuit board using the Eagle Application. While tutorial
More informationDOWNLOAD PDF CADENCE WAVEFORM CALCULATOR USER GUIDE
Chapter 1 : CSE / Cadence Tutorial The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems
More informationEE115C Digital Electronic Circuits. Tutorial 2: Hierarchical Schematic and Simulation
EE115C Digital Electronic Circuits Tutorial 2: Hierarchical Schematic and Simulation The objectives are to become familiar with Virtuoso schematic editor, learn how to create the symbol view of basic primitives,
More informationLaboratory 3. EE 342 (VLSI Circuit Design) - Using Spectre netlist and Calculator for simulation
EE 342 (VLSI Circuit Design) Laboratory 3 - Using Spectre netlist and Calculator for simulation By Mulong Li, 2013 1 Background knowledge Spectre: is a SPICE-class circuit simulator. It provides the basic
More informationSMS v SRH-2D Tutorials Obstructions. Prerequisites. Requirements. Time. Objectives
SMS v. 12.3 SRH-2D Tutorials Obstructions Objectives This tutorial demonstrates the process of creating and defining in-stream obstructions within an SRH-2D model. The SRH-2D Simulations tutorial should
More informationTINA-TI Simulation Software. Application Note
TINA-TI Simulation Software Application Note Phil Jaworski Design Team 6 11/16/2012 Abstract TINA-TI is a circuit design and simulation tool created by both Texas Instruments and DesignSoft that has helped
More informationSPICE Models: ROHM Voltage Detector ICs
SPICE Models: ROHM Voltage Detector ICs BD48 G/FVE,BD49 G/FVE,BD52 G/FVE,BD53 G/FVE, No.10006EAY01 1. INTRODUCTION 1.1 SPICE SPICE is a general-purpose circuit-simulation program for nonlinear DC, nonlinear
More informationPADS-PowerPCB 4 Tutorial (with Blazeroute)
PADS-PowerPCB 4 Tutorial (with Blazeroute) PADS-PowerPCB is the ultimate design environment for complex, high-speed printed circuit boards. PROCEDURE FOR SIMULATION IN SCHEMATICS 1. Importing Design Data
More informationEE4111 Advanced Analog Electronics Design. Spring 2009 Experiment #4 April 6 ~ April 17
EE4111 Advanced Analog Electronics Design Spring 2009 Experiment #4 April 6 ~ April 17 Setup Cadence in VLSI Lab 1) Copy files $ cp r /home/grads/ee4111ta ~/ 2) Edit your.cshrc file -- Include the following
More informationSMS v Obstructions. SRH-2D Tutorial. Prerequisites. Requirements. Time. Objectives
SMS v. 12.1 SRH-2D Tutorial Objectives This tutorial demonstrates the process of creating and defining in-stream obstructions within an SRH-2D model. The SRH-2D Simulations tutorial should have been completed
More informationIntroduction to Electronics Workbench
Introduction to Electronics Workbench Electronics Workbench (EWB) is a design tool that provides you with all the components and instruments to create board-level designs on your PC. The user interface
More informationWorkshop 5-1: Dynamic Link
Workshop 5-1: Dynamic Link 2015.0 Release ANSYS HFSS for Antenna Design 1 2015 ANSYS, Inc. Overview Linear Circuit Overview Dynamic Link Push Excitations Dynamic Link Example: Impedance Matching of Log-Periodic
More informationMicroelectronica. Full-Custom Design with Cadence Tutorial
Área Científica de Electrónica Microelectronica Full-Custom Design with Cadence Tutorial AustriaMicroSystems C35B3 (HIT-Kit 3.70) Marcelino Santos Table of contends 1. Starting Cadence... 3 Starting Cadence
More informationGraph based simulation tutorial
Capítulo 1 Graph based simulation tutorial 1.1. Introduction The purpose of this tutorial is to show you, by use of a simple amplifier circuit, how to perform a graph based simulation using PROTEUS VSM.
More informationAnsys Designer RF Training Lecture 2: Introduction to the Designer GUI
Ansys Designer RF Solutions for RF/Microwave Component and System Design 7. 0 Release Ansys Designer RF Training Lecture 2: Introduction to the Designer GUI Ansoft Designer Desktop Menu bar Toolbars Schematic
More informationOrcad Layout Plus Tutorial
Orcad Layout Plus Tutorial Layout Plus is a circuit board layout tool that accepts a layout-compatible circuit netlist (ex. from Capture CIS) and generates an output layout files that suitable for PCB
More information