AZ H Transient Voltage Suppressing Device For ESD/Transient Protection. Features. Circuit Diagram / Pin Configuration. Applications.

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1 Features ESD Protection for Line with Bi-directional. Provide ESD protection for the protected line to IEC (ESD) ±0kV (air), ±kv (contact) IEC (EFT) 40A (5/50ns) IEC (Lightning) 7A (8/0µs) Cable Discharge Event (CDE) Ultra-small SOD-53 package saves board space. Protect one I/O line or one power line Fast turn-on and Low clamping voltage For low operating voltage applications: 5V, 4.V, 3.3V,.5V Solid-state silicon-avalanche and active circuit triggering technology Applications During transient conditions, the proprietary clamping cells prevent over-voltage on the power line or control/data lines, protecting any downstream components. AZ05-0H is bi-directional and may be used on lines where the signal swings above and below ground. AZ05-0H may be used to meet the ESD immunity requirements of IEC , Level 4 (±5kV air, ±8kV contact discharge). Circuit Diagram / Pin Configuration Computer Interfaces Protection Microprocessors Protection Serial and Parallel Ports Protection Control Signal Lines Protection Power lines on PCB Protection Latchup Protection Description AZ05-0H is a design which includes a bi-directional surge rated clamping cell to protect one power line, or one control line, or one low speed data line in an electronic systems. The AZ05-0H has been specifically designed to protect sensitive components which are connected to power and control lines from over-voltage damage and latch-up caused by Electrostatic Discharging (ESD), Electrical Fast Transients (EFT), Lightning, and Cable Discharge Event (CDE). SOD-53 (Top View) AZ05-0H is a unique design which includes proprietary clamping cells in a single package. Revision 0/06/8 0 Amazing Micro.

2 SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PARAMETER PARAMETER RATING UNITS Peak Pulse Current (tp =8/0us) I PP 8.5 A Operating Supply Voltage (pin-,- to pin-3) V DC 6 V ESD per IEC (Air) ESD per IEC (Contact) V ESD- ± ±5 kv Lead Soldering Temperature T SOL 60 (0 sec.) Operating Temperature T OP -55 to +5 Storage Temperature T STO -55 to +50 o C o C o C ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL CONDITIONS MINI TYP MAX UNITS Reverse Stand-Off Voltage Reverse Leakage Current Reverse Breakdown Voltage V RWM T=5 o C. 5 V I Leak V RWM = 5V, T=5 o C..5 µa V BV I BV = ma, T=5 o C V Clamping Voltage V CL I PP =5A, tp=8/0us, T=5 o C. 7 8 V Clamping Voltage V CL I PP =7A, tp=8/0us, T=5 o C. 8 9 V ESD Holding Voltage Channel Input Capacitance V hold IEC kV, T=5 o C, 0.5 V Contact mode. C IN V R = 0V, f = MHz, T=5 o C pf Revision 0/06/8 0 Amazing Micro.

3 Typical Characteristics Clamping Voltage (V) Clamping Voltage vs. Peak Pulse Current Peak pulse Current (A) Waveform Parameters: tr=8µs td=0µs Capacitance (pf) Typical Variation C IN vs V IN 5 4 f= MHz Bias Voltage (V) Transmission Line Pulsing (TLP) Current (A) Transmission Line Pulsing (TLP) Measurement V_pulse Pulse from a transmission line TLP_I 00ns + TLP_V DUT Transmission Line Pulsing (TLP) Voltage (V) Revision 0/06/8 0 Amazing Micro. 3

4 Applications Information The AZ05-0H is designed to protect one line against System ESD/EFT/Lightning pulses by clamping them to an acceptable reference. It provides bi-directional protection. The usage of the AZ05-0H is shown in Fig.. Protected line, such as data lines, control lines, or power lines, is connected at pin. The pin is connected to a ground plane on the board. Since AZ05-0H is bi-directional, these connections can be reversed (protected line to pin, ground to pin ). In order to minimize parasitic inductance in the board traces, all path lengths connected to the pins of AZ05-0H should be kept as short as possible. In order to obtain enough suppression of ESD induced transient, good circuit board is critical. Thus, the following guidelines are recommended: Minimize the path length between the protected lines and the AZ05-0H. Place the AZ05-0H near the input terminals or connectors to restrict transient coupling. The ESD current return path to ground should be kept as short as possible. Use ground planes whenever possible. NEVER route critical signals near board edges and near the lines which the ESD transient easily injects to. Input Output V BR Transient Voltage -V BR V CL -V CL Normal Operation V BR -V BR Protected Devices Fig. Revision 0/06/8 0 Amazing Micro. 4

5 Mechanical Details SOD-53 PACKAGE DIAGRAMS TOP VIEW LAND LAYOUT 0.8mm 0.6mm 0.9mm 0.6mm SIDE VIEW Notes: This LAND LAYOUT is for reference purposes only. Please consult your manufacturing partners to ensure your company s PCB design guidelines are met. MARKING CODE PACKAGE DIMENSIONS Symbol Millimeters Inches MIN. MAX. MIN. MAX. A B C D E E AX Part Number A = Device Code X = Date Code Marking Code AZ05-0H (Rohs part) AX AZ05-0H (Green part) ax Revision 0/06/8 0 Amazing Micro. 5

6 Ordering Information PN# Material Type Reel size MOQ/interal box MOQ/carton AZ05-0H.R7G Green T/R 7 inch 4 reel=6,000/box 6 box=96,000/carton Revision History Revision Revision 006/0/0 Revision 006//08 Revision 007/0/07 Revision 007/05/5 Revision 007/08/0 Revision 008/03/4 Revision 008/04/0 Revision 008//6 Revision 0/06/8 Modification Description Original Release.. Change the clamping cell symbol for easy understanding.. Change the TLP characterization from 6A to 7A. 3. Add the ESD holding voltage characterization under IEC kV contact mode. 4. Update the C IN value (typ, max.) from ( pf, 5 pf) to (.5 pf, 3.5 pf).. Change the Characterization Temp of V RWM, V Leak, and V BV from 5 o C to 5 o C.. Modify the ABSOLUTE MAXIMUM RATINGS of ESD. Change Qty per Reel from 3000 to 4000 in the Ordering Information. Remove the Ordering Information. Modify the description in the Features, from Low operating voltage: 5V to For low operating voltage applications: 5V, 4.V, 3.3V,.5V. Add marking code for the Green part. Update the PACKAGE DIMENSIONS.. Update the Company Logo.. Add the Ordering Information. Revision 0/06/8 0 Amazing Micro. 6