Arquitectura de Computadores

Transcription

1 Arquitectura de Computadores Capítulo 5. Almaceamieto y otros aspectos de la E/S Based o the origial material of the book: D.A. Patterso y J.L. Heessy Computer Orgaizatio ad Desig: The Hardware/Software Iterface 4 th editio. Escuela Politécica Superior Uiversidad Autóoma de Madrid Profesores: G130 y G131: Ivá Gozález Martíez G136: Fracisco Javier Gómez Arribas

2 Itroductio I/O devices ca be characterized by Behaviour: iput, output, storage Parter: huma or machie Data rate: bytes/sec, trasfers/sec I/O bus coectios 6.1 Itroductio 2

3 I/O System Characteristics Depedability is importat Particularly for storage devices Performace measures Latecy (respose time) Throughput (badwidth) Desktops & embedded systems Maily iterested i respose time & diversity of devices Servers Maily iterested i throughput & expadability of devices 3

4 Depedability Measures Service accomplishmet Service delivered as specified Restoratio Failure Service iterruptio Deviatio from specified service Reliability: mea time to failure (MTTF) Service iterruptio: mea time to repair (MTTR) Mea time betwee failures MTBF = MTTF + MTTR Availability = MTTF / (MTTF + MTTR) Improvig Availability Icrease MTTF: fault avoidace, fault tolerace, fault forecastig Reduce MTTR: improved tools ad processes for diagosis ad repair 4

5 Disk Storage Novolatile, rotatig magetic storage 6.3 Disk Storage Chapter 6 Storage ad Other I/O Topics 5

6 Disk Sectors ad Access Each sector records Sector ID Data (512 bytes, 4096 bytes proposed) Error correctig code (ECC) Used to hide defects ad recordig errors Sychroizatio fields ad gaps Access to a sector ivolves Queuig delay if other accesses are pedig Seek: move the heads Rotatioal latecy Data trasfer Cotroller overhead 6

7 Disk Access Example Give 512B sector, 15,000rpm, 4ms average seek time, 100MB/s trasfer rate, 0.2ms cotroller overhead, idle disk Average read time 4ms seek time + ½ / (15,000/60) = 2ms rotatioal latecy B / 100MB/s = 0.005ms trasfer time + 0.2ms cotroller delay = 6.2ms If actual average seek time is 1ms Average read time = 3.2ms 7

8 RAID Redudat Array of Iexpesive (Idepedet) Disks Use multiple smaller disks (c.f. oe large disk) Parallelism improves performace Plus extra disk(s) for redudat data storage Provides fault tolerat storage system Especially if failed disks ca be hot swapped RAID 0 No redudacy ( AID?) Just stripe data over multiple disks But it does improve performace 8

9 RAID 1 & 2 RAID 1: Mirrorig N + N disks, replicate data Write data to both data disk ad mirror disk O disk failure, read from mirror RAID 2: Error correctig code (ECC) N + E disks (e.g., ) Split data at bit level across N disks Geerate E-bit ECC Too complex, ot used i practice 9

10 RAID 3: Bit-Iterleaved Parity N + 1 disks Data striped across N disks at byte level Redudat disk stores parity Read access Read all disks Write access Geerate ew parity ad update all disks O failure Use parity to recostruct missig data Not widely used 10

11 RAID 4: Block-Iterleaved Parity N + 1 disks Data striped across N disks at block level Redudat disk stores parity for a group of blocks Read access Read oly the disk holdig the required block Write access Just read disk cotaiig modified block, ad parity disk Calculate ew parity, update data disk ad parity disk O failure Use parity to recostruct missig data Not widely used 11

12 RAID 3 vs RAID 4 12

13 RAID 5: Distributed Parity N + 1 disks Like RAID 4, but parity blocks distributed across disks Avoids parity disk beig a bottleeck Widely used 13

14 RAID 6: P + Q Redudacy N + 2 disks Like RAID 5, but two lots of parity Greater fault tolerace through more redudacy Multiple RAID More advaced systems give similar fault tolerace with better performace 14

15 RAID Summary RAID ca improve performace ad availability High availability requires hot swappig Assumes idepedet disk failures Too bad if the buildig burs dow! See Hard Disk Performace, Quality ad Reliability 15

16 Flash Storage Novolatile semicoductor storage faster tha disk Smaller, lower power, more robust 6.4 Flash Storage But more $/GB (betwee disk ad DRAM) 16

17 Flash Types NOR flash: bit cell like a NOR gate Radom read/write access Used for istructio memory i embedded systems NAND flash: bit cell like a NAND gate Deser (bits/area), but block-at-a-time access Cheaper per GB Used for USB keys, media storage, Flash bits wears out after 1000 s of accesses Not suitable for direct RAM or disk replacemet Wear levelig: remap data to less used blocks 17

18 Itercoectig Compoets Need itercoectios betwee CPU, memory, I/O cotrollers Bus: shared commuicatio chael Parallel set of wires for data ad sychroizatio of data trasfer Ca become a bottleeck Performace limited by physical factors Wire legth, umber of coectios More recet alterative: high-speed serial coectios with switches Like etworks 6.5 Coectig Processors, Memory, ad I/O Devices 18

19 Bus Types Processor-Memory buses Short, high speed Desig is matched to memory orgaizatio I/O buses Loger, allowig multiple coectios Specified by stadards for iteroperability Coect to processor-memory bus through a bridge 19

20 Bus Sigals ad Sychroizatio Data lies Carry address ad data Multiplexed or separate Cotrol lies Idicate data type, sychroize trasactios Sychroous Uses a bus clock Asychroous Uses request/ackowledge cotrol lies for hadshakig 20

21 I/O Bus Examples Firewire USB 2.0 PCI Express Serial ATA Serial Attached SCSI Iteded use Exteral Exteral Iteral Iteral Exteral Devices per chael Data width 4 2 2/lae 4 4 Peak badwidth Hot pluggable 50MB/s or 100MB/s 0.2MB/s, 1.5MB/s, or 60MB/s 250MB/s/lae 1, 2, 4, 8, 16, MB/s 300MB/s Yes Yes Depeds Yes Yes Max legth 4.5m 5m 0.5m 1m 8m Stadard IEEE 1394 USB Implemeters Forum PCI-SIG SATA-IO INCITS TC T10 21

22 I/O Bus Examples Firewire USB 2.0 PCI Express Serial ATA Serial Attached SCSI Iteded use Exteral Exteral Iteral Iteral Exteral Devices per chael Data width 4 2 2/lae 4 4 Peak badwidth Hot pluggable 50MB/s or 100MB/s 0.2MB/s, 1.5MB/s, or 60MB/s 250MB/s/lae 1, 2, 4, 8, 16, MB/s 300MB/s Yes Yes Depeds Yes Yes Max legth 4.5m 5m 0.5m 1m 8m Stadard IEEE 1394 USB Implemeters Forum PCI-SIG SATA-IO INCITS TC T10 22

23 Processor/core Itercoect Buses Quick Path Itercoect (QPI) HyperTrasport (HT) 23

24 System Architecture Sigle Processor - Itel Depeds o the microprocessor architecture ad the chipset maufacturer Itel Core i7 24

25 System Architecture Dual Processor - AMD 25

26 I/O Maagemet I/O is mediated by the OS Multiple programs share I/O resources Need protectio ad schedulig I/O causes asychroous iterrupts Same mechaism as exceptios 6.6 Iterfacig I/O Devices I/O programmig is fiddly OS provides abstractios to programs 26

27 I/O Commads I/O devices are maaged by I/O cotroller hardware Trasfers data to/from device Sychroizes operatios with software Commad registers Cause device to do somethig (read, write) Status registers Idicate what the device is doig ad occurrece of errors Data registers Write: trasfer data to a device Read: trasfer data from a device 27

28 I/O Register Mappig Memory mapped I/O Registers are addressed i same space as memory Address decoder distiguishes betwee them OS uses address traslatio mechaism to make them oly accessible to kerel I/O istructios Separate istructios to access I/O registers Ca oly be executed i kerel mode Example: x86 (Itel) 28

29 Pollig Periodically check I/O status register If device ready, do operatio If error, take actio Commo i small or low-performace realtime embedded systems Predictable timig Low hardware cost I other systems, wastes CPU time 29

30 Iterrupts Whe a device is ready or error occurs Cotroller iterrupts CPU Iterrupt is like a exceptio But ot sychroized to istructio executio Ca ivoke hadler betwee istructios Cause iformatio ofte idetifies the iterruptig device Priority iterrupts Devices eedig more urget attetio get higher priority Ca iterrupt hadler for a lower priority iterrupt 30

31 I/O Data Trasfer Pollig ad iterrupt-drive I/O CPU trasfers data betwee memory ad I/O data registers Time cosumig for high-speed devices Direct memory access (DMA) OS provides startig address i memory I/O cotroller trasfers to/from memory autoomously Cotroller iterrupts o completio or error 31

32 DMA/Cache Iteractio If DMA writes to a memory block that is cached Cached copy becomes stale If write-back cache has dirty block, ad DMA reads memory block Reads stale data Need to esure cache coherece Flush blocks from cache if they will be used for DMA Or use o-cacheable memory locatios for I/O 32

33 DMA/VM Iteractio OS uses virtual addresses for memory DMA blocks may ot be cotiguous i physical memory Should DMA use virtual addresses? Would require cotroller to do traslatio If DMA uses physical addresses May eed to break trasfers ito page-sized chuks Or chai multiple trasfers Or allocate cotiguous physical pages for DMA 33

34 Measurig I/O Performace I/O performace depeds o Hardware: CPU, memory, cotrollers, buses Software: operatig system, database maagemet system, applicatio Workload: request rates ad patters I/O system desig ca trade-off betwee respose time ad throughput Measuremets of throughput ofte doe with costraied respose-time 6.7 I/O Performace Measures: 34

35 I/O vs. CPU Performace Amdahl s Law Do t eglect I/O performace as parallelism icreases compute performace Example Bechmark takes 90s CPU time, 10s I/O time Double the umber of CPUs/2 years I/O uchaged 6.9 Parallelism ad I/O: RAID Year CPU time I/O time Elapsed time % I/O time ow 90s 10s 100s 10% +2 45s 10s 55s 18% +4 23s 10s 33s 31% +6 11s 10s 21s 47% 35

36 I/O System Desig Satisfyig latecy requiremets For time-critical operatios If system is uloaded Add up latecy of compoets Maximizig throughput 6.8 Desigig ad I/O System Fid weakest lik (lowest-badwidth compoet) Cofigure to operate at its maximum badwidth Balace remaiig compoets i the system If system is loaded, simple aalysis is isufficiet Need to use queuig models or simulatio 36

37 Server Computers Applicatios are icreasigly ru o servers Web search, office apps, virtual worlds, Requires large data ceter servers Multiple processors, etworks coectios, massive storage Space ad power costraits 6.10 Real Stuff: Su Fire x4150 Server Server equipmet built for 19 racks Multiples of 1.75 (1U) high 37

38 Rack-Mouted Servers Su Fire x4150 1U server 38

39 Su Fire x4150 1U server 4 cores each 16 x 4GB = 64GB DRAM 39

40 I/O System Desig Example Give a Su Fire x4150 system with Workload: 64KB disk reads Each I/O op requires 200,000 user-code istructios ad 100,000 OS istructios Each CPU: 10 9 istructios/sec FSB: 10.6 GB/sec peak DRAM DDR2 667MHz: GB/sec PCI-E 8 bus: 8 250MB/sec = 2GB/sec Disks: 15,000 rpm, 2.9ms avg. seek time, 112MB/sec trasfer rate What I/O rate ca be sustaied? For radom reads, ad for sequetial reads 40

41 Desig Example (cot) I/O rate for CPUs Per core: 10 9 /(100, ,000) = 3,333 8 cores: 26,667 ops/sec Radom reads, I/O rate for disks Assume actual seek time is average/4 Time/op = seek + latecy + trasfer = 2.9ms/4 + 4ms/2 + 64KB/(112MB/s) = 3.3ms 303 ops/sec per disk, 2424 ops/sec for 8 disks Sequetial reads 112MB/s / 64KB = 1750 ops/sec per disk 14,000 ops/sec for 8 disks 41

42 Desig Example (cot) PCI-E I/O rate 2GB/sec / 64KB = 31,250 ops/sec DRAM I/O rate GB/sec / 64KB = 83,375 ops/sec FSB I/O rate Assume we ca sustai half the peak rate 5.3 GB/sec / 64KB = 81,540 ops/sec per FSB 163,080 ops/sec for 2 FSBs Weakest lik: disks 2424 ops/sec radom, 14,000 ops/sec sequetial Other compoets have ample headroom to accommodate these rates 42

43 Cocludig Remarks I/O performace measures Throughput, respose time Depedability ad cost also importat Buses used to coect CPU, memory, I/O cotrollers Pollig, iterrupts, DMA I/O bechmarks TPC, SPECSFS, SPECWeb RAID Improves performace ad depedability 6.13 Cocludig Remarks 43