3-Dimensional Monolithic Nonvolatile Memories and the Future of Solid-State Data Storage

Transcription

1 3-Dimensional Monolithic Nonvolatile Memories and the Future of Solid-State Data Storage Dr. Michael A. Vyvoda Director, Technology Transfer and Operations 3D Technology Group SanDisk Corporation February 8 th, 28

2 Outline Flash memory market dynamics: what drives technology advances? The floating-gate technology roadmap Scaling challenges: what will replace the floating gate? Monolithic 3D memory: technical overview and future potential 2

3 Flash Memory Market Dynamics 3

4 Strong Demand Drivers of Flash Market Growth Lifestyle Storage Billions of MB 6, Data Imaging Audio 5.4 Trillion MB Video & PC 4, 2,, 8, 6, 4, 2, -.4 Billion MB Media Player USB Mobile Phone PC Other Automotive PC Gaming Mobile Phone Camcorder USB Drive Media Player Digital Camera Source: Gartner Dataquest, November 26 Bits shipped routinely doubles-to-triples year-over-year, fueled by rapid average-selling-price (ASP) reduction (next page) This is enabling exciting new markets such as flash-based MP3 players and video recording 4

5 Continual $/MB Reductions Driving New Markets SanDisk Retail Selling Price per MB ($/MB) - Log Scale ASP/MB Q4 Q3 Q2 2Q Q4 Q3 Q2 999 Q Source: SanDisk 43% Annual ASP/MB Decline Trendline 25Q Q4 Q3 Q2 24Q Q4 Q3 Q2 23Q Q4 Q3 Q2 22Q Q4 Q3 Q2 2 Q 2 Down Cycle 3-4 Quarter Cyclicality Q4 Q3 Q2 26Q Q4 Q3 Q2 27 Down Cycle Persistent, unrelenting price reductions, enabled by aggressive technology innovation, driving new markets shown on previous page Superimposed boom/bust cycles of more benign/more rapid ASP decline 5

6 Projected Flash Trends: %-5% annual price reductions sustainable only by top tier players Smooth transitions to 5Xnm (27), 43nm (28/29) Transition points to date have been limited by photolithographic constraints (more on this later) Increasingly more complex NAND (Floating-Gate to Charge-Trap- Flash) transitions at 32nm, 22nm (29-2) 3- and 4-bit-per-cell critical for competitiveness in mm Fabs no longer competitive; 3mm wafers are now the norm in cutting-edge Fabs In next -2 years capacities should grow dramatically: 52MB-2GB 4GB-32GB In next 3-5 years cumulative price reductions (~X from 27 to 2) should become disruptive to DVD, HDD (hard disk drive), stimulate huge demand and create new Flash markets 6

7 Sub-segment Market Growth 7

8 USB ( Thumb Drive ) Market Size M Units 25 2 UFD Units UFD $ M $ 2,9 2,8 2,7 5 2,6 2,5 5 2,4 2, Source: Gartner Nov '6 2,2 8% compound-annual-growth-rate (CAGR) in units shipped from 26 29, much higher than the semiconductor industry in aggregate Dollar growth less strong due to ASP declines 8

9 Flash MP3 Player Market Size M Units Source: Gartner Nov Very strong growth in the timeframe as MP3 player manufacturers adopted flash memory 6% CAGR 26 29, as with USB showing continued strong growth 9

10 Digital Still Camara (DSC) Market Size DSC Shipments and Installed Base Installed Base 4 Years shipments Source: DSC Forecast IDC Sep 6, Installed Base: SanDisk Estimates Roughly 2M DSC units ship per year, with a 26M DSC installed base (!) ~24M Flash cards sold per year with market size <$4.5B in 27

11 Video Consuming More Memory Video Capture becoming a large driver of bit growth IDC predicts that 48 PBs will be consumed by Video in 29 Today 2% of all PBs used in Video is used for archival storage and will grow to >4% through 29 Camera phones are a large component of this DVC CAGR 34.6% Source: IDC Dec. 6 Captured GigaBytes 5,,, 4,5,, 4,,, 3,5,, 3,,, 2,5,, 2,,,,5,,,,, 5,, Consumer DVC DSC DSC CAGR 25.8% CamPhone CamPhone CAGR 42%

12 Projected SSD Penetration in Notebooks by 2 Source: Gartner, December, 26 Notebook market in 2 is estimated at 53M units Units (M illions) Megabytes (Billions) Units MB Solid-state-drive (SSD) adoption driven by price elasticity and MLC adoption (must reasonably compete with rotating-media) SSD penetration in ~2% of the notebook market = 32M units 3 PB of NAND flash to be used in SSDs or % of NAND output TAM >$3B in 2 $/system ASP 2

13 Finally: Mobile Phones as the Market Leader Worldwide Handset Sales (MU) Shipments of Slotted Phones (MU) Source: Strategy Analytics, December 26 5M phones with Flash-card slots shipped in 27, projected to almost double by 2 3

14 Conclusions Market Dynamics The solid-state data storage market, dominated by Flash memory, has grown and will continue to grow very rapidly in the foreseeable future This growth has been driven entirely by the effects of price elasticity: lower prices lead to nonlinear growth in bits shipped, due to the appearance of new markets for memory The markets for Flash memory are now very diverse, ranging from music to video to still images to hard-disk replacements 4

15 NAND Technology Roadmap 5

16 NAND Memory Product Roadmap 28G 96G Product Memory Capacity 64G 32G 6G 8G 4G 7nm Released 56nm 56nm 43nm 43nm 32nm 32nm 2G G Source: SanDisk Near-yearly technology-node transitions are responsible for the price declines and bit-growth described in the previous slides 5% year-over-year price declines matched by YOY cost declines 6

17 New Process Node Transition Every Year Technology Transition for Total Captive Wafer Production % of GB % 9% 8% 7% 6% 5% 4% 3% 43nm 56nm 7nm 9nm 3nm 2% % % Source: SanDisk 7

18 8 8 Going Beyond 2 Bits/Cell ( MLC ) 4 bits/cell 6 levels bit/cell 2 levels ( SLC ) 2 bits/cell 4 levels ( MLC ) 3 bits/cell 8 levels ( x3 ) System Expertise Increasingly Important Very advanced controller chips required to move above 2-bit/cell Signal processing and other algorithm innovations to maintain high write speeds and data retention Wear-leveling algorithms to increase endurance

19 Multi-bit-per-cell Implementation. Super SA-STI Immersion Litho ~56-nm New Structure New Materials Binary Source: SanDisk Effective Cell Size.. 2G 4G 4G 8G 8G 6G 8G 6G 32G 64G 6G 32G 64G 64G MLC (2b/cell) MLC (3b/cell) MLC (4b/cell). 9 nm 7 nm 56 nm 43 nm 32 nm 2x nm Jan- 4 Jan- 5 Jan- 6 Jan- 7 Jan- 8 Jan- 9 Jan- Jan- Jan- 2 2-bit-per-cell (MLC) has been mainstream for several years now, among the top-tier suppliers 3-bit-per-cell (x3) on SanDisk s 56nm technology will ramp in mid- 8 9

20 Photolithography as a Technology Enabler 7nm 56nm 43nm Dry ArF λ=93nm NA <. Wet ArF l=93nm NA >. Immersion ArF λ=93nm NA >>. 32nm 2xnm Further Aggressive shrink with immersion & hyper NA Immersion ArF λ=93nm Hyper NA >>. EUV Source: SanDisk For the past several years, brute-force physical scaling as lead the way to technology-node transitions Immersion lithography as a key enabler for 56nm and onwards 2

21 Scaling Challenges and Alternate Devices 2

22 Scaling Challenges Physical limitations How do we print, etch and fill lines/spaces below 3xnm? To continue on the Moore s Law trajectory of cost reduction, innovation is needed Cell-to-cell coupling Vt shift due to coupling from adjacent cells exacerbated at tighter geometries Electron-loss tolerance (from floating gate) Reduced allowance for electron loss to avoid large Vt shift Source: Kim and Jeong, 27 IEDM 22

23 NONVOLATILE MEMORY TECHNOLOGIES COMPARISON FG NAND SONOS (CTF) Mirror Bit PCM FeRAM MRAM RRAM Probe Storage 3D NAND 3D Diode Cell Size Small ~ 4F² Small ~ 4F² Medium ~F² Small ~6F² Large ~2F² Large ~ 3F² Small~4F² Very small (nm) Tip size and scan precision dependent Small~4F² Very small 4F 2 /n CMOS Integration Good Good Good Good Compatible with back end process Poor Etching difficult Poor Potential good. But no sufficient data Not compatible. Good Good W/E Current per cell Very Small Very Small Medium µa High ~ma Small ~µa Very High 5- ma Scales poorly Potential small. Scales poorly Not known. Storage media dependent Very Small No Data Endurance ~ Theoretica lly infinite No data Not Known. Potentially very high Comparable w/ NAND (?) No Data Scalability Good down to 2x nm Good down to 2xnm. Possible xnm(?) Down to 5x nm Questionable. Endurance is affected by the volume of the PCM material Poor Poor. Write current increases with scaling Good Good. Tip size and scan precision only dependent Good Good MLC Capability Yes. In producti on. Possible with improved material 2 bits proved. 4 bits?? Has potential. Not proved on products. No No Has potential. Not proved. Not sure Has potential. No Data Company SanDisk Toshiba Samsung Hynix, Micron In Developmen t Samsung SanDisk / Toshiba, Macronix Spansion Gb (ORNAND) In Development Intel, IBM, Samsung 52Mb Quimonda Fujitsu Ramtron Mb Freescale 4Mb Samsung IBM 6Mb In development cell level (many companies) Seagate Nanochip IBM(?) Samsung Macronix Toshiba SanDisk Toshiba 23

24 NVM Technology Next Five Years Floating Gate (FG) NAND Likely scalable to ~2nm x3 will likely become mainstream by 29 x4: SanDisk plans to lead through system/controller solutions, initially targeting A/V markets (starting 28, growing impact in later years) Charge Trapping (CTF) NAND Advocated by Samsung and Hynix for below 4nm (~29) Planar structure has scaling advantages, unknown difficulties/risks x3, x4 implementation may be more challenging for CTF NROM (Quadbit) Competitive with NOR, probably not a serious threat to high-density NAND PCM, MRAM, Nanotubes, Milipede Not a serious threat to high-density NAND in the next five years 24

25 NVM Technology Next Five Years (Cont d) 3D Read/Write Long-term potential to disrupt/displace NAND, HDD R/W switching actively researched: expected productization in the next several years (more on this later ) 25

26 SanDisk 3D Technology Overview 26

27 SanDisk 3D Technology Summary SanDisk 3D has brought to high volume an NVM where arrays of memory cells are stacked above control logic circuitry in the 3 rd dimension Stacking 3D memory directly over CMOS allows for high array efficiency and very small die size The technology uses no new materials, processes or Fab equipment Control logic circuitry composed of typical CMOS Memory construction using typical backend processing tools Each memory layer is a repeat of layers below CMOS node can lag memory node ( hybrid scaling ) Example:.3um-generation CMOS with 8nm-generation memory The technology is inherently scalable Multiple technology generations proven using the same cell architecture Lithography-driven scaling allows for rapid cost reduction 27

28 SanDisk 3D Memory Cell The 3D cell consists of a vertical diode in series with a memory element Cell Output Terminal Outp ut Output2 State change element (e.g., antifuse) Input2 Steering element (e.g., diode) Input State Change Element Steering Element O n wiring layer Input Terminal On wiring wiring2 layer Array State-change element is Irreversibly altered in the case of OTP memory Reversibly altered in the case of re-writeable (R/W) memory 28

29 SanDisk 3D OTP Memory Cell metal p+ Si Anti-fuse Programmed Cell Unprogrammed Cell n- Si n+ Si metal 29

30 OTP Memory Cell I-V Curve.E-3.E-4.E-5 Programmed cell.e-6.e-7 Memory Cell I [A].E-8.E-9 Unprogrammed cell Window.E-.E-.E-2.E-3.E V Vread Vprog > 4 orders cell window at 2V read voltage 3

31 OTP Memory Cell Read Window Current at 2V for programmed and unprogrammed cells 99 Programmed Unprogrammed Percent Unprogrammed cell Programmed cell Log(IF2) Wide [> 4 orders] read margin when considering distributions of millions of cells 3

32 SanDisk 3D Physical Cross Section Memory array is composed of repeating layers of poly-si memory cells built directly above CMOS Al top metal 4 layers of memory cells + tungsten interconnect 2 levels of tungsten routing LV + HV CMOS logic 32

33 SanDisk 3D Array Architecture SIDE VIEW TOP VIEW WL WL 3D VIEW WL BL BL BL BL 33

34 SanDisk 3D R/W Cell Development Update OTP and R/W cell developments are tightly coupled and share most of the process module and design architecture ideas Recall that the identity and behavior of the switching element defines OTP or R/W capabilities Several parallel research activities are being pursued, exploring several types of switching behavior We have produced several distinctly different cells, each capable of being integrated into the existing 3D architecture We have developed a test vehicle to test out some of the ideas being generated that allows us to rapidly collect statistics on large number of cells We are seeing very encouraging results from our development efforts please stay tuned for results in the near future 34

35 Overall Concluding Remarks The flash memory marketplace is one of the most vibrant and exciting in the semiconductor industry, not to mention one of the most competitive The dominant flash cell architecture, the conventional floating gate, will see significant, if not unsurpassable, scaling challenges below the 2x nm technology node In order to continue the pace of price reductions that consumers demand, significant innovation is needed, both at the device and system level Many candidate device architectures are in development; we are strong believers that 3D is a viable candidate 35