BRIDGING THE GLOBE WITH INNOVATIVE TECHNOLOGY

Transcription

1 BRIDGING THE GLOBE WITH INNOVATIVE TECHNOLOGY Semiconductor Link Processing & Ultra-Thin Semi Wafer Dicing Louis Vintro VP & General Manager, Semiconductor Products Division

2 Semiconductor Link Processing Enabling DRAM Memory Production As memory fabs ramp up pre-repair chip yield is <20% ESI systems process fuse links and repair wafers After laser repair, yield is typically >99.5% Redundancy & breakable fuse link banks to improve yield Fuse Link Blowing Size: 0.5 1µm Accuracy: 0.15µm Rate: 150,000/sec Multiple layers 31

3 Semiconductor Link Processing Leading in DRAM Memory Repair DRAM bit demand explosion driven by PC & smarter electronics Memory repair rebounding with overcapacity ending ESI gaining share with pioneering technology Market size $50-$150M 32

4 Semiconductor Link Processing Smarter Electronics Driving Market Growth Increasing demand for memory repair tools Increasing # of wafer starts ~ 25% YoY With smarter electronics Growing memory bit demand ~ 50% YoY Increasing # of fuses per wafer 33

5 Semiconductor Link Processing Smarter Electronics Driving Exploding Bit Growth Electronics Market Drivers Memory Bit & Wafer Start Growth Laptops Servers Netbooks YoY Growth 17% 24% 27% + DRAM/box ~30% YoY lions 1Gb equiv) Bit Shipments (Mill 60,000 50,000 40,000 30,000 20,000 10,000 Wafer Starts ~25% YOY DRAM Bits ~ 50% YOY 30,000 25,000 20,000 15,000 10,000 5,000 Wafer Starts (thous sands of wafers) Smartphones 30% - 0 Source: Gartner 8/10 34

6 Semiconductor Link Processing Multiple Factors Drive Tool Demand Increase in Wafer Starts Capacity expansion New fabs, new lines Demand for Laser Repair Tools Node Shrink Increase tool processing time New Nodes New fuse designs and materials Installed base obsolescence 35

7 Semiconductor Link Processing Memory Capex is Rebounding off Historic Lows DRAM Capital Spending 25,000 20,000 15,000 10,000 5, E 6-9 months lag for memory repair CAPEX Renewed order flow for laser repair as overcapacity ends 36

8 Semiconductor Link Processing Gaining Share at Top DRAM Manufacturers 2 out of 3 customers ordering 3 rd planning new fab in CY11 Elpida Press Release (June 2009) ESI's New 9850 Tailored Pulse Dual-Beam Laser System For 68nm DRAM Repair Was Qualified by TeraProbe Hynix Press Release (Oct 2010) Hynix Places Large Volume Order for ESI s 9850TPIR + Samsung Press Release (May 2010) Samsung Raises 2010 Investment Plan to Record 26 Trillion Won [ ] New Line-16 for DRAM, NAND Flash and next-gen memory products in Hwaseong, Unrivalled customer relationships and support infrastructure 37

9 Semiconductor Link Processing Leading through Pioneering Technology ESI leads in addressing technology challenges from ever more complex fuse bank designs & advanced materials laser laser Smaller pitch of fuse links Increasing aspect ratio of fuse links laser Introduction of lower-k dielectrics Al to Cu fuse wiring transition Introduction of variable-thickness oxide layers Fuse bank cross- section 38

10 Semiconductor Link Processing Gaining Share through Pioneering Technology Differentiating with IP-protected Tailored Pulse process technology Unique capability Increased productivity Extendible from IR to Green wavelength Gaining share with key customers Maintaining laser fuse as process of record at top three manufacturers Delivering >99.5% memory repair yield Yield differential of even 1% directly impacts business bottom line Best-in-class patented laser technology for ever more complex laser processing 39

11 Semiconductor Link Processing Leading in DRAM Memory Repair Leveraging pioneering laser repair technology Gaining share at top DRAM manufacturers Meeting exploding DRAM bit demand driven by smarter electronics Expect tool market to return to pre-downturn levels by

12 Thin Wafer Dicing Enabling Transition to Ultra-Thin Wafers In packaging - wafers are diced into individual die Laser-based ESI systems dice ultra-thin wafers along the wafer streets Individual die are picked for downstream packaging 3D stacking is driving <50um thick wafers - Traditional mechanical saw NOT viable ESI s laser-based dicing is disruptive technology enabling transition to ultra-thin wafers 41

13 Thin Wafer Dicing ESI Capturing Ultra-Thin Wafer Dicing Emerging adjacent market with expected high growth Driven by thinning of wafers for 3D packaging Ultra-thin wafer starts projected to be fastest growth segment in the industry Market projected to be $80M by CY13 No viable solution for singulation has been available ESI unique laser-process provides breakthrough in dicing Flexible platform for scribe, dice and select Through-Silicon Via applications Model 9900 in evaluation at multiple customers 42

14 Thin Wafer Dicing 3D Packaging Driving Thinning of Wafers NAND Flash 3D packaging driving thinning trend MicroSD cards growing with mobile devices 16Gb Solid State Device Solid State Drives compete with hard disks DRAM 3D packaging close behind Saves power and real estate in mobile applications And logic/mems 3D packaging 3D interconnection requires laser processing of TSV for stacking of MEMS/LED and driver IC s Smaller die require smaller cuts 4Gb (8 x 512Mb) chip stack DRAM and CPU stack Source : Chipworks 43

15 Thin Wafer Dicing Ultra-Thin Wafer Segment Fastest Growing Thin (<100um) vs Ultra-Thin (<50um) wafers 8,000 7,000 SAM Ultra - Thin - Sub Wafers < 50um TAM Thin Wafers - Sub < 100um 100um Wafer # (Thou usands) 6,000 5,000 4,000 3,000 2,000 1,000 Ultra-Thin Wafer Segment Source: TechMart Ultra-thin wafer dicing tool market expected to grow to $80M by CY13 44

16 Thin Wafer Dicing Disruptive Technology vs Mechanical Saw Traditional mechanical saw NOT viable for <50um wafers 60,000 rpm Mechanical Saw Run rate (w wafers per hour) 15 WPH Technology Disruption 1-2 WPH + chipping issues Wafer 75 µm 50 µm 25 µm Wafer Thickness Wafer flexes during dicing causing chipping and other issues Opportunity - Replace mechanical saw with laser-based solution for production worthy dicing of <50um thick wafers 45

17 Thin Wafer Dicing Pioneering Ultra-Thin Wafer Dicing Patented optical beam positioning technology for high speed Patented zero overlap technology for faster material removal with lower heat damage Integrates proprietary post-processing to ensure >99% yield dicing/picking Platform extendibility for advanced packaging applications Scribe Dice Scribe & Dice TSV 9900 provides pioneering dicing technology with equal or better process results as traditional saw at 3-5x the speed! 46

18 Thin Wafer Dicing Achieving Leadership in Ultra-Thin Wafer Dicing Pioneering a patent-protected laser singulation technology Meeting market need for ultra-thin wafer dicing for 3D packaging Model 9900 in evaluation at multiple customers Flexible platform enables 3D packaging is key imperative for our memory customers Achieving leadership in adjacent market with expected high growth 47