TRANSITION TO AND WAKE-UP FROM STANDBY MODES

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1 Fujitsu Microelectroics Europe Applicatio Note FMEMCU-AN F²MC-16L/16LX FAMILIES 16-BIT MICROCONTROLLER ALL SERIES TRANSITION TO AND WAKE-UP FROM STANDBY MODES APPLICATION NOTE

2 Revisio Histor Revisio Histor Date Issue 22. Jul 2002 V0.1, Hlo First draft 24. Jul 2002 V1.0, Hlo 15. Oct 2002 V2.0, HLo documet referece chaged from (LL) to (applicatio); figure o sigal flow added; statemet o "qualified istructios" added; mior correctios 30. Oct 2002 V2.1, Hlo Term of "request" chaged i figure; abbreviatios added; mior correctios. This documet cotais 15 pages. AN Fujitsu Microelectroics Europe GmbH

3 Warrat ad Disclaimer Warrat ad Disclaimer To the maximum extet permitted b applicable law, Fujitsu Microelectroics Europe GmbH restricts its warraties ad its liabilit for all products delivered free of charge (eg. software iclude or header files, applicatio examples, target boards, evaluatio boards, egieerig samples of IC s etc.), its performace ad a cosequetial damages, o the use of the Product i accordace with (i) the terms of the Licese Agreemet ad the Sale ad Purchase Agreemet uder which agreemets the Product has bee delivered, (ii) the techical descriptios ad (iii) all accompaig writte materials. I additio, to the maximum extet permitted b applicable law, Fujitsu Microelectroics Europe GmbH disclaims all warraties ad liabilities for the performace of the Product ad a cosequetial damages i cases of uauthorised decompilig ad/or reverse egieerig ad/or disassemblig. Note, all these products are iteded ad must ol be used i a evaluatio laborator eviromet. 1. Fujitsu Microelectroics Europe GmbH warrats that the Product will perform substatiall i accordace with the accompaig writte materials for a period of 90 das form the date of receipt b the customer. Cocerig the hardware compoets of the Product, Fujitsu Microelectroics Europe GmbH warrats that the Product will be free from defects i material ad workmaship uder use ad service as specified i the accompaig writte materials for a duratio of 1 ear from the date of receipt b the customer. 2. Should a Product tur out to be defect, Fujitsu Microelectroics Europe GmbH s etire liabilit ad the customer s exclusive remed shall be, at Fujitsu Microelectroics Europe GmbH s sole discretio, either retur of the purchase price ad the licese fee, or replacemet of the Product or parts thereof, if the Product is retured to Fujitsu Microelectroics Europe GmbH i origial packig ad without further defects resultig from the customer s use or the trasport. However, this warrat is excluded if the defect has resulted from a accidet ot attributable to Fujitsu Microelectroics Europe GmbH, or abuse or misapplicatio attributable to the customer or a other third part ot relatig to Fujitsu Microelectroics Europe GmbH. 3. To the maximum extet permitted b applicable law Fujitsu Microelectroics Europe GmbH disclaims all other warraties, whether expressed or implied, i particular, but ot limited to, warraties of merchatabilit ad fitess for a particular purpose for which the Product is ot desigated. 4. To the maximum extet permitted b applicable law, Fujitsu Microelectroics Europe GmbH s ad its suppliers liabilit is restricted to itetio ad gross egligece. NO LIABILITY FOR CONSEQUENTIAL DAMAGES To the maximum extet permitted b applicable law, i o evet shall Fujitsu Microelectroics Europe GmbH ad its suppliers be liable for a damages whatsoever (icludig but without limitatio, cosequetial ad/or idirect damages for persoal ijur, assets of substatial value, loss of profits, iterruptio of busiess operatio, loss of iformatio, or a other moetar or pecuiar loss) arisig from the use of the Product. Should oe of the above stipulatios be or become ivalid ad/or ueforceable, the remaiig stipulatios shall sta i full effect Fujitsu Microelectroics Europe GmbH AN

4 Cotets Cotets REVISION HISTORY...2 WARRANTY AND DISCLAIMER...3 CONTENTS INTRODUCTION LOW POWER MODES Overview Wake-up from stadb modes Wake-up b iterrupt request Wake-up b wake-up request ol TRANSITION TO AND WAKE-UP FROM STANDBY MODE Sequece for trasitio to stadb mode ad wake-up b sigle evets Sequece for trasitio to stadb mode ad wake-up b cclic evets Sequece for trasitio to stadb mode ad wake-up b cclic evets with the eed of resettig the watchdog couter EXAMPLE OF RESETTING WATCHDOG COUNTER IN TIMER MODE Used Resources Exteral Iterrupts (EI) Real Time Clock (RTC) Watchdog Couter (WDT) Timebase Timer (TBT) Stadb/wake-up Flow APPENDIX Rules Figures Tables...15 AN Fujitsu Microelectroics Europe GmbH

5 Itroductio 0 Itroductio All Fujitsu's 16LX-Microcotrollers offer a wide rage of low power modes. The stadb modes are a subset of these. I the stadb modes "timer mode" ad "sleep mode" CPU operatio is stopped. However, timers ca be used to provide periodic wake-up. Also sigle evets ma wake-up the MCU. This applicatio ote shows roughl the ecessar steps for trasitio to stadb mode ad wake-up. Used abbreviatios: CPU Cetral Processig Uit C-Uit Clock Uit EI Exteral Iterrupt HW Hardware I Iterrupt Eable-Flag of PS ICR Iterrupt Cotrol Register IE Iterrupt Eable (Resource) IL Iterrupt Level (ICR) ILM Iterrupt Level Mask (PS) INT Iterrupt (CPU) IR Iterrupt Request (Resource) IRQ ISR MCU MUX PLL PS RTC SW TBT WDT Iterrupt Request Iterrupt Service Routie Microcotroller Uit Muliplexer Phase Locked Loop Processor Status Real-Time Clock Software Timebase Timer Watchdog Timer Fujitsu Microelectroics Europe GmbH AN

6 Chapter 1 Low Power Modes 1 Low Power Modes The curret cosumptio of the MCU ca be reduced b limitig executio speed ad umber of ruig resources o chip. 1.1 Overview For details of the followig modes, refer to the hardware maual. I geeral, the ormal ru modes provide higher performace but also higher curret cosumptio. The stadb modes have lowest curret cosumptio. Hece, the followig table is somehow sorted from top to bottom, from high performace to low performace, from ormal curret cosumptio to low curret cosumptio. Normal Ru modes Low Power Ru modes Low Power Stadb modes Operatio PLL ru mode PLL itermittet operatio mode Mai ru mode Mai itermittet operatio mode PLL Sleep mode Mai Sleep mode Clock suppl PLL CPU Peripher Mai factor 4 factor 3 factor 2 factor 1 factor 4 factor 3 factor 2 factor 1 iactive factor 4 factor 3 factor 2 factor 1 iactive PLL Timer mode 2 factor 4 factor 3 factor 2 factor 1 Mai Timer mode Stop iactive active iactive active iactive active iactive watchdog active active or iactive 1 iactive Table 1 Operatio modes I stadb modes the CPU is ot ruig. Ol resources are supplied with clock. Those resources ca be used to wake-up the MCU from stadb mode. Depedig o stadb mode, differet clock scheme is used. Because eve mai oscillator is stopped, the stop mode has lowest curret cosumptio. However, ol exteral iterrupts ca wake-up from stop mode. 1 behaviour (active, iactive, cofigurable) depeds o device 2 existece of this mode depeds o device AN Fujitsu Microelectroics Europe GmbH

7 1.2 Wake-up from stadb modes Trasitio to ad Wake-Up from Stadb Modes Chapter 1 Low Power Modes To wake up from a stadb mode a evet from a resource is ecessar. The possible resources, which ca wake-up a MCU, deped o stadb-mode. stadb mode wake-up source exteral iterrupts time-base timer, RTC other resources Sleep modes Timer modes - Stop mode - - Table 2 Wake-up sources i stadb modes The wake-up request is similar to iterrupt requests. The major differece to iterrupts is that CPU operatio is stopped. Ulike iterrupt requests, wake-up requests are accepted regardless of the processor status i PS-register. Hece, wake-up is possible, eve if iterrupts are disabled or iterrupt priorit is ot sufficiet for iterrupts. Cosequetl, wake-up coditios are eabled b a subset of iterrupt settigs. Because of these coditios, iterrupt cofiguratio is a possible coditio but ot a ecessar coditio. Rule 1: Stadb wake-up coditios are a subset of iterrupt coditios. If the wake-up coditio is alread preset whe chagig to stadb mode, the MCU does ot eter stadb mode. I this case, it immediatel cotiues with wake-up operatio. Rule 2: MCU will ot eter stadb mode, if a wake-up/iterrupt request is preset Wake-up b iterrupt request A iterrupt is executed b adequate cofiguratio of resource, iterrupt cotroller ad CPU: Resource module Flag/Register Value Iterrupt Request Flag requested (IR = 1) Iterrupt Eable Flag eabled (IE = 1) Iterrupt Cotroller Iterrupt Level of resource resource level (7 > ICR:IL 0) CPU processor status Iterrupt Level Mask level mask (PS:ILM > ICR:IL) Global Iterrupt Eable eabled (PS:I = 1) Table 3 Coditios for acceptig iterrupt request - The request flag of resource is set (e.g. "buffer full") ad iterrupts eabled. - The level (IL-bits) i specific Iterrupt Cotrol Register (ICRxx) is smaller tha 7. - The level has to pass the level mask ad eable flag i Processor Status Register (PS). I additio, a valid iterrupt vector has to be set i the program code. If all coditios are met, the Iterrupt Service Routie (ISR) is etered. If a iterrupt request occurs durig stadb mode, the cotroller will wake-up first. After that, the iterrupt service routie is executed. Depedig o MCU-series ad additioal coditios, the ISR is executed right after the istructio, which set the stadb mode or it is executed oe or more istructios later. Fujitsu Microelectroics Europe GmbH AN

8 Chapter 1 Low Power Modes Wake-up b wake-up request ol Ulike iterrupts, the wake-up coditios do ot deped o dedicated CPU-register PS (Processor Status), because CPU-operatio is stopped. Resource module Flag/Register Value Iterrupt Request Flag requested (IR = 1) Iterrupt eable Flag eabled (IE = 1) Iterrupt Cotroller Iterrupt level of resource eabled (7 > ICR:IL 0) Table 4 Coditios for acceptig wake-up request Wake-up is ot priorit-depedet. All resources, which are valid for that stadb mode ad which are activated, ma wake-up the MCU, if their level i iterrupt cotrol register is less tha seve. Furthermore, there is o depedec o global iterrupt eable flag (PS:I). Hece, wake-up is possible, eve if iterrupts are disabled. Rule 3: Wake-up from stadb mode is idepedet from CPU status PS (Iterrupt Level Mask PS:ILM, Iterrupt Eable flag PS:I) After wake-up from stadb mode, the iterrupt request is still pedig. As soo as all remaiig coditios are met (e.g. b eablig iterrupts), the ISR ca be executed. Resource x of 32 IR Request flag e.g. "buffer full" IE Iterrupt eable bit Cotrol status register & 1 IRQ Iterrupt Cotroller Selects correspodig ICRx accordig to resource ad sed its level to CPU, C-uit MUX x 3 IL Iterrupt Cotrol Registers ICR00 ICR15 L L< M M CPU Processor Status Register Figure 1 Simplified sigal flow from resource to CPU ad Clock-uit. Note that two hardware resources share oe Iterrupt Cotrol Register ILM L L< 7 I & Clock-Uit INT x Wake-Up AN Fujitsu Microelectroics Europe GmbH

9 Chapter 2 Trasitio to ad wake-up from Stadb Mode 2 Trasitio to ad wake-up from Stadb Mode Trasitio to stadb mode ad wake-up from stadb mode requires settig ol a view registers. However, there might be side effects o other parts of software. Followig sequeces do ot appl to all applicatios but describe a geeral sceario. The possible iterrupt hadlig of evets, which also wake-up the cotroller, should be separated from wake-up sequece. Iterrupts should be disabled durig the whole sequece of - checkig software coditios whether to chage to stadb mode, - trasitio to stadb mode, - re-trasitio to stadb - ad fial release. This avoids that iterrupt service routies will iterfere with pre-stadb or post-stadb operatio. Rule 4: Stadb-trasitio ad wake-up should be performed while iterrupts are disabled. The trasitio to stadb mode is iitiated b writig a certai bit. However, ol qualified istructios have to be used (e.g. MOV io, A; SETB io, bp ). Check chapter Low-Power Mode Operatio i hardware maual. Rule 5: Qualified istructios have to be used to activate the low-power mode. If PLL is disabled i stadb mode, it eeds to start-up agai, after wake-up. Durig PLLstabilisatio time (a few millisecods), the applicatio ma perform a operatios, which do ot rel o CPU-speed or resource-speed (e.g. UART). I that time, the applicatio could perform post-stadb operatios. Rule 6: The PLL-stabilisatio time should be cosidered as usable time after wake-up. Fujitsu Microelectroics Europe GmbH AN

10 Chapter 2 Trasitio to ad wake-up from Stadb Mode 2.1 Sequece for trasitio to stadb mode ad wake-up b sigle evets A sigle evet ca be e.g. a exteral iterrupt or a UART-RX-iterrupt. O those evets, the MCU might have to release stadb mode. However, there might be some more coditios, which are ot covered b the request of the resource (e.g. additioal port pis or certai character i UART-buffer). If those coditios are ot met et, the MCU is set to stadb mode agai. disable iterrupts check SW-coditio stadb? set stadb mode verif wake-up coditio stas i stadb mode wake-up evet wake-up? eable iterrupts Figure 2 Stadb trasitio ad wake-up b b sigle evet AN Fujitsu Microelectroics Europe GmbH

11 Chapter 2 Trasitio to ad wake-up from Stadb Mode 2.2 Sequece for trasitio to stadb mode ad wake-up b cclic evets This is same as with sigle wake-up evet. I additio, a cclic evet (timer) ca be used to regularl update data (e.g. a watch clock). I this case, the applicatio might have to leave show block i order to eable iterrupts or to chage the clock mode. However, if amout of code is small, the update operatio ca be called from the show block. disable iterrupts check SW-coditio stadb? periodic actio set stadb mode verif wake-up coditio stas i stadb mode wake-up evet regular timer? wake-up? eable iterrupts Figure 3 Stadb trasitio ad wake-up b b sigle evet ad b cclic timer evet Fujitsu Microelectroics Europe GmbH AN

12 Chapter 2 Trasitio to ad wake-up from Stadb Mode 2.3 Sequece for trasitio to stadb mode ad wake-up b cclic evets with the eed of resettig the watchdog couter. This is same as wake-up b sigle plus cclic evet. However, it is exteded b the operatio eeded for resettig the watchdog couter. Furthermore, the SW-wake-up coditio is more complex, because it has to distiguish wake-up evets for resettig watchdog, wake-up evets for cclic actio ad fial wake-up of applicatio. The cclic wake-up time (e.g. timer) has to be set to a period, which covers both the cclic update of applicatio data ad the watchdog timer period. The combiatio ad shifted occurrece of those evets must be cosidered. disable iterrupts check SW-coditio stadb? reset watchdog couter set stadb mode reset watchdog couter stas i stadb mode wake-up evet periodic actio verif wake-up coditio regular timer? wake-up? eable iterrupts Figure 4 Stadb trasitio ad wake-up b b sigle evet ad b cclic timer evet ad the eed to reset watchdog AN Fujitsu Microelectroics Europe GmbH

13 Chapter 3 Example of Resettig Watchdog Couter i Timer Mode 3 Example of Resettig Watchdog Couter i Timer Mode This example illustrates the sceario that two timers ad watchdog couter have to be coordiated. Therefore, it covers several possible cases. Please ote that this combiatio of resources is ot available o all MCU-series. 3.1 Used Resources Exteral Iterrupts (EI) Exteral iterrupts are used wake-up o chagig exteral sigals as kepad, switches ad others. I this example, the cofiguratio of exteral iterrupts of ruig applicatio differs from wake-up cofiguratio Real Time Clock (RTC) RTC is used here to provide wake-up evets for Secods ad Miutes. Apart from wake-up, RTC also triggers the appropriate iterrupt service routies i order to update a displa Watchdog Couter (WDT) Watchdog couter is used to observe the applicatio. If applicatio does ot regularl reset the WDT, it expires ad resets the etire MCU. This eables to restart malfuctioig applicatios (e.g. deadlock). I this example, we assume a WDT, which does ot stop i stadb mode. I order to has to be clear WDT, the stadb mode has to be released cclicall Timebase Timer (TBT) Sice RTC does ot wake-up MCU as ofte as eeded to reset the watchdog couter, TBT is used to wake-up MCU several times i a Secod. Fujitsu Microelectroics Europe GmbH AN

14 3.2 Stadb/wake-up Flow Trasitio to ad Wake-Up from Stadb Modes Chapter 3 Example of Resettig Watchdog Couter i Timer Mode disable iterrupts check SW-coditio protect ext code from beig iterrupted mabe some iterrupts occurred before disablig iterrupts, which cacelled the trasitio to stadb mode clear TBT evet reset TBT couter stadb? set stadb mode verif wake-up coditio wake-up? eable iterrupts cofigure eeded EIchaels ad ICRxx cofigure TBT, ICR for wake-up period reset watchdog couter reset watchdog couter save wake-up evet recofigure EI, ICRxx save wake-up evet recofigure TBT, ICR some exteral iterrupt chaels might ot be eeded for wake-up; other chaels might be used for wake-up ol active applicatio might be usig other TBTsettigs tha applicatio i stadb. reset the couter to achieve the maximum period durig stadb set pi state for stadb ad set stadb mode b qualified istructio stas i stadb mode; wake-up evet reset the couter, regardless of the actual wake-up evet test RTC ad EI but do ot clear HW-flags et If there was o EI or RTC-evet util ow, it goes to stadb agai. save possible evet; clear HW-flag, if ot eeded amore; re-cofigure chaels ad ICRxx save possible evet; clear HW-flag, if ot eeded amore; re-cofigure for active applicatio allow iterrupts globall Now all pedig iterrupts will be hadled. Iterrupt service routie for wake-up ad other evets ma be executed. Figure 5 Example of trasitio to stadb ad wake-up b b sigle evet, b cclic timer evet ad the eed to wake-up b extra timer for watchdog reset AN Fujitsu Microelectroics Europe GmbH

15 Chapter 4 Appedix 4 Appedix 4.1 Rules The List of rules gives a overview of the more or less strict requiremets whe usig the stadb modes. It ca be used as a kid of checklist. For details go to the give page. Note that umberig ca chage with ext versio of this documet. Rule 1: Stadb wake-up coditios are a subset of iterrupt coditios...7 Rule 2: MCU will ot eter stadb mode, if a wake-up/iterrupt request is preset....7 Rule 3: Wake-up from stadb mode is idepedet from CPU status PS (Iterrupt Level Mask PS:ILM, Iterrupt Eable flag PS:I)...8 Rule 4: Stadb-trasitio ad wake-up should be performed while iterrupts are disabled....9 Rule 5: Qualified istructios have to be used to activate the low-power mode...9 Rule 6: The PLL-stabilisatio time should be cosidered as usable time after wake-up Figures Figure 1 Simplified sigal flow from resource to CPU ad Clock-uit. Note that two hardware resources share oe Iterrupt Cotrol Register...8 Figure 2 Stadb trasitio ad wake-up b b sigle evet...10 Figure 3 Stadb trasitio ad wake-up b b sigle evet ad b cclic timer evet...11 Figure 4 Stadb trasitio ad wake-up b b sigle evet ad b cclic timer evet ad the eed to reset watchdog...12 Figure 5 Example of trasitio to stadb ad wake-up b b sigle evet, b cclic timer evet ad the eed to wake-up b extra timer for watchdog reset Tables Table 1 Operatio modes...6 Table 2 Wake-up sources i stadb modes...7 Table 3 Coditios for acceptig iterrupt request...7 Table 4 Coditios for acceptig wake-up request...8 Fujitsu Microelectroics Europe GmbH AN

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