INFN - Thermal analysis of crate with motherboards, daughterboards and AM chips

Transcription

1 INFN - Thermal analysis of crate with motherboards, daughterboards and AM chips intermediate report Jan Bienstman Phone: Jan.Bienstman@imec.be IMEC, Kapeldreef 75 B3001 Heverlee date : 14/10/2014 Version :01 1/22

2 Content Content Modeling of the system Used data for the model... 3 Crate... 3 Fan... 3 Motherboard... 3 Daughterboard... 3 AM chip Hierarchical modeling Description of the model... 4 Crate... 4 Fan... 4 Motherboard... 5 Daughterboard... 6 AM chip... 6 Full top level system Thermal properties, power sources and thermal boundary conditions Simulation results Results top level simulation Top level simulation discussion Zoom-in box simulation /22

3 1. Modeling of the system 1.1. Used data for the model Crate Fan STEP file (PISA Bin.STEP) with model received on 26/08/2014 from Dirk Güßgen from Wiener e-drawing (PISA Bin.EASM) for visual verification 4114 NH4 - DC axial compact fan from ebmpapst Fan specification received on 26/08/2014 from Dirk Güßgen from Wiener (link, pdf) Fan curve in graph format digitized using excel sheet (Fan_Pressure-flow_curve.xlsx) Motherboard ODB++ directory (EDA V3-0_odb) in EDA V3-0_assy.zip received on 10/07/2014 from Paola Giannetti (link) ODB++ data was read by Sherlock from which geometric data was exported into Ansys (apdl) (only largest components and components which generate heat). Ansys apdl data was imported into Ansys Workbench and subsequently into Ansys Icepak. PCB layers and holes are directly read from ODB++ into Ansys Icepak Daughterboard ODB++ file (lambspl_odb.zip) received on 21/07/2014 from Paola Giannetti (link) ODB++ data was read by Sherlock from which geometric data was exported into Ansys (apdl) (only largest components and components which generate heat). Ansys apdl data was imported into Ansys Workbench and subsequently into Ansys Icepak. PCB layers and holes are directly read from ODB++ into Ansys Icepak AM chip Geometrical data based on AM05 package (HS FBGA_25x25_529L_021014_(Security B).pdf) received on 16/06/2014 from Paola Giannetti Other properties as in file (AM06_Package_Properties.xlsx) 1.2. Hierarchical modeling In order to be able to create a prediction of the temperatures at the AM chips, taking into account the full environment of the crate and fan flow, a hierarchical modeling approach is used. It is hardly possible to model and simulate features which differ five orders of magnitude (Crate ~1m versus RDL layer ~10µm) in one model and would cost a huge amount of memory, processing power and time. The modeling approach used consists of two steps: 1. The top level models the crate with boards and focusses on the air flow. The CAD geometry is simplified in order to create a reasonable mesh. Components are modeled as homogeneous rectangular blocks. Smaller components are neglected. The result of this simulation is a good approximation of the air flow in the crate and at the components of interest. This gives also insight in how the placement of boards and components affect the flow. Although the accompanying temperature results give a good insight in the temperature distribution, care should be taken in interpreting the values too quantitative. Because components are modelled as homogeneous blocks, the actual temperature will differ. When the internal heat source is very local, the actual temperature might be higher. In case that a component has better conductance to the air flow (e.g. with a metal case), the actual temperature will be lower. 2. A zoom-in box is defined around a region of interest (e.g. one motherboard). The results of the top level simulation at the boundaries of the zoom-in box are subsequent applied as boundary conditions to a more detailed model inside the box which replaces the first top level model. 3/22

4 1.3. Description of the model The following describes the modeling and simplification of the different parts in order to assess the accuracy of the results. Crate Figure 1: e-drawing of the crate Figure 2: Left: Imported model in Ansys Design Modeler. Right: Model of the front part of the crate in Icepak. As can be seen from the figures above, only the front part of the crate, where the motherboards sit, is modeled. Non-essential geometries are simplified as much as possible by rectangular shapes. The backplane connectors are lumped into one block. As an example, the figure below presents the original CAD shape of the cardslots for holding the motherboards and the supporting rails with snap-in attachment. The figures left show the simplification via Ansys DesignModeler into Ansys Icepak. Note that the fan s CAD geometry is also replaced by a 3D-fan object in Icepak. Fan Figure 3: Detail showing simplification process: Left: Original CAD, mid: model in DesignModeler, Right: model in Icepak. 4/22

5 The fans are modeled as Icepak 3D fans which models the geometry, hub power and the non-linear flow curve extracted from the fan specification (pdf) Figure 4: Left: Flow curve from manufacturer. Right: implemented flow curve in Fan model in Icepak. Motherboard A similar simplification procedure was done on the motherboard. Only the large, high and/or hot parts are retained for modeling. Two versions of the motherboard are used: the top level model, with more simplifications and the detailed model for the zoom-in model. Figure 5 presents the two models for the motherboard. Figure 5: Motherboard model: Left: detailed model (represented in Designmodeler), Right: simplified model (represented in Icepak). With respect to the detailed motherboard (left in Figure 5), the top level model of the motherboard (right in Figure 5) introduces more simplifications: The smallest parts are removed, some components are lumped together. Other components are slightly adapted (resized or moved) to improve meshing. Also, height of the different components is adapted to become more uniform. This is necessary for the meshing and simulation of 21 boards altogether with the crate. The top level model of the motherboard does not contain the copper traces in the PCB. For the SSB and VME board, an even more simplified model is used. It models the PCB and some connectors, and lumps all other (unknown) components into one large layer modeling air flow restriction. 5/22

6 Daughterboard Figure 6: Model for the SSB or VME boards. Analogue to the motherboard, the daughter board is more simplified in the top level model than in the zoom-in model. The top level model only contains the PCB, the central connector, the AM chips and four screws/standoffs. The PCB does not contain layout traces nor via s in the top level model. Figure 7: Daughterboard model: Left: detailed model (represented in Designmodeler), Right: simplified model (represented in Icepak). AM chip The AM chips are modeled as homogeneous blocks in the top level model. For the more detailed model, a compact model (available in Icepak) is chosen which models the chip as in Figure 8. Figure 8:Compact model for flip-chip BGA It is also possible to create a full 3D model of the package if more insight in the heat distribution is needed. 6/22

7 Full top level system Figure 9 shows the front view of the total system. Figure 9: Front view of the crate, left, showing envelop of the motherboards, right, motherboards with daughterboards and components. (See Figure 11 for numbering of motherboards). Figure 10: Left: Side view of crate. Right: perspective view showing one motherboard with daughterboards. 7/22

8 1.4. Thermal properties, power sources and thermal boundary conditions The following thermal properties were used/assumed: power density Specific heat conductivity Material W kg/m³ J/kg-K W/m-K Metal parts parts of the crate: walls, plates, rails ,0 Al-Extruded screws between motherboard and daughterboard ,4 Steel-Stainless Plastic parts J* Connectors ,25 Nylon-Nylon-6 Backplane connectors motherboards slots C* Capacitors LD* LED's PCB's ,35 FR4 PCB* motherboards daughterboards 2,2 backplane SSB & VME board Components AM chips 3, C=61 for T < 77 C 15,0 Ceramic_material DCDC1 7,2 C=61+(T-77)*2,87 IC* IC22, IC59 3,0 for T >77 C IC41, IC43, IC49-53, IC ,0 PWR* PWR1, PWR2, PWR3 5,0 RG* RG1, RG2, RG3, RG4 6,5 Lumped components for SSB and VME boards 80,0 Custom Special motherboard-daughterboard connector ,1 DB_Connector _equivalent_material DB* (daughterboard) J3*, J4*, J6*, J7* (motherboard) Specific parts value unit Fans Hub power 30,0 W Rotation speed 6800 rpm Model border left, right, front, back heat transfer coeficient 10,0 W/K-m² calculated equivalent properties based on ratio pins/plastic 2. Simulation results 2.1. Results top level simulation Figure 12 depicts the simulated flow field by way of stream lines. Such stream lines gives a good intuitive indication of the flow but is less usable for qualitative interpretation. In the figures following Figure 13, a cross section through the crate at various position is used showing contour plots of the flow intensity and the temperature. Figure 13 shows the location of the different cross sections. The color legend uses the global limits as outer levels and is valid for all the subsequent figures. For illustration purpose, motherboard 10 is outlined on the contour plot of the flow speed while motherboard 09 is outlined on the temperature contour plot. The VME and SSB boards are also outlined. (See Figure 11 for numbering of motherboards). Figure 11: Numbering of motherboards in the crate (compare with Figure 9) 8/22

9 Figure 12: streamline plot of flow. Left: Side view of crate. Right: front view Figure 13: Position and number of the different cross sections. 9/22

10 Figure 14: Contour plot of flow intensity (left) and temperature (right) at position 01, this is through the first row of AM-chips.(see Figure 13 for indication of position). The color legend shows the global limits and is valid for all the next figures. 10/22

11 Figure 15: Contour plot of flow intensity (left) and temperature (right) at position 02 through the 2 nd row AM-chips. Figure 16: Contour plot of flow intensity (left) and temperature (right) at position 03 through the daughterboard connector. 11/22

12 Figure 17: Contour plot of flow intensity (left) and temperature (right) at position 04 through the 3 rd row AM chips. Figure 18: Contour plot of flow intensity (left) and temperature (right) at position 05 through the 4 th row AM chips. 12/22

13 Figure 19: Contour plot of flow intensity (left) and temperature (right) at position 06 between daughterboards. Figure 20: Contour plot of flow intensity (left) and temperature (right) at position 07 between daughterboards. 13/22

14 Figure 21: Contour plot of flow intensity (left) and temperature (right) at position 08 through the 5 th row AM chips. Figure 22: Contour plot of flow intensity (left) and temperature (right) at position 09 through the 6 th row AM chips. 14/22

15 Figure 23: Contour plot of flow intensity (left) and temperature (right) at position 10 through the daughterboard connector. Figure 24: Contour plot of flow intensity (left) and temperature (right) at position 11 through the 7 th row AM chips. 15/22

16 Figure 25: Contour plot of flow intensity (left) and temperature (right) at position 12 through the 8 th row AM chips. Figure 26: Contour plot of flow intensity (left) and temperature (right) at position 13 through the backplane connector Top level simulation discussion It should be noted that, as stated above, this top level simulation focusses on the flow. Although the accompanying temperature results give a good insight in the temperature distribution, care should be taken in interpreting the values too quantitative. Because components are modelled as homogeneous blocks, the actual temperature will differ. When the internal heat source is very local, the actual temperature might be higher. In case that a component has better conductance to the air flow (e.g. with a metal case), the actual temperature will be lower. 16/22

17 The first conclusions that can be drawn is that the motherboards that sit between the fans have less air flow. This is indicated by arrows in fig x for the cross section at location 05, which is through the 4 th row AM chips. As a result, they show higher temperatures at equivalent places with respect to other motherboards. A second result is that some regulator components block the air flow for AM-chips. Because the regulator dissipates relative high power (6,5W assumed), subsequent components see less flow at higher temperatures. Worst situation occurs for the AM chip, which is 2 nd in a row after a regulator block for the motherboard which sits in between fans. Figure 27: Contour plot of flow intensity at position 05 through the 4th row AM chips.(see Figure 18). Air flow speed is lower in region between fans, this is at motherboards 05 and 10. The insets indicate position of next detailed figures () 17/22

18 Figure 28: Corresponding contour plot of temperature at position 05.(See figure above and Figure 18). Due to lower air flow speed in region between fans, the temperature of components is higher. 18/22

19 Figure 29: Temperature and flow plot corresponding to the red inset in Figure 27. Due to the closeness of the hot regulator, the AM chip following the regulator and neighboring AM chip has the highest temperature. 19/22

20 Figure 30: Temperature and flow plot corresponding to the black inset in Figure /22

21 Figure 31: Motherboard 05 PCB temperature contour plot. Left: component side. Right: backside Figure 32: Daughterboards for 05 motherboard: PCB temperature contour plot. Left: AM-chip side. Right: backside Figure 33: View on motherboard 05 and on back side of AM chips (daughterboard pcb hidden) 21/22

22 2.3. Zoom-in box simulation With the results of the previous simulation, a more detailed simulation in a region of interest around one motherboard is performed. The air flow at the boundaries is applied to a more detailed model, where AM-chips and some important components are more accurate modeled. Ongoing... 22/22