Scheduling. In general, a scheduling scheme provides two features: An algorithm for ordering the use of system resources (in particular the CPUs)

Size: px
Start display at page:

Download "Scheduling. In general, a scheduling scheme provides two features: An algorithm for ordering the use of system resources (in particular the CPUs)"

Transcription

1 Schedulng Goal To understand the role that schedulng and schedulablty analyss plays n predctng that real-tme applcatons meet ther deadlnes Topcs Smple process model The cyclc executve approach Process-based schedulng Utlzaton-based schedulablty tests Response tme analyss for FPS and EDF Worst-case executon tme Sporadc and aperodc processes Process systems wth D < T Process nteractons, blockng and prorty celng protocols An extendble process model Dynamc systems and on-lne analyss Programmng prorty-based systems

2 Schedulng In general, a schedulng scheme provdes two features: An algorthm for orderng the use of system resources (n partcular the CPUs) A means of predctng the worst-case behavour of the system when the schedulng algorthm s appled The predcton can then be used to confrm the temporal requrements of the applcaton

3 Smple Process Model The applcaton s assumed to consst of a fxed set of processes All processes are perodc, wth known perods The processes are completely ndependent of each other All system's overheads, context-swtchng tmes and so on are gnored (.e, assumed to have zero cost) All processes have a deadlne equal to ther perod (that s, each process must complete before t s next released) All processes have a fxed worst-case executon tme

4 Standard Notaton B C D I J N P R T U a-z Worst-case blockng tme for the process (f applcable) Worst-case computaton tme (WCET) of the process Deadlne of the process The nterference tme of the process Release jtter of the process Number of processes n the system Prorty assgned to the process (f applcable) Worst-case response tme of the process Mnmum tme between process releases (process perod) The utlzaton of each process (equal to C/T) The name of a process

5 Cyclc Executves One common way of mplementng hard real-tme systems s to use a cyclc executve Here the desgn s concurrent but the code s produced as a collecton of procedures Procedures are mapped onto a set of mnor cycles that consttute the complete schedule (or major cycle) Mnor cycle dctates the mnmum cycle tme Major cycle dctates the maxmum cycle tme Has the advantage of beng fully determnstc

6 Consder Process Set Process Perod,T Computaton Tme,C a b 25 8 c 50 5 d 50 4 e 100 2

7 Cyclc Executve loop wat_for_nterrupt; procedure_for_a; procedure_for_b; procedure_for_c; wat_for_nterrupt; procedure_for_a; procedure_for_b; procedure_for_d; procedure_for_e; wat_for_nterrupt; procedure_for_a; procedure_for_b; procedure_for_c; wat_for_nterrupt; procedure_for_a; procedure_for_b; procedure_for_d; end loop;

8 Tme-lne for Process Set Interrupt Interrupt Interrupt Interrupt a b c a b d e a b c

9 Propertes No actual processes exst at run-tme; each mnor cycle s just a sequence of procedure calls The procedures share a common address space and can thus pass data between themselves. Ths data does not need to be protected (va a semaphore, for example) because concurrent access s not possble All process perods must be a multple of the mnor cycle tme

10 Problems wth Cycle Executves The dffculty of ncorporatng processes wth long perods; the major cycle tme s the maxmum perod that can be accommodated wthout secondary schedules Sporadc actvtes are dffcult (mpossble!) to ncorporate The cyclc executve s dffcult to construct and dffcult to mantan t s a NP-hard problem Any process wth a szable computaton tme wll need to be splt nto a fxed number of fxed szed procedures (ths may cut across the structure of the code from a software engneerng perspectve, and hence may be error-prone) More flexble schedulng methods are dffcult to support Determnsm s not requred, but predctablty s

11 Process-Based Schedulng Schedulng approaches Fxed-Prorty Schedulng (FPS) Earlest Deadlne Frst (EDF) Value-Based Schedulng (VBS)

12 Fxed-Prorty Schedulng (FPS) Ths s the most wdely used approach and s the man focus of ths course Each process has a fxed, statc, prorty whch s computer pre-run-tme The runnable processes are executed n the order determned by ther prorty In real-tme systems, the prorty of a process s derved from ts temporal requrements, not ts mportance to the correct functonng of the system or ts ntegrty

13 Earlest Deadlne Frst (EDF) Schedulng The runnable processes are executed n the order determned by the absolute deadlnes of the processes The next process to run beng the one wth the shortest (nearest) deadlne Although t s usual to know the relatve deadlnes of each process (e.g. 25ms after release), the absolute deadlnes are computed at run tme and hence the scheme s descrbed as dynamc

14 Value-Based Schedulng (VBS) If a system can become overloaded then the use of smple statc prortes or deadlnes s not suffcent; a more adaptve scheme s needed Ths often takes the form of assgnng a value to each process and employng an on-lne value-based schedulng algorthm to decde whch process to run next

15 Preempton and Non-preempton Wth prorty-based schedulng, a hgh-prorty process may be released durng the executon of a lower prorty one In a preemptve scheme, there wll be an mmedate swtch to the hgher-prorty process Wth non-preempton, the lower-prorty process wll be allowed to complete before the other executes Preemptve schemes enable hgher-prorty processes to be more reactve, and hence they are preferred Alternatve strateges allow a lower prorty process to contnue to execute for a bounded tme These schemes are known as deferred preempton or cooperatve dspatchng Schemes such as EDF and VBS can also take on a preemptve or non pre-emptve form

16 FPS and Rate Monotonc Prorty Assgnment Each process s assgned a (unque) prorty based on ts perod; the shorter the perod, the hgher the prorty I.e, for two processes and j, T < T j P > P j Ths assgnment s optmal n the sense that f any process set can be scheduled (usng pre-emptve prorty-based schedulng) wth a fxed-prorty assgnment scheme, then the gven process set can also be scheduled wth a rate monotonc assgnment scheme Note, prorty 1 s the lowest (least) prorty

17 Example Prorty Assgnment Process Perod, T Prorty, P a 25 5 b 60 3 c 42 4 d e 75 2

18 Utlsaton-Based Analyss For D=T task sets only A smple suffcent but not necessary schedulablty test exsts U N = 1 C T N ( 2 1 / N 1) U 0.69 as N

19 Utlzaton Bounds N Utlzaton bound % % % % % % Approaches 69.3% asymptotcally

20 Process Set A Process Perod ComputatonTme Prorty Utlzaton T C P U a b c The combned utlzaton s 0.82 (or 82%) Ths s above the threshold for three processes (0.78) and, hence, ths process set fals the utlzaton test

21 Tme-lne for Process Set A Process a b c Process Release Tme Process Completon Tme Deadlne Met Process Completon Tme Deadlne Mssed Preempted Executng Tme

22 Gantt Chart for Process Set A c b a c b Tme

23 Process Set B Process Perod ComputatonTme Prorty Utlzaton T C P U a b c The combned utlzaton s Ths s below the threshold for three processes (0.78) and, hence, ths process set wll meet all ts deadlnes

24 Process Set C Process Perod ComputatonTme Prorty Utlzaton T C P U a b c The combned utlzaton s 1.0 Ths s above the threshold for three processes (0.78) but the process set wll meet all ts deadlnes

25 Tme-lne for Process Set C Process a b c Tme

26 Crtcsm of Utlsaton-based Tests Not exact Not general BUT t s O(N) The test s sad to be suffcent but not necessary

27 Utlzaton-based Test for EDF N = 1 C T 1 A much smpler test Superor to FPS; t can support hgh utlzatons. However FPS s easer to mplement as prortes are statc EDF s dynamc and requres a more complex run-tme system whch wll have hgher overhead It s easer to ncorporate processes wthout deadlnes nto FPS; gvng a process an arbtrary deadlne s more artfcal It s easer to ncorporate other factors nto the noton of prorty than t s nto the noton of deadlne Durng overload stuatons FPS s more predctable; Low prorty process mss ther deadlnes frst EDF s unpredctable; a domno effect can occur n whch a large number of processes mss deadlnes

28 Response-Tme Analyss Here task 's worst-case response tme, R, s calculated frst and then checked (trvally) wth ts deadlne R D R = C + I Where I s the nterference from hgher prorty tasks

29 Calculatng R Durng R, each hgher prorty task j wll execute a number of tmes: Number of Releases = R T j The celng functon gves the smallest nteger greater than the fractonal number on whch t acts. So the celng of 1/3 s 1, of 6/5 s 2, and of 6/3 s 2. Total nterference s gven by: R T j C j

30 Response Tme Equaton R R = C + j hp ( ) T j C Where hp() s the set of tasks wth prorty hgher than task j Solve by formng a recurrence relatonshp: n n w + 1 w = C + j hp ( ) T j C j n The set of values w, w, w,..., w,.. s monotoncally non decreasng n When = n+1 0 w w the soluton to the equaton has been found, w must not be greater that R (e.g. 0 or C )

31 Response Tme Algorthm for n 1..N loop -- for each process n turn n := 0 n w : = C loop n+1 calculate new w n+1 n f w then = w n R = w ext value found end f n+1 f w then > T ext value not found end f n := n + 1 end loop end loop

32 Process Perod ComputatonTme Prorty T C P a b c Process Set D = 3 R a = = + = = + = = b b b b R w w w

33 = + + = = + + = = + + = = c c c c w w w w = = + + = = + + = c c c R w w

34 Revst: Process Set C Process Perod ComputatonTme Prorty Response tme T C P R a b c The combned utlzaton s 1.0 Ths was above the ullzaton threshold for three processes (0.78), therefore t faled the test The response tme analyss shows that the process set wll meet all ts deadlnes RTA s necessary and suffcent

35 Response Tme Analyss Is suffcent and necessary If the process set passes the test they wll meet all ther deadlnes; f they fal the test then, at run-tme, a process wll mss ts deadlne (unless the computaton tme estmatons themselves turn out to be pessmstc)

36 Worst-Case Executon Tme - WCET Obtaned by ether measurement or analyss The problem wth measurement s that t s dffcult to be sure when the worst case has been observed The drawback of analyss s that an effectve model of the processor (ncludng caches, ppelnes, memory wat states and so on) must be avalable

37 WCET Fndng C Most analyss technques nvolve two dstnct actvtes. The frst takes the process and decomposes ts code nto a drected graph of basc blocks These basc blocks represent straght-lne code. The second component of the analyss takes the machne code correspondng to a basc block and uses the processor model to estmate ts worst-case executon tme Once the tmes for all the basc blocks are known, the drected graph can be collapsed

38 Need for Semantc Informaton for I n loop f Cond then -- basc block of cost 100 else -- basc block of cost 10 end f; end loop; Smple cost 10*100 (+overhead), say But f Cond only true on 3 occasons then cost s 375

39 Sporadc Processes Sporadcs processes have a mnmum nter-arrval tme They also requre D<T The response tme algorthm for fxed prorty schedulng works perfectly for values of D less than T as long as n+1 the stoppng crtera becomes W > D It also works perfectly well wth any prorty orderng hp() always gves the set of hgher-prorty processes

40 Hard and Soft Processes In many stuatons the worst-case fgures for sporadc processes are consderably hgher than the averages Interrupts often arrve n bursts and an abnormal sensor readng may lead to sgnfcant addtonal computaton Measurng schedulablty wth worst-case fgures may lead to very low processor utlzatons beng observed n the actual runnng system

41 General Gudelnes Rule 1 all processes should be schedulable usng average executon tmes and average arrval rates Rule 2 all hard real-tme processes should be schedulable usng worst-case executon tmes and worst-case arrval rates of all processes (ncludng soft) A consequent of Rule 1 s that there may be stuatons n whch t s not possble to meet all current deadlnes Ths condton s known as a transent overload Rule 2 ensures that no hard real-tme process wll mss ts deadlne If Rule 2 gves rse to unacceptably low utlzatons for normal executon then acton must be taken to reduce the worst-case executon tmes (or arrval rates)

42 Aperodc Processes These do not have mnmum nter-arrval tmes Can run aperodc processes at a prorty below the prortes assgned to hard processes, therefore, they cannot steal, n a pre-emptve system, resources from the hard processes Ths does not provde adequate support to soft processes whch wll often mss ther deadlnes To mprove the stuaton for soft processes, a server can be employed. Servers protect the processng resources needed by hard processes but otherwse allow soft processes to run as soon as possble. POSIX supports Sporadc Servers

43 Process Sets wth D < T For D = T, Rate Monotonc prorty orderng s optmal For D < T, Deadlne Monotonc prorty orderng s optmal D < D P > j P j

44 D < T Example Process Set Process Perod Deadlne ComputatonTme Prorty Response tme T D C P R a b c d

45 Proof that DMPO s Optmal Deadlne monotonc prorty orderng (DMPO) s optmal f any process set, Q, that s schedulable by prorty scheme, W, s also schedulable by DMPO The proof of optmalty of DMPO nvolves transformng the prortes of Q (as assgned by W) untl the orderng s DMPO Each step of the transformaton wll preserve schedulablty

46 DMPO Proof Contnued Let and j be two processes (wth adjacent prortes) n Q such that under W P > P D > D j Defne scheme W to be dentcal to W except that processes and j are swapped Consder the schedulablty of Q under W j All processes wth prortes greater than wll be unaffected by ths change to lower-prorty processes All processes wth prortes lower than P j wll be unaffected; they wll all experence the same nterference from and j Process j, whch was schedulable under W, now has a hgher prorty, suffers less nterference, and hence must be schedulable under W P

47 DMPO Proof Contnued All that s left s the need to show that process, whch has had ts prorty lowered, s stll schedulable Under W R < D, D < D and D T j j j Hence process j only nterferes once durng the executon of It follows that: R ' = R D < D j j It can be concluded that process s schedulable after the swtch Prorty scheme W can now be transformed to W" by choosng two more processes that are n the wrong order for DMP and swtchng them

48 Process Interactons and Blockng If a process s suspended watng for a lower-prorty process to complete some requred computaton then the prorty model s, n some sense, beng undermned It s sad to suffer prorty nverson If a process s watng for a lower-prorty process, t s sad to be blocked

49 Prorty Inverson To llustrate an extreme example of prorty nverson, consder the executons of four perodc processes: a, b, c and d; and two resources: Q and V Process Prorty Executon Sequence Release Tme a 1 EQQQQE 0 b 2 EE 2 c 3 EVVE 2 d 4 EEQVE 4

50 Process d Example of Prorty Inverson c b a Executng Preempted Executng wth Q locked Executng wth V locked Blocked

51 Prorty Inhertance If process p s blockng process q, then q runs wth p's prorty Process d c b a

52 Calculatng Blockng If a process has m crtcal sectons that can lead to t beng blocked then the maxmum number of tmes t can be blocked s m If B s the maxmum blockng tme and K s the number of crtcal sectons, the process has an upper bound on ts blockng gven by: B K = usage( k, ) C( k) k = 1

53 Response Tme and Blockng I B C R + + = j hp j j C T R B C R + + = ) ( j hp j j n n C T w B C w + + = + ) ( 1

54 Prorty Celng Protocols Two forms Orgnal celng prorty protocol Immedate celng prorty protocol

55 On a Sngle Processor A hgh-prorty process can be blocked at most once durng ts executon by lower-prorty processes Deadlocks are prevented Transtve blockng s prevented Mutual exclusve access to resources s ensured (by the protocol tself

56 OCPP Each process has a statc default prorty assgned (perhaps by the deadlne monotonc scheme) Each resource has a statc celng value defned, ths s the maxmum prorty of the processes that use t A process has a dynamc prorty that s the maxmum of ts own statc prorty and any t nherts due to t blockng hgher-prorty processes. A process can only lock a resource f ts dynamc prorty s hgher than the celng of any currently locked resource (excludng any that t has already locked tself) B = k max k = 1 usage( k, ) C( k)

57 OCPP Inhertance Process d c b a

58 ICPP Each process has a statc default prorty assgned (perhaps by the deadlne monotonc scheme). Each resource has a statc celng value defned, ths s the maxmum prorty of the processes that use t. A process has a dynamc prorty that s the maxmum of ts own statc prorty and the celng values of any resources t has locked As a consequence, a process wll only suffer a block at the very begnnng of ts executon Once the process starts actually executng, all the resources t needs must be free; f they were not, then some process would have an equal or hgher prorty and the process's executon would be postponed

59 ICPP Inhertance Process d c b a

60 OCPP versus ICPP Although the worst-case behavour of the two celng schemes s dentcal (from a schedulng vew pont), there are some ponts of dfference: ICCP s easer to mplement than the orgnal (OCPP) as blockng relatonshps need not be montored ICPP leads to less context swtches as blockng s pror to frst executon ICPP requres more prorty movements as ths happens wth all resource usage OCPP changes prorty only f an actual block has occurred Note that ICPP s called Prorty Protect Protocol n POSIX and Prorty Celng Emulaton n Real-Tme Java

61 An Extendble Process Model So far: Deadlnes can be less than perod (D<T) Sporadc and aperodc processes, as well as perodc processes, can be supported Process nteractons are possble, wth the resultng blockng beng factored nto the response tme equatons

62 Extensons Cooperatve Schedulng Release Jtter Arbtrary Deadlnes Fault Tolerance Offsets Optmal Prorty Assgnment

63 Cooperatve Schedulng True preemptve behavour s not always acceptable for safety-crtcal systems Cooperatve or deferred preempton splts processes nto slots Mutual excluson s va non-preempton The use of deferred preempton has two mportant advantages It ncreases the schedulablty of the system, and t can lead to lower values of C Wth deferred preempton, no nterference can occur durng the last slot of executon.

64 Cooperatve Schedulng Let the executon tme of the fnal block be F n n w + 1 w = B + C F + MAX j hp( ) Tj n When ths converges that s, w = n+1 w, the response tme s gven by: C j R = w + n F

65 Release Jtter A key ssue for dstrbuted systems Consder the release of a sporadc process on a dfferent processor by a perodc process, l, wth a perod of 20 Frst executon l fnshes at R l Second executon of l fnshes after C t t+15 t+20 Tme Release sporadc process at tme 0, 5, 25, 45

66 Release Jtter Sporadc s released at 0, T-J, 2T-J, 3T-J Examnaton of the dervaton of the schedulablty equaton mples that process wll suffer one nterference from process s f R [ 0, T J ) two nterfernces f R [ T J,2T J ) three nterference f R [ 2T J,3T J ) Ths can be represented n the response tme equatons R + J j R = C + B + C j j hp( ) Tj If response tme s to be measured relatve to the real release tme then the jtter value must be added R = R + perodc J

67 Arbtrary Deadlnes To cater for stuatons where D (and hence potentally R) > T The number of releases s bounded by the lowest value of q for whch the followng relaton s true: The worst-case response tme s then the maxmum value found for each q: j hp j j n n C T q w C q B q w = ) ( 1 ) ( 1) ( ) ( n qt q w q R = ) ( ) ( T q R ) ( ) ( max 0,1,2,... q R R q = =

68 Arbtrary Deadlnes When formulaton s combned wth the effect of release jtter, two alteratons to the above analyss must be made Frst, the nterference factor must be ncreased f any hgher prorty processes suffers release jtter: w + J n n+ 1 w ( q) ( q) = B + ( q + 1) C + j hp( ) Tj The other change nvolves the process tself. If t can suffer release jtter then two consecutve wndows could overlap f response tme plus jtter s greater than perod. R ( q) = w ( q) qt + n J j C j

69 Fault Tolerance Fault tolerance va ether forward or backward error recovery always results n extra computaton Ths could be an excepton handler or a recovery block. In a real-tme fault tolerant system, deadlnes should stll be met even when a certan level of faults occur Ths level of fault tolerance s know as the fault model If the extra computaton tme that results from an error n f process s R C = C + B + R C j max j hp( ) T k hep( ) j where hep() s set of processes wth prorty equal to or hgher than + C f k

70 Fault Tolerance If F s the number of faults allows If there s a mnmum arrval nterval f k hep k j hp j j FC C T R B C R max ) ( ) ( = T f = f k f hep k j hp j j C T R C T R B C R max ) ( ) (

71 Offsets So far assumed all processes share a common release tme (crtcal nstant) Process T D C R a b c Wth offsets Process T D C O R a b c Arbtrary offsets are not amenable to analyss

72 Non-Optmal Analyss In most realstc systems, process perods are not arbtrary but are lkely to be related to one another As n the example just llustrated, two processes have a common perod. In these stuatons t s ease to gve one an offset (of T/2) and to analyse the resultng system usng a transformaton technque that removes the offset and, hence, crtcal nstant analyss apples. In the example, processes b and c (havng the offset of 10) are replaced by a sngle notonal process wth perod 10, computaton tme 4, deadlne 10 but no offset

73 Non-Optmal Analyss Ths notonal process has two mportant propertes. If t s schedulable (when sharng a crtcal nstant wth all other processes) then the two real process wll meet ther deadlnes when one s gven the half perod offset If all lower prorty processes are schedulable when sufferng nterference from the notonal process (and all other hghprorty processes) then they wll reman schedulable when the notonal process s replaced by the two real process (one wth the offset). These propertes follow from the observaton that the notonal process always uses more (or equal) CPU tme than the two real process Process T D C O R a n

74 Notonal Process Parameters ), ( ), ( ), ( 2 2 b a n b a n b a n b a n P P Max P D D Mn D C C Max C T T T = = = = = Can be extended to more than two processes

75 Prorty Assgnment Theorem If process p s assgned the lowest prorty and s feasble then, f a feasble prorty orderng exsts for the complete process set, an orderng exsts wth process p assgned the lowest prorty procedure Assgn_Pr (Set : n out Process_Set; N : Natural; Ok : out Boolean) s begn for K n 1..N loop for Next n K..N loop Swap(Set, K, Next); Process_Test(Set, K, Ok); ext when Ok; end loop; ext when not Ok; -- faled to fnd a schedulable process end loop; end Assgn_Pr;

76 Dynamc Systems and Onlne Analyss There are dynamc soft real-tme applcatons n whch arrval patterns and computaton tmes are not known a pror Although some level of off-lne analyss may stll be applcable, ths can no longer be complete and hence some form of on-lne analyss s requred The man task of an on-lne schedulng scheme s to manage any overload that s lkely to occur due to the dynamcs of the system's envronment EDF s a dynamc schedulng scheme that s an optmal Durng transent overloads EDF performs very badly. It s possble to get a cascade effect n whch each process msses ts deadlne but uses suffcent resources to result n the next process also mssng ts deadlne.

77 Admsson Schemes To counter ths detrmental domno effect many on-lne schemes have two mechansms: an admssons control module that lmts the number of processes that are allowed to compete for the processors, and an EDF dspatchng routne for those processes that are admtted An deal admssons algorthm prevents the processors gettng overloaded so that the EDF routne works effectvely

78 Values If some processes are to be admtted, whlst others rejected, the relatve mportance of each process must be known Ths s usually acheved by assgnng value Values can be classfed Statc: the process always has the same value whenever t s released. Dynamc: the process's value can only be computed at the tme the process s released (because t s dependent on ether envronmental factors or the current state of the system) Adaptve: here the dynamc nature of the system s such that the value of the process wll change durng ts executon To assgn statc values requres the doman specalsts to artculate ther understandng of the desrable behavour of the system

79 Programmng Prorty-Based Systems Ada POSIX Real-Tme Java

80 Ada: Real-Tme Annex Ada 95 has a flexble model: base and actve prortes prorty celng lockng varous dspatchng polces usng actve prorty dynamc prortes subtype Any_Prorty s Integer range Implementaton-Defned; subtype Prorty s Any_Prorty range Any_Prorty'Frst.. Implementaton-Defned; subtype Interrupt_Prorty s Any_Prorty range Prorty'Last Any_Prorty'Last; Default_Prorty : constant Prorty := (Prorty'Frst + Prorty'Last)/2; An mplementaton must support a range of Prorty of at least 30 and at least one dstnct Interrupt_Prorty

81 Assgnng Base Prortes Usng a pragma task Controller s pragma Prorty(10); end Controller; task type Servers(Pr : System.Prorty) s -- each nstance of the task can have a -- dfferent prorty entry Servce1(...); entry Servce2(...); pragma Prorty(Pr); end Servers;

82 Prorty Celng Lockng Protected objects need to mantan the consstency of ther data Mutual excluson can be guaranteed by use of the prorty model Each protected object s assgned a celng prorty whch s greater than or equal to the hghest prorty of any of ts callng tasks When a task calls a protected operaton, ts prorty s mmedately rased to that of the protected object If a task wshng to enter a protected operaton s runnng then the protected object cannot be already occuped

83 Celng Lockng Each protected object s assgned a prorty usng a pragma If the pragma s mssng, Prorty'Last s assumed Program_Error s rased f the callng task's actve prorty s greater than the celng If an nterrupt handler s attached to a protected operaton and the wrong celng prorty has been set, then the program becomes erroneous Wth celng lockng, an effectve mplementaton wll use the thread of the callng task to execute not only the protected operaton but also to execute the code of any other tasks that are released as a result of the call

84 Example of Celng Prorty protected Gate_Control s pragma Prorty(28); entry Stop_And_Close; procedure Open; prvate Gate : Boolean := False; end Gate_Control; protected body Gate_Control s entry Stop_And_Close when Gate s begn Gate := False; end; procedure Open s begn Gate := True; end; end Gate_Control;

85 Example Assume task T, prorty 20, calls Stop_And_Close and s blocked. Later task S, prorty 27, calls Open. The thread executng S wll undertake the followng operatons: the code of Open for S evaluate the barrer on the entry and note that T can now proceed the code Stop_And_Close for T evaluate the barrer agan contnue wth the executon of S after ts call on the protected object There s no context swtch

86 Actve Prortes A task enterng a protected operaton has ts prorty rased A task s actve prorty mght also change durng: task actvaton a task nherts the actve prorty of the parent task whch created t (to avod prorty nverson) durng a rendezvous the task executng a rendezvous wll nhert the actve prorty of the caller f t s greater than ts current actve prorty Note: no nhertance when watng for task termnaton

87 Dspatchng The order of dspatchng s determned by the tasks' actve prortes Default s preemptve prorty based Not defned exactly what ths means on a multprocessor system One polcy defned by annex: FIFO_Wthn_Prorty When a task becomes runnable t s placed at the back on the run queue for ts prorty; when t s preempted, t s placed at the front

88 Entry Queue Polces A programmer may choose the queung polcy for a task's entry queue and the select statement Two predefned polces: FIFO_Queung (default) and Prorty_Queung Wth Prorty_Queung and the select statement, an alternatve that s open and has the hghest prorty task queued (of all open alternatves) s chosen If there are two open wth equal prorty tasks, the one whch appears textually frst n the program s chosen Tasks are queued n actve prorty order, f actve prorty changes then no requeung takes place; f the base prorty changes, the task s removed and requeued

89 Dynamc Prortes Some applcatons requre the base prorty of a task to change dynamcally: e.g., mode changes, or to mplement dynamc schedulng schemes such as earlest deadlne schedulng

90 Package Specfcaton wth Ada.Task_Identfcaton; use Ada; package Ada.Dynamc_Prortes s procedure Set_Prorty(Prorty : System.Any_Prorty; T : Task_Identfcaton.Task_Id := Task_Identfcaton.Current_Task); functon Get_Prorty(T : T_Identfcaton.Task_Id := Task_Identfcaton.Current_Task) return System.Any_Prorty; -- rase Taskng_Error f task has termnated -- Both rase Program_Error f a Null_Task_Id s passed prvate -- not specfed by the language end Ada.Dynamc_Prortes;

91 Dynamc Prortes The effect of a change of base prortes should be as soon as practcal but not durng an abort deferred operaton and no later than the next abort completon pont Changng a task's base prorty can affect ts actve prorty and have an mpact on dspatchng and queung

92 POSIX POSIX supports prorty-based schedulng, and has optons to support prorty nhertance and celng protocols Prortes may be set dynamcally Wthn the prorty-based facltes, there are four polces: FIFO: a process/thread runs untl t completes or t s blocked Round-Robn: a process/thread runs untl t completes or t s blocked or ts tme quantum has expred Sporadc Server: a process/thread runs as a sporadc server OTHER: an mplementaton-defned For each polcy, there s a mnmum range of prortes that must be supported; 32 for FIFO and round-robn The schedulng polcy can be set on a per process and a per thread bass

93 POSIX Threads may be created wth a system contenton opton, n whch case they compete wth other system threads accordng to ther polcy and prorty Alternatvely, threads can be created wth a process contenton opton where they must compete wth other threads (created wth a process contenton) n the parent process It s unspecfed how such threads are scheduled relatve to threads n other processes or to threads wth global contenton A specfc mplementaton must decde whch to support

94 Sporadc Server A sporadc server assgns a lmted amount of CPU capacty to handle events, has a replenshment perod, a budget, and two prortes The server runs at a hgh prorty when t has some budget left and a low one when ts budget s exhausted When a server runs at the hgh prorty, the amount of executon tme t consumes s subtracted from ts budget The amount of budget consumed s replenshed at the tme the server was actvated plus the replenshment perod When ts budget reaches zero, the server's prorty s set to the low value

95 Other Facltes POSIX allows: prorty nhertance to be assocated wth mutexes (prorty protected protocol= ICPP) message queues to be prorty ordered functons for dynamcally gettng and settng a thread's prorty threads to ndcate whether ther attrbutes should be nherted by any chld thread they create

96 RT Java Threads and Schedulng There are two enttes n Real-Tme Java whch can be scheduled: RealtmeThreads (and NoHeapRealtmeThread) AsynEventHandler (and BoundAyncEventHandler) Objects whch are to be scheduled must mplement the Schedulable nterface specfy ther SchedulngParameters ReleaseParameters MemoryParameters

97 Real-Tme Java Real-Tme Java mplementatons are requred to support at least 28 real-tme prorty levels As wth Ada and POSIX, the larger the nteger value, the hgher the prorty Non real-tme threads are gven prorty levels below the mnmum real-tme prorty Note, schedulng parameters are bound to threads at thread creaton tme; f the parameter objects are changed, they have an mmedate mpact on the assocated thread Lke Ada and Real-Tme POSIX, Real-Tme Java supports a pre-emptve prorty-based dspatchng polcy Unlke Ada and RT POSIX, RT Java does not requre a preempted thread to be placed at the head of the run queue assocated wth ts prorty level

98 The Schedulable Interface publc nterface Schedulable extends java.lang.runnable { publc vod addtofeasblty(); publc vod removefromfeasblty(); publc MemoryParameters getmemoryparameters(); publc vod setmemoryparameters(memoryparameters memory); publc ReleaseParameters getreleaseparameters(); publc vod setreleaseparameters(releaseparameters release); publc SchedulngParameters getschedulngparameters(); publc vod setschedulngparameters( SchedulngParameters schedulng); } publc Scheduler getscheduler(); publc vod setscheduler(scheduler scheduler);

99 Schedulng Parameters publc abstract class SchedulngParameters { publc SchedulngParameters(); } publc class PrortyParameters extends SchedulngParameters { publc PrortyParameters(nt prorty); } publc nt getprorty(); // at least 28 prorty levels publc vod setprorty(nt prorty) throws IllegalArgumentExcepton;... publc class ImportanceParameters extends PrortyParameters { publc ImportanceParameters(nt prorty, nt mportance); publc nt getimportance(); publc vod setimportance(nt mportance);... }

100 RT Java: Scheduler Real-Tme Java supports a hgh-level scheduler whose goals are: to decde whether to admt new schedulable objects accordng to the resources avalable and a feasblty algorthm, and to set the prorty of the schedulable objects accordng to the prorty assgnment algorthm assocated wth the feasblty algorthm Hence, whlst Ada and Real-Tme POSIX focus on statc off-lne schedulablty analyss, Real-Tme Java addresses more dynamc systems wth the potental for on-lne analyss

101 The Scheduler publc abstract class Scheduler { publc Scheduler(); protected abstract vod addtofeasblty(schedulable s); protected abstract vod removefromfeasblty(schedulable s); publc abstract boolean sfeasble(); // checks the current set of schedulable objects publc boolean changeiffeasble(schedulable schedulable, ReleaseParameters release, MemoryParameters memory); publc statc Scheduler getdefaultscheduler(); publc statc vod setdefaultscheduler(scheduler scheduler); } publc abstract java.lang.strng getpolcyname();

102 The Scheduler The Scheduler s an abstract class The sfeasble method consders only the set of schedulable objects that have been added to ts feasblty lst (va the addtofeasblty and removefromfeasblty methods) The method changeiffeasble checks to see f ts set of objects s stll feasble f the gven object has ts release and memory parameters changed If t s, the parameters are changed Statc methods allow the default scheduler to be quered or set RT Java does not requre an mplementaton to provde an on-lne feasblty algorthm

103 The Prorty Scheduler class PrortyScheduler extends Scheduler { publc PrortyScheduler() protected vod addtofeasblty(schedulable s);... publc vod freschedulable(schedulable schedulable); publc nt getmaxprorty(); publc nt getmnprorty(); publc nt getnormprorty(); } publc statc PrortyScheduler nstance();... Standard preemptve prorty-based schedulng

104 Other Facltes Prorty nhertance and ICCP (called prorty celng emulaton) Support for aperodc threads n the form of processng groups; a group of aperodc threads can be lnked together and assgned characterstcs whch ad the feasblty analyss

105 Summary A schedulng scheme defnes an algorthm for resource sharng and a means of predctng the worst-case behavour of an applcaton when that form of resource sharng s used. Wth a cyclc executve, the applcaton code must be packed nto a fxed number of mnor cycles such that the cyclc executon of the sequence of mnor cycles (the major cycle) wll enable all system deadlnes to be met The cyclc executve approach has major drawbacks many of whch are solved by prorty-based systems Smple utlzaton-based schedulablty tests are not exact

106 Summary Response tme analyss s flexble and caters for: Perodc and sporadc processes Blockng caused by IPC Cooperatve schedulng Arbtrary deadlnes Release jtter Fault tolerance Offsets Ada, RT POSIX and RT Java support preemptve prorty-based schedulng Ada and RT POSIX focus on statc off-lne schedulablty analyss, RT Java addresses more dynamc systems wth the potental for on-lne analyss

Real-time Scheduling

Real-time Scheduling Real-tme Schedulng COE718: Embedded System Desgn http://www.ee.ryerson.ca/~courses/coe718/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty Overvew RTX

More information

Multitasking and Real-time Scheduling

Multitasking and Real-time Scheduling Multtaskng and Real-tme Schedulng EE8205: Embedded Computer Systems http://www.ee.ryerson.ca/~courses/ee8205/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty

More information

AADL : about scheduling analysis

AADL : about scheduling analysis AADL : about schedulng analyss Schedulng analyss, what s t? Embedded real-tme crtcal systems have temporal constrants to meet (e.g. deadlne). Many systems are bult wth operatng systems provdng multtaskng

More information

Multitasking and Real-time Scheduling

Multitasking and Real-time Scheduling Multtaskng and Real-tme Schedulng EE8205: Embedded Computer Systems http://www.ee.ryerson.ca/~courses/ee8205/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty

More information

Lecture 7 Real Time Task Scheduling. Forrest Brewer

Lecture 7 Real Time Task Scheduling. Forrest Brewer Lecture 7 Real Tme Task Schedulng Forrest Brewer Real Tme ANSI defnes real tme as A Real tme process s a process whch delvers the results of processng n a gven tme span A data may requre processng at a

More information

Verification by testing

Verification by testing Real-Tme Systems Specfcaton Implementaton System models Executon-tme analyss Verfcaton Verfcaton by testng Dad? How do they know how much weght a brdge can handle? They drve bgger and bgger trucks over

More information

Real-Time Systems. Real-Time Systems. Verification by testing. Verification by testing

Real-Time Systems. Real-Time Systems. Verification by testing. Verification by testing EDA222/DIT161 Real-Tme Systems, Chalmers/GU, 2014/2015 Lecture #8 Real-Tme Systems Real-Tme Systems Lecture #8 Specfcaton Professor Jan Jonsson Implementaton System models Executon-tme analyss Department

More information

An Investigation into Server Parameter Selection for Hierarchical Fixed Priority Pre-emptive Systems

An Investigation into Server Parameter Selection for Hierarchical Fixed Priority Pre-emptive Systems An Investgaton nto Server Parameter Selecton for Herarchcal Fxed Prorty Pre-emptve Systems R.I. Davs and A. Burns Real-Tme Systems Research Group, Department of omputer Scence, Unversty of York, YO10 5DD,

More information

Compiler Design. Spring Register Allocation. Sample Exercises and Solutions. Prof. Pedro C. Diniz

Compiler Design. Spring Register Allocation. Sample Exercises and Solutions. Prof. Pedro C. Diniz Compler Desgn Sprng 2014 Regster Allocaton Sample Exercses and Solutons Prof. Pedro C. Dnz USC / Informaton Scences Insttute 4676 Admralty Way, Sute 1001 Marna del Rey, Calforna 90292 pedro@s.edu Regster

More information

Maintaining temporal validity of real-time data on non-continuously executing resources

Maintaining temporal validity of real-time data on non-continuously executing resources Mantanng temporal valdty of real-tme data on non-contnuously executng resources Tan Ba, Hong Lu and Juan Yang Hunan Insttute of Scence and Technology, College of Computer Scence, 44, Yueyang, Chna Wuhan

More information

Virtual Memory. Background. No. 10. Virtual Memory: concept. Logical Memory Space (review) Demand Paging(1) Virtual Memory

Virtual Memory. Background. No. 10. Virtual Memory: concept. Logical Memory Space (review) Demand Paging(1) Virtual Memory Background EECS. Operatng System Fundamentals No. Vrtual Memory Prof. Hu Jang Department of Electrcal Engneerng and Computer Scence, York Unversty Memory-management methods normally requres the entre process

More information

Real-Time Guarantees. Traffic Characteristics. Flow Control

Real-Time Guarantees. Traffic Characteristics. Flow Control Real-Tme Guarantees Requrements on RT communcaton protocols: delay (response s) small jtter small throughput hgh error detecton at recever (and sender) small error detecton latency no thrashng under peak

More information

Course Introduction. Algorithm 8/31/2017. COSC 320 Advanced Data Structures and Algorithms. COSC 320 Advanced Data Structures and Algorithms

Course Introduction. Algorithm 8/31/2017. COSC 320 Advanced Data Structures and Algorithms. COSC 320 Advanced Data Structures and Algorithms Course Introducton Course Topcs Exams, abs, Proects A quc loo at a few algorthms 1 Advanced Data Structures and Algorthms Descrpton: We are gong to dscuss algorthm complexty analyss, algorthm desgn technques

More information

Scheduling and queue management. DigiComm II

Scheduling and queue management. DigiComm II Schedulng and queue management Tradtonal queung behavour n routers Data transfer: datagrams: ndvdual packets no recognton of flows connectonless: no sgnallng Forwardng: based on per-datagram forwardng

More information

6.854 Advanced Algorithms Petar Maymounkov Problem Set 11 (November 23, 2005) With: Benjamin Rossman, Oren Weimann, and Pouya Kheradpour

6.854 Advanced Algorithms Petar Maymounkov Problem Set 11 (November 23, 2005) With: Benjamin Rossman, Oren Weimann, and Pouya Kheradpour 6.854 Advanced Algorthms Petar Maymounkov Problem Set 11 (November 23, 2005) Wth: Benjamn Rossman, Oren Wemann, and Pouya Kheradpour Problem 1. We reduce vertex cover to MAX-SAT wth weghts, such that the

More information

Wishing you all a Total Quality New Year!

Wishing you all a Total Quality New Year! Total Qualty Management and Sx Sgma Post Graduate Program 214-15 Sesson 4 Vnay Kumar Kalakband Assstant Professor Operatons & Systems Area 1 Wshng you all a Total Qualty New Year! Hope you acheve Sx sgma

More information

The Greedy Method. Outline and Reading. Change Money Problem. Greedy Algorithms. Applications of the Greedy Strategy. The Greedy Method Technique

The Greedy Method. Outline and Reading. Change Money Problem. Greedy Algorithms. Applications of the Greedy Strategy. The Greedy Method Technique //00 :0 AM Outlne and Readng The Greedy Method The Greedy Method Technque (secton.) Fractonal Knapsack Problem (secton..) Task Schedulng (secton..) Mnmum Spannng Trees (secton.) Change Money Problem Greedy

More information

Sorting Review. Sorting. Comparison Sorting. CSE 680 Prof. Roger Crawfis. Assumptions

Sorting Review. Sorting. Comparison Sorting. CSE 680 Prof. Roger Crawfis. Assumptions Sortng Revew Introducton to Algorthms Qucksort CSE 680 Prof. Roger Crawfs Inserton Sort T(n) = Θ(n 2 ) In-place Merge Sort T(n) = Θ(n lg(n)) Not n-place Selecton Sort (from homework) T(n) = Θ(n 2 ) In-place

More information

Efficient Distributed File System (EDFS)

Efficient Distributed File System (EDFS) Effcent Dstrbuted Fle System (EDFS) (Sem-Centralzed) Debessay(Debsh) Fesehaye, Rahul Malk & Klara Naherstedt Unversty of Illnos-Urbana Champagn Contents Problem Statement, Related Work, EDFS Desgn Rate

More information

Mixed-Criticality Scheduling on Multiprocessors using Task Grouping

Mixed-Criticality Scheduling on Multiprocessors using Task Grouping Mxed-Crtcalty Schedulng on Multprocessors usng Task Groupng Jankang Ren Lnh Th Xuan Phan School of Software Technology, Dalan Unversty of Technology, Chna Computer and Informaton Scence Department, Unversty

More information

Module Management Tool in Software Development Organizations

Module Management Tool in Software Development Organizations Journal of Computer Scence (5): 8-, 7 ISSN 59-66 7 Scence Publcatons Management Tool n Software Development Organzatons Ahmad A. Al-Rababah and Mohammad A. Al-Rababah Faculty of IT, Al-Ahlyyah Amman Unversty,

More information

Adaptive Resource Allocation Control with On-Line Search for Fair QoS Level

Adaptive Resource Allocation Control with On-Line Search for Fair QoS Level Adaptve Resource Allocaton Control wth On-Lne Search for Far QoS Level Fumko Harada, Toshmtsu Usho, Graduate School of Engneerng Scence Osaka Unversty {harada@hopf, usho@}sysesosaka-uacjp Yukkazu akamoto

More information

RAP. Speed/RAP/CODA. Real-time Systems. Modeling the sensor networks. Real-time Systems. Modeling the sensor networks. Real-time systems:

RAP. Speed/RAP/CODA. Real-time Systems. Modeling the sensor networks. Real-time Systems. Modeling the sensor networks. Real-time systems: Speed/RAP/CODA Presented by Octav Chpara Real-tme Systems Many wreless sensor network applcatons requre real-tme support Survellance and trackng Border patrol Fre fghtng Real-tme systems: Hard real-tme:

More information

CHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION

CHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION 24 CHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION The present chapter proposes an IPSO approach for multprocessor task schedulng problem wth two classfcatons, namely, statc ndependent tasks and

More information

Parallelism for Nested Loops with Non-uniform and Flow Dependences

Parallelism for Nested Loops with Non-uniform and Flow Dependences Parallelsm for Nested Loops wth Non-unform and Flow Dependences Sam-Jn Jeong Dept. of Informaton & Communcaton Engneerng, Cheonan Unversty, 5, Anseo-dong, Cheonan, Chungnam, 330-80, Korea. seong@cheonan.ac.kr

More information

For instance, ; the five basic number-sets are increasingly more n A B & B A A = B (1)

For instance, ; the five basic number-sets are increasingly more n A B & B A A = B (1) Secton 1.2 Subsets and the Boolean operatons on sets If every element of the set A s an element of the set B, we say that A s a subset of B, or that A s contaned n B, or that B contans A, and we wrte A

More information

A Generic and Compositional Framework for Multicore Response Time Analysis

A Generic and Compositional Framework for Multicore Response Time Analysis A Generc and Compostonal Framework for Multcore Response Tme Analyss Sebastan Altmeyer Unversty of Luxembourg Unversty of Amsterdam Clare Maza Grenoble INP Vermag Robert I. Davs Unversty of York INRIA,

More information

Comparison of Heuristics for Scheduling Independent Tasks on Heterogeneous Distributed Environments

Comparison of Heuristics for Scheduling Independent Tasks on Heterogeneous Distributed Environments Comparson of Heurstcs for Schedulng Independent Tasks on Heterogeneous Dstrbuted Envronments Hesam Izakan¹, Ath Abraham², Senor Member, IEEE, Václav Snášel³ ¹ Islamc Azad Unversty, Ramsar Branch, Ramsar,

More information

S1 Note. Basis functions.

S1 Note. Basis functions. S1 Note. Bass functons. Contents Types of bass functons...1 The Fourer bass...2 B-splne bass...3 Power and type I error rates wth dfferent numbers of bass functons...4 Table S1. Smulaton results of type

More information

A mathematical programming approach to the analysis, design and scheduling of offshore oilfields

A mathematical programming approach to the analysis, design and scheduling of offshore oilfields 17 th European Symposum on Computer Aded Process Engneerng ESCAPE17 V. Plesu and P.S. Agach (Edtors) 2007 Elsever B.V. All rghts reserved. 1 A mathematcal programmng approach to the analyss, desgn and

More information

Perfecting Preemption Threshold Scheduling for Object-Oriented Real-Time System Design: From The Perspective of Real-Time Synchronization

Perfecting Preemption Threshold Scheduling for Object-Oriented Real-Time System Design: From The Perspective of Real-Time Synchronization Perfectng Preempton Threshold Schedulng for Obect-Orented Real-Tme System Desgn: From The Perspectve of Real-Tme Synchronzaton Saehwa Km School of Electrcal Engneerng and Computer Scence Seoul Natonal

More information

CS 268: Lecture 8 Router Support for Congestion Control

CS 268: Lecture 8 Router Support for Congestion Control CS 268: Lecture 8 Router Support for Congeston Control Ion Stoca Computer Scence Dvson Department of Electrcal Engneerng and Computer Scences Unversty of Calforna, Berkeley Berkeley, CA 9472-1776 Router

More information

ELEC 377 Operating Systems. Week 6 Class 3

ELEC 377 Operating Systems. Week 6 Class 3 ELEC 377 Operatng Systems Week 6 Class 3 Last Class Memory Management Memory Pagng Pagng Structure ELEC 377 Operatng Systems Today Pagng Szes Vrtual Memory Concept Demand Pagng ELEC 377 Operatng Systems

More information

Achieving class-based QoS for transactional workloads

Achieving class-based QoS for transactional workloads Achevng class-based QoS for transactonal workloads Banca Schroeder Mor Harchol-Balter Carnege Mellon Unversty Department of Computer Scence Pttsburgh, PA USA @cs.cmu.edu Arun Iyengar Erch

More information

Simulation Based Analysis of FAST TCP using OMNET++

Simulation Based Analysis of FAST TCP using OMNET++ Smulaton Based Analyss of FAST TCP usng OMNET++ Umar ul Hassan 04030038@lums.edu.pk Md Term Report CS678 Topcs n Internet Research Sprng, 2006 Introducton Internet traffc s doublng roughly every 3 months

More information

Tolerating Transient Faults in Statically Scheduled Safety-Critical Embedded Systems

Tolerating Transient Faults in Statically Scheduled Safety-Critical Embedded Systems Toleratng Transent Faults n Statcally Scheduled Safety-Crtcal Embedded Systems Nagaraan Kandasamy *, John P. Hayes *, and Bran T. Murray ** * Department of Electrcal Engneerng ** Delph Automotve Systems

More information

An Optimal Algorithm for Prufer Codes *

An Optimal Algorithm for Prufer Codes * J. Software Engneerng & Applcatons, 2009, 2: 111-115 do:10.4236/jsea.2009.22016 Publshed Onlne July 2009 (www.scrp.org/journal/jsea) An Optmal Algorthm for Prufer Codes * Xaodong Wang 1, 2, Le Wang 3,

More information

Space-Optimal, Wait-Free Real-Time Synchronization

Space-Optimal, Wait-Free Real-Time Synchronization 1 Space-Optmal, Wat-Free Real-Tme Synchronzaton Hyeonjoong Cho, Bnoy Ravndran ECE Dept., Vrgna Tech Blacksburg, VA 24061, USA {hjcho,bnoy}@vt.edu E. Douglas Jensen The MITRE Corporaton Bedford, MA 01730,

More information

A Genetic Algorithm Based Dynamic Load Balancing Scheme for Heterogeneous Distributed Systems

A Genetic Algorithm Based Dynamic Load Balancing Scheme for Heterogeneous Distributed Systems Proceedngs of the Internatonal Conference on Parallel and Dstrbuted Processng Technques and Applcatons, PDPTA 2008, Las Vegas, Nevada, USA, July 14-17, 2008, 2 Volumes. CSREA Press 2008, ISBN 1-60132-084-1

More information

Subspace clustering. Clustering. Fundamental to all clustering techniques is the choice of distance measure between data points;

Subspace clustering. Clustering. Fundamental to all clustering techniques is the choice of distance measure between data points; Subspace clusterng Clusterng Fundamental to all clusterng technques s the choce of dstance measure between data ponts; D q ( ) ( ) 2 x x = x x, j k = 1 k jk Squared Eucldean dstance Assumpton: All features

More information

CMPS 10 Introduction to Computer Science Lecture Notes

CMPS 10 Introduction to Computer Science Lecture Notes CPS 0 Introducton to Computer Scence Lecture Notes Chapter : Algorthm Desgn How should we present algorthms? Natural languages lke Englsh, Spansh, or French whch are rch n nterpretaton and meanng are not

More information

Technical Report. i-game: An Implicit GTS Allocation Mechanism in IEEE for Time- Sensitive Wireless Sensor Networks

Technical Report. i-game: An Implicit GTS Allocation Mechanism in IEEE for Time- Sensitive Wireless Sensor Networks www.hurray.sep.pp.pt Techncal Report -GAME: An Implct GTS Allocaton Mechansm n IEEE 802.15.4 for Tme- Senstve Wreless Sensor etworks Ans Koubaa Máro Alves Eduardo Tovar TR-060706 Verson: 1.0 Date: Jul

More information

Burst Round Robin as a Proportional-Share Scheduling Algorithm

Burst Round Robin as a Proportional-Share Scheduling Algorithm Burst Round Robn as a Proportonal-Share Schedulng Algorthm Tarek Helmy * Abdelkader Dekdouk ** * College of Computer Scence & Engneerng, Kng Fahd Unversty of Petroleum and Mnerals, Dhahran 31261, Saud

More information

Chapter 1. Introduction

Chapter 1. Introduction Chapter 1 Introducton 1.1 Parallel Processng There s a contnual demand for greater computatonal speed from a computer system than s currently possble (.e. sequental systems). Areas need great computatonal

More information

Design and Analysis of Algorithms

Design and Analysis of Algorithms Desgn and Analyss of Algorthms Heaps and Heapsort Reference: CLRS Chapter 6 Topcs: Heaps Heapsort Prorty queue Huo Hongwe Recap and overvew The story so far... Inserton sort runnng tme of Θ(n 2 ); sorts

More information

CHAPTER 2 DECOMPOSITION OF GRAPHS

CHAPTER 2 DECOMPOSITION OF GRAPHS CHAPTER DECOMPOSITION OF GRAPHS. INTRODUCTION A graph H s called a Supersubdvson of a graph G f H s obtaned from G by replacng every edge uv of G by a bpartte graph,m (m may vary for each edge by dentfyng

More information

A Binarization Algorithm specialized on Document Images and Photos

A Binarization Algorithm specialized on Document Images and Photos A Bnarzaton Algorthm specalzed on Document mages and Photos Ergna Kavalleratou Dept. of nformaton and Communcaton Systems Engneerng Unversty of the Aegean kavalleratou@aegean.gr Abstract n ths paper, a

More information

Analysis of Collaborative Distributed Admission Control in x Networks

Analysis of Collaborative Distributed Admission Control in x Networks 1 Analyss of Collaboratve Dstrbuted Admsson Control n 82.11x Networks Thnh Nguyen, Member, IEEE, Ken Nguyen, Member, IEEE, Lnha He, Member, IEEE, Abstract Wth the recent surge of wreless home networks,

More information

A fair buffer allocation scheme

A fair buffer allocation scheme A far buffer allocaton scheme Juha Henanen and Kalev Klkk Telecom Fnland P.O. Box 228, SF-330 Tampere, Fnland E-mal: juha.henanen@tele.f Abstract An approprate servce for data traffc n ATM networks requres

More information

DESIGNING TRANSMISSION SCHEDULES FOR WIRELESS AD HOC NETWORKS TO MAXIMIZE NETWORK THROUGHPUT

DESIGNING TRANSMISSION SCHEDULES FOR WIRELESS AD HOC NETWORKS TO MAXIMIZE NETWORK THROUGHPUT DESIGNING TRANSMISSION SCHEDULES FOR WIRELESS AD HOC NETWORKS TO MAXIMIZE NETWORK THROUGHPUT Bran J. Wolf, Joseph L. Hammond, and Harlan B. Russell Dept. of Electrcal and Computer Engneerng, Clemson Unversty,

More information

A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform

A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform A comparson of MPCP and MSRP when sharng resources n the Janus multple-processor on a chp platform Paolo Ga, Marco D Natale, Guseppe Lpar, Scuola Superore Sant Anna, Psa, Italy {pj,marco,lpar}@sssup.t

More information

REAL-TIME and embedded systems are applied in many

REAL-TIME and embedded systems are applied in many 95 IEEE TRANSACTIONS ON COMPUTERS, VOL. 57, NO. 7, JULY 008 Deferrable Schedulng for Mantanng Real-Tme Data Freshness: Algorthms, Analyss, and Results Mng Xong, Member, IEEE, Song Han, Student Member,

More information

On Achieving Fairness in the Joint Allocation of Buffer and Bandwidth Resources: Principles and Algorithms

On Achieving Fairness in the Joint Allocation of Buffer and Bandwidth Resources: Principles and Algorithms On Achevng Farness n the Jont Allocaton of Buffer and Bandwdth Resources: Prncples and Algorthms Yunka Zhou and Harsh Sethu (correspondng author) Abstract Farness n network traffc management can mprove

More information

Internet Traffic Managers

Internet Traffic Managers Internet Traffc Managers Ibrahm Matta matta@cs.bu.edu www.cs.bu.edu/faculty/matta Computer Scence Department Boston Unversty Boston, MA 225 Jont work wth members of the WING group: Azer Bestavros, John

More information

ETAtouch RESTful Webservices

ETAtouch RESTful Webservices ETAtouch RESTful Webservces Verson 1.1 November 8, 2012 Contents 1 Introducton 3 2 The resource /user/ap 6 2.1 HTTP GET................................... 6 2.2 HTTP POST..................................

More information

Real-time Fault-tolerant Scheduling Algorithm for Distributed Computing Systems

Real-time Fault-tolerant Scheduling Algorithm for Distributed Computing Systems Real-tme Fault-tolerant Schedulng Algorthm for Dstrbuted Computng Systems Yun Lng, Y Ouyang College of Computer Scence and Informaton Engneerng Zheang Gongshang Unversty Postal code: 310018 P.R.CHINA {ylng,

More information

Mathematics 256 a course in differential equations for engineering students

Mathematics 256 a course in differential equations for engineering students Mathematcs 56 a course n dfferental equatons for engneerng students Chapter 5. More effcent methods of numercal soluton Euler s method s qute neffcent. Because the error s essentally proportonal to the

More information

Cache Performance 3/28/17. Agenda. Cache Abstraction and Metrics. Direct-Mapped Cache: Placement and Access

Cache Performance 3/28/17. Agenda. Cache Abstraction and Metrics. Direct-Mapped Cache: Placement and Access Agenda Cache Performance Samra Khan March 28, 217 Revew from last lecture Cache access Assocatvty Replacement Cache Performance Cache Abstracton and Metrcs Address Tag Store (s the address n the cache?

More information

Assignment # 2. Farrukh Jabeen Algorithms 510 Assignment #2 Due Date: June 15, 2009.

Assignment # 2. Farrukh Jabeen Algorithms 510 Assignment #2 Due Date: June 15, 2009. Farrukh Jabeen Algorthms 51 Assgnment #2 Due Date: June 15, 29. Assgnment # 2 Chapter 3 Dscrete Fourer Transforms Implement the FFT for the DFT. Descrbed n sectons 3.1 and 3.2. Delverables: 1. Concse descrpton

More information

Response-Time Guarantees in ATM Networks

Response-Time Guarantees in ATM Networks Response-Tme Guarantees n ATM Networks Andreas Ermedahl Hans Hansson Mkael Sjödn Department of Computer Systems Uppsala Unversty Sweden E-mal: febbe,hansh,mcg@docs.uu.se Abstract We present a method for

More information

Brave New World Pseudocode Reference

Brave New World Pseudocode Reference Brave New World Pseudocode Reference Pseudocode s a way to descrbe how to accomplsh tasks usng basc steps lke those a computer mght perform. In ths week s lab, you'll see how a form of pseudocode can be

More information

Distributed Resource Scheduling in Grid Computing Using Fuzzy Approach

Distributed Resource Scheduling in Grid Computing Using Fuzzy Approach Dstrbuted Resource Schedulng n Grd Computng Usng Fuzzy Approach Shahram Amn, Mohammad Ahmad Computer Engneerng Department Islamc Azad Unversty branch Mahallat, Iran Islamc Azad Unversty branch khomen,

More information

Fibre-Optic AWG-based Real-Time Networks

Fibre-Optic AWG-based Real-Time Networks Fbre-Optc AWG-based Real-Tme Networks Krstna Kunert, Annette Böhm, Magnus Jonsson, School of Informaton Scence, Computer and Electrcal Engneerng, Halmstad Unversty {Magnus.Jonsson, Krstna.Kunert}@de.hh.se

More information

Architectural Optimization & Design of Embedded Systems based on AADL Performance Analysis

Architectural Optimization & Design of Embedded Systems based on AADL Performance Analysis Amercan Journal of Computer Archtecture 2012, 1(2): 21-36 DOI: 10.5923/j.ajca.20120102.02 Archtectural Optmzaton & Desgn of Embedded Roberto Varona-Gómez 1,*, Eugeno Vllar 1, Ana Isabe l Rodrígue z 2,

More information

The Codesign Challenge

The Codesign Challenge ECE 4530 Codesgn Challenge Fall 2007 Hardware/Software Codesgn The Codesgn Challenge Objectves In the codesgn challenge, your task s to accelerate a gven software reference mplementaton as fast as possble.

More information

VRT012 User s guide V0.1. Address: Žirmūnų g. 27, Vilnius LT-09105, Phone: (370-5) , Fax: (370-5) ,

VRT012 User s guide V0.1. Address: Žirmūnų g. 27, Vilnius LT-09105, Phone: (370-5) , Fax: (370-5) , VRT012 User s gude V0.1 Thank you for purchasng our product. We hope ths user-frendly devce wll be helpful n realsng your deas and brngng comfort to your lfe. Please take few mnutes to read ths manual

More information

TECHNIQUE OF FORMATION HOMOGENEOUS SAMPLE SAME OBJECTS. Muradaliyev A.Z.

TECHNIQUE OF FORMATION HOMOGENEOUS SAMPLE SAME OBJECTS. Muradaliyev A.Z. TECHNIQUE OF FORMATION HOMOGENEOUS SAMPLE SAME OBJECTS Muradalyev AZ Azerbajan Scentfc-Research and Desgn-Prospectng Insttute of Energetc AZ1012, Ave HZardab-94 E-mal:aydn_murad@yahoocom Importance of

More information

Concurrent models of computation for embedded software

Concurrent models of computation for embedded software Concurrent models of computaton for embedded software and hardware! Researcher overvew what t looks lke semantcs what t means and how t relates desgnng an actor language actor propertes and how to represent

More information

NAG Fortran Library Chapter Introduction. G10 Smoothing in Statistics

NAG Fortran Library Chapter Introduction. G10 Smoothing in Statistics Introducton G10 NAG Fortran Lbrary Chapter Introducton G10 Smoothng n Statstcs Contents 1 Scope of the Chapter... 2 2 Background to the Problems... 2 2.1 Smoothng Methods... 2 2.2 Smoothng Splnes and Regresson

More information

An Iterative Solution Approach to Process Plant Layout using Mixed Integer Optimisation

An Iterative Solution Approach to Process Plant Layout using Mixed Integer Optimisation 17 th European Symposum on Computer Aded Process Engneerng ESCAPE17 V. Plesu and P.S. Agach (Edtors) 2007 Elsever B.V. All rghts reserved. 1 An Iteratve Soluton Approach to Process Plant Layout usng Mxed

More information

Notes on Organizing Java Code: Packages, Visibility, and Scope

Notes on Organizing Java Code: Packages, Visibility, and Scope Notes on Organzng Java Code: Packages, Vsblty, and Scope CS 112 Wayne Snyder Java programmng n large measure s a process of defnng enttes (.e., packages, classes, methods, or felds) by name and then usng

More information

Petri Net Based Software Dependability Engineering

Petri Net Based Software Dependability Engineering Proc. RELECTRONIC 95, Budapest, pp. 181-186; October 1995 Petr Net Based Software Dependablty Engneerng Monka Hener Brandenburg Unversty of Technology Cottbus Computer Scence Insttute Postbox 101344 D-03013

More information

A Free-Collision MAC Proposal for Networks

A Free-Collision MAC Proposal for Networks 12th Brazlan Workshop on Real-Tme and Embedded Systems 89 A Free-Collson MAC Proposal for 802.11 Networks Omar Alment 1,2, Gullermo Fredrch 1, Gullermo Reggan 1 1 SITIC Group Unversdad Tecnológca Naconal

More information

Meta-heuristics for Multidimensional Knapsack Problems

Meta-heuristics for Multidimensional Knapsack Problems 2012 4th Internatonal Conference on Computer Research and Development IPCSIT vol.39 (2012) (2012) IACSIT Press, Sngapore Meta-heurstcs for Multdmensonal Knapsack Problems Zhbao Man + Computer Scence Department,

More information

Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution

Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution Dynamc Voltage Scalng of Supply and Body Bas Explotng Software Runtme Dstrbuton Sungpack Hong EE Department Stanford Unversty Sungjoo Yoo, Byeong Bn, Kyu-Myung Cho, Soo-Kwan Eo Samsung Electroncs Taehwan

More information

Concurrent Apriori Data Mining Algorithms

Concurrent Apriori Data Mining Algorithms Concurrent Apror Data Mnng Algorthms Vassl Halatchev Department of Electrcal Engneerng and Computer Scence York Unversty, Toronto October 8, 2015 Outlne Why t s mportant Introducton to Assocaton Rule Mnng

More information

Agenda & Reading. Simple If. Decision-Making Statements. COMPSCI 280 S1C Applications Programming. Programming Fundamentals

Agenda & Reading. Simple If. Decision-Making Statements. COMPSCI 280 S1C Applications Programming. Programming Fundamentals Agenda & Readng COMPSCI 8 SC Applcatons Programmng Programmng Fundamentals Control Flow Agenda: Decsonmakng statements: Smple If, Ifelse, nested felse, Select Case s Whle, DoWhle/Untl, For, For Each, Nested

More information

WITH rapid improvements of wireless technologies,

WITH rapid improvements of wireless technologies, JOURNAL OF SYSTEMS ARCHITECTURE, SPECIAL ISSUE: HIGHLY-RELIABLE CPS, VOL. 00, NO. 0, MONTH 013 1 Adaptve GTS Allocaton n IEEE 80.15.4 for Real-Tme Wreless Sensor Networks Feng Xa, Ruonan Hao, Je L, Naxue

More information

Load-Balanced Anycast Routing

Load-Balanced Anycast Routing Load-Balanced Anycast Routng Chng-Yu Ln, Jung-Hua Lo, and Sy-Yen Kuo Department of Electrcal Engneerng atonal Tawan Unversty, Tape, Tawan sykuo@cc.ee.ntu.edu.tw Abstract For fault-tolerance and load-balance

More information

Learning the Kernel Parameters in Kernel Minimum Distance Classifier

Learning the Kernel Parameters in Kernel Minimum Distance Classifier Learnng the Kernel Parameters n Kernel Mnmum Dstance Classfer Daoqang Zhang 1,, Songcan Chen and Zh-Hua Zhou 1* 1 Natonal Laboratory for Novel Software Technology Nanjng Unversty, Nanjng 193, Chna Department

More information

Biostatistics 615/815

Biostatistics 615/815 The E-M Algorthm Bostatstcs 615/815 Lecture 17 Last Lecture: The Smplex Method General method for optmzaton Makes few assumptons about functon Crawls towards mnmum Some recommendatons Multple startng ponts

More information

Virtual Machine Migration based on Trust Measurement of Computer Node

Virtual Machine Migration based on Trust Measurement of Computer Node Appled Mechancs and Materals Onlne: 2014-04-04 ISSN: 1662-7482, Vols. 536-537, pp 678-682 do:10.4028/www.scentfc.net/amm.536-537.678 2014 Trans Tech Publcatons, Swtzerland Vrtual Machne Mgraton based on

More information

Shared Running Buffer Based Proxy Caching of Streaming Sessions

Shared Running Buffer Based Proxy Caching of Streaming Sessions Shared Runnng Buffer Based Proxy Cachng of Streamng Sessons Songqng Chen, Bo Shen, Yong Yan, Sujoy Basu Moble and Meda Systems Laboratory HP Laboratores Palo Alto HPL-23-47 March th, 23* E-mal: sqchen@cs.wm.edu,

More information

Routing in Degree-constrained FSO Mesh Networks

Routing in Degree-constrained FSO Mesh Networks Internatonal Journal of Hybrd Informaton Technology Vol., No., Aprl, 009 Routng n Degree-constraned FSO Mesh Networks Zpng Hu, Pramode Verma, and James Sluss Jr. School of Electrcal & Computer Engneerng

More information

A fault tree analysis strategy using binary decision diagrams

A fault tree analysis strategy using binary decision diagrams Loughborough Unversty Insttutonal Repostory A fault tree analyss strategy usng bnary decson dagrams Ths tem was submtted to Loughborough Unversty's Insttutonal Repostory by the/an author. Addtonal Informaton:

More information

Support Vector Machines

Support Vector Machines /9/207 MIST.6060 Busness Intellgence and Data Mnng What are Support Vector Machnes? Support Vector Machnes Support Vector Machnes (SVMs) are supervsed learnng technques that analyze data and recognze patterns.

More information

CE 221 Data Structures and Algorithms

CE 221 Data Structures and Algorithms CE 1 ata Structures and Algorthms Chapter 4: Trees BST Text: Read Wess, 4.3 Izmr Unversty of Economcs 1 The Search Tree AT Bnary Search Trees An mportant applcaton of bnary trees s n searchng. Let us assume

More information

TN348: Openlab Module - Colocalization

TN348: Openlab Module - Colocalization TN348: Openlab Module - Colocalzaton Topc The Colocalzaton module provdes the faclty to vsualze and quantfy colocalzaton between pars of mages. The Colocalzaton wndow contans a prevew of the two mages

More information

Complex Numbers. Now we also saw that if a and b were both positive then ab = a b. For a second let s forget that restriction and do the following.

Complex Numbers. Now we also saw that if a and b were both positive then ab = a b. For a second let s forget that restriction and do the following. Complex Numbers The last topc n ths secton s not really related to most of what we ve done n ths chapter, although t s somewhat related to the radcals secton as we wll see. We also won t need the materal

More information

SLAM Summer School 2006 Practical 2: SLAM using Monocular Vision

SLAM Summer School 2006 Practical 2: SLAM using Monocular Vision SLAM Summer School 2006 Practcal 2: SLAM usng Monocular Vson Javer Cvera, Unversty of Zaragoza Andrew J. Davson, Imperal College London J.M.M Montel, Unversty of Zaragoza. josemar@unzar.es, jcvera@unzar.es,

More information

IP Camera Configuration Software Instruction Manual

IP Camera Configuration Software Instruction Manual IP Camera 9483 - Confguraton Software Instructon Manual VBD 612-4 (10.14) Dear Customer, Wth your purchase of ths IP Camera, you have chosen a qualty product manufactured by RADEMACHER. Thank you for the

More information

A Sub-Critical Deficit Round-Robin Scheduler

A Sub-Critical Deficit Round-Robin Scheduler A Sub-Crtcal Defct ound-obn Scheduler Anton Kos, Sašo Tomažč Unversty of Ljubljana, Faculty of Electrcal Engneerng, Ljubljana, Slovena E-mal: anton.kos@fe.un-lj.s Abstract - A scheduler s an essental element

More information

Introduction to Programming. Lecture 13: Container data structures. Container data structures. Topics for this lecture. A basic issue with containers

Introduction to Programming. Lecture 13: Container data structures. Container data structures. Topics for this lecture. A basic issue with containers 1 2 Introducton to Programmng Bertrand Meyer Lecture 13: Contaner data structures Last revsed 1 December 2003 Topcs for ths lecture 3 Contaner data structures 4 Contaners and genercty Contan other objects

More information

Report on On-line Graph Coloring

Report on On-line Graph Coloring 2003 Fall Semester Comp 670K Onlne Algorthm Report on LO Yuet Me (00086365) cndylo@ust.hk Abstract Onlne algorthm deals wth data that has no future nformaton. Lots of examples demonstrate that onlne algorthm

More information

Conditional Speculative Decimal Addition*

Conditional Speculative Decimal Addition* Condtonal Speculatve Decmal Addton Alvaro Vazquez and Elsardo Antelo Dep. of Electronc and Computer Engneerng Unv. of Santago de Compostela, Span Ths work was supported n part by Xunta de Galca under grant

More information

Utility-Based Acceleration of Multithreaded Applications on Asymmetric CMPs

Utility-Based Acceleration of Multithreaded Applications on Asymmetric CMPs Utlty-Based Acceleraton of Multthreaded Applcatons on Asymmetrc CMPs José A. Joao M. Aater Suleman Onur Mutlu Yale N. Patt ECE Department The Unversty of Texas at Austn Austn, TX, USA {joao, patt}@ece.utexas.edu

More information

An Online Delay Efficient Multi-Class Packet Scheduler for Heterogeneous M2M Uplink Traffic

An Online Delay Efficient Multi-Class Packet Scheduler for Heterogeneous M2M Uplink Traffic An Onlne Delay Effcent Mult-Class Packet Scheduler for Heterogeneous M2M Uplnk Traffc Akshay Kumar, Ahmed Abdelhad and Charles Clancy Hume Center, Vrgna Tech Emal:{akshay2, aabdelhad, tcc}@vt.edu Abstract

More information

Adaptive Load Shedding for Windowed Stream Joins

Adaptive Load Shedding for Windowed Stream Joins Adaptve Load Sheddng for Wndowed Stream Jons Bu gra Gedk College of Computng, GaTech bgedk@cc.gatech.edu Kun-Lung Wu, Phlp Yu T.J. Watson Research, IBM {klwu,psyu}@us.bm.com Lng Lu College of Computng,

More information

Use of Genetic Algorithms in Efficient Scheduling for Multi Service Classes

Use of Genetic Algorithms in Efficient Scheduling for Multi Service Classes Use of Genetc Algorthms n Effcent Schedulng for Mult Servce Classes Shyamale Thlakawardana and Rahm Tafazoll Centre for Communcatons Systems Research (CCSR), Unversty of Surrey, Guldford, GU27XH, UK Abstract

More information

A QoS-aware Scheduling Scheme for Software-Defined Storage Oriented iscsi Target

A QoS-aware Scheduling Scheme for Software-Defined Storage Oriented iscsi Target A QoS-aware Schedulng Scheme for Software-Defned Storage Orented SCSI Target Xanghu Meng 1,2, Xuewen Zeng 1, Xao Chen 1, Xaozhou Ye 1,* 1 Natonal Network New Meda Engneerng Research Center, Insttute of

More information