Multitasking and Real-time Scheduling

Size: px
Start display at page:

Download "Multitasking and Real-time Scheduling"

Transcription

1 Multtaskng and Real-tme Schedulng EE8205: Embedded Computer Systems Dr. Gul N. Khan Electrcal and Computer Engneerng Ryerson Unversty Overvew Processes/Tasks and Concurrency Schedulng Prortes and Polces Multtaskng Real-tme Schedulng Fxed-Prorty and Earlest Deadlne Frst Schedulng Sporadc and Aperodc Process Schedulng Chapter 6 of the Text by Wayne Wolf, Chapter 13 of Text by Burns and Wellngs G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 1

2 Introducton to Processes All multprogrammng operatng systems are bult around the concept of processes. Process s also called a task. OS and Processes OS must nterleave the executon of several processes to maxmze CPU usage. Keepng reasonable/mnmum response tme OS must allocate resources to processes. By avodng deadlock OS must also support: IPC: Inter-process communcaton Creaton of processes by other processes G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 2

3 Task/Process Concept Seral Executon of Two Processes Interleavng the Executon of Process 1 and 2 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 3

4 Processes and Managng Tmng Complexty Multple rates multmeda automotve Asynchronous Input user nterfaces communcaton systems Engne Control Tasks spark control crankshaft sensng fuel/ar mxture oxygen sensor Kalman flter Engne Controller G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 4

5 Concurrency Only one thread runs at a tme whle others are watng. Processor swtches from one process to another so quckly that t appears all threads are runnng smultaneously. Processes run concurrently. Programmer assgns prorty to each process and the scheduler uses t to determne whch process to run next. Real-Tme Kernel Processes call a lbrary of run-tme routnes (known as the real-tme kernel) manages resources. Kernel provdes mechansms to swtch between processes, for coordnaton, synchronzaton, communcatons, and prorty. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 5

6 Process Context Each process has ts own stack and context. A context swtch from process "A" to process "B" frst saves regsters n context A, and then reloads all CPU regsters from context B. Executng Process A Process B Watng Save Context-A Restore Context-B Watng Executng Executng Restore Context-A Save Context-B Watng G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 6

7 Basc Process States There are three basc states of a process The Runnng state Φ The process that gets executed. (Max of one for one CPU) The Ready state Φ A process s ready to be executed. The Blocked state (Watng) Φ When a process cannot execute untl some event occurs. (e.g. completon of an I/O) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 7

8 5-State Process Model More Process States At parent request Dspatch Schedulng-allowed Release Admt New Ready Runnng Ext Commtment to executon when ready (n terms of # of processes & memory) Event Occurs Tme-out or nterrupt Event Wat Fle request I/O IPC Not elgble for Executon but Info preserved temporarly Blocked At parent request G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 8

9 Process Transtons Ready Runnng Dspatcher selects a new process to run. When the turn comes. Runnng Ready Runnng process has expred ts tme slot. A hgher prorty process s n the ready state. Runnng Blocked (watng) When a process requests somethng for whch t must wat. Φ A servce that the OS s not ready to perform. Φ An access to a resource not yet avalable. Φ Intates I/O and must wat for the result. Φ Watng for a process to provde nput (IPC). Blocked Ready When the event, for whch process s watng, occurs. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 9

10 Process Modes of Executon Most processors support at least two executon modes: Prvleged mode System mode, kernel mode, supervsor mode, Φ Manpulatng control regsters Φ Memory management... User mode Φ Less-prvleged mode Φ User programs execute n ths mode. Therefore CPU provdes a (or a few) mode bt, whch may only be set by an nterrupt or trap or OS call G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 10

11 Process Herarches Process A created two chld processes, B and C. Process B created three chld processes, D, E & F. Forms a herarchy UNIX calls ths a "process group" Wndows has no concept of process herarchy All processes are created equally. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 11

12 UNIX Processes 2 modes: User mode and Kernel mode. System processes run n Kernel mode. User processes run n user mode for user nstructons and n kernel mode for OS/kernel nstructons 9 states for processes UNIX Process State Two runnng states for user or kernel modes. Pre-empted state s for processes returnng from Kernel to user mode. Kernel schedules another hgher-prorty process. A process runnng n Kernel mode cannot be pre-empted. Ths makes UNIX unsutable for real-tme. More later G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 12

13 UNIX Process Transton Dagram Two runnng states: User and Kernel Preempted State: Kernel schedules another hgh prorty process. A Process runnng n Kernel mode cannot be preempted. That makes Unx/Lnux unsutable for real-tme applcatons G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 13

14 UNIX Process Creaton Every process, except process 0, s created by the fork() system call. fork() allocates entry n process table and assgns a unque PID to the chld process chld gets a copy of process mage of parent: both chld and parent are executng the same code followng fork(). fork() returns the PID of the chld to the parent process and returns 0 to the chld process. Process 0 s created at boot tme and becomes the swapper after forkng process 1 (the INIT process) When a user logs n: process 1 creates a process for that user. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 14

15 UNIX-style Process Creaton nt fork() Creates an exact copy of the callng process. nt execve(char *progname, char *argv[ ]) Runs a new program n the callng process Destroyng the old program nt ext(nt retcode) Exts the callng process nt wat(nt *retcode) Wats for any exted chld, returns ts pd Blocks tself G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 15

16 UNIX Fork G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 16

17 Unx Fork Example #nclude <sys/types.h> #nclude <stdo.h> #nclude <unstd.h> nt man() { pd_t pd; pd = getpd(); /* Parent process created, get ts ID */ pd = fork(); /* Create a chld process */ f (pd == 0) { /* only the chld process code should get here */ whle(1) { fprntf(stderr, I am chld process \n ); usleep( ); /* wat for 10 seconds */ } } /* Only parent should get here */ fprntf(stderr," I am PARENT: I wat for 20 seconds\n"); usleep( ); fprntf(stderr,"i am PARENT: Kll chld: %u\n",pd); kll(pd,9); return(0); } G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 17

18 Process Swtchng A process swtch may occur whenever the OS gan control of the CPU. Supervsor Call Φ Transfer control to a pece of OS code (e.g. fle open). Φ Process may be swtched to a blocked state. Trap Φ An error resulted from the last nstructon. Process moves to Ext state. Interrupt by an external ndependent event. Φ Clock Interrupt: process has executed for the maxmum allowable tme slce. Swtch to Blocked state. Φ I/O Interrupt: OS moves watng processes to READY Φ Memory Fault: Memory address block s not n vrtual memory so t must be brought nto man memory. Move process to blocked state. (Watng for the I/O to complete) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 18

19 Process/Task Swtchng How to change a process state Save context of processor ncludng PC and other regsters Update the PCB/TCB (process/task control block) wth the new state and other assocated nformaton. e.g. accountng Move PCB to approprate queue. Ready, blocked, suspend. Select another process for executon. Schedulng decson Update the process (task) control block of the process (task) selected. Update memory-management data structures Restore context of the selected process by reloadng prevous PC and regsters. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 19

20 Foreground/Background Multtaskng System Start Interrupt Interrupt Interrupt Intalze ISR for Task #1 ISR for Task #2 ISR for Task #3 Wat for Interrupts IRET IRET IRET G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 20

21 Foreground/Background System Most of the actual work s performed n the "foreground" ISRs, wth each ISR processng a partcular hardware event. Man program performs ntalzaton and then enters a "background" loop that wats for nterrupts to occur. System responds to external events wth a predctable amount of latency. Movng to Background Move non-tme-crtcal work (such as updatng a dsplay) nto background task. Foreground ISR wrtes data to queue, then background removes and processes t. An alternatve to gnorng one or more nterrupts as the result of nput overrun. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 21

22 Lmtatons of the Foreground/Background Multtaskng Best possble performance requres movng as much as possble nto the background. Background becomes collecton of queues and assocated routnes to process the data. Optmzes latency of the ndvdual ISRs, but background requres a managed allocaton of processor tme. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 22

23 Co-operatve Multtaskng Hdes context swtchng mechansm; Stll reles on processes to gve up CPU. Each process allows a context swtch at cswtch() call. Separate scheduler chooses whch process runs next. Context swtchng Who controls when the context s swtched? How s the context swtched? Problems wth co-operatve multtaskng Programmng errors can keep other processes out: Process never gves up CPU; Process wats too long to swtch, mssng nput. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 23

24 Context Swtchng Must copy all regsters to actvaton record, keepng proper return value for PC. Must copy new actvaton record nto CPU state. How does the program that copes the context keep ts own context? Context swtchng n ARM Start new process: Save old process: ADR r0,nextproc LDR r13,[r0] LDMDB r13,{r0,r14} MSR SPSR,r0 LDMIA r13,{r0-r14}^ MOVS pc,r14 STMIA r13,{r0-r14}^ MRS r0,spsr STMDB r13,{r0,r15} G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 24

25 Preemptve Multtaskng Most powerful form of multtaskng OS controls when contexts swtches OS determnes what process runs next Use tmer to call OS, swtch contexts: Flow of control wth preempton: nterrupt nterrupt CPU nterrupt T I M E R P1 OS P1 OS P2 tme G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 25

26 Preemptve Context Swtchng Tmer-nterrupt gves control to OS, whch saves nterrupted process s state n an actvaton record. OS chooses next process to run. OS nstalls desred actvaton record as current CPU state. Why not use nterrupts We could change the nterrupt vector at every perod, but: We would need management code anyway; We would have to know the next perod s process at the start of the current process. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 26

27 Non-Preemptve Context Swtch State of Process A Runnng Interrupted Runnng Ready Interrupt Routne Run-Tme Kernel Context Swtch State of Process B Blocked Ready Runnng G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 27

28 Non-Preemptve Context Swtch Pendng Runnng Yeldng Interrupted Ready Inactve G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 28

29 Preemptve Context Swtch State of Process A Runnng Interrupted Ready Interrupt Routne Run-Tme Kernel Context Swtch State of Process B Blocked Ready Interrupted Runnng G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 29

30 Preemptve Context Swtch Pendng Runnng Interrupted Ready Inactve G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 30

31 VxWorks Multtaskng Modern real-tme systems are based on the complementary concepts of multtaskng and nter-task communcatons. In VxWorks, tasks have mmedate, shared access to most system resources, whle also mantanng separate context to mantan ndvdual task control. A multtaskng envronment allows a real-tme applcaton to be constructed as a set of ndependent tasks, each wth ts own thread of executon and set of system resources. It s often essental to organze the real-tme applcatons nto ndependent but cooperatng, programs known tasks. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 31

32 VxWorks Multtaskng and Interrupts Another key faclty n real-tme systems s hardware nterrupt handlng. Interrupts are the usual mechansm to nform a system of external events. It s mportant to have the fastest possble response to external nterrupts. In VxWorks, nterrupt servce routnes (ISRs) run n a specal context of ther own, outsde any task s context. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 32

33 VxWorks Task Context A task s context ncludes: a thread of executon; that s, the task s program counter the CPU regsters and (optonally) floatng-pont regsters a stack for dynamc varables and functon calls I/O assgnments for standard nput, output, and error a delay tmer a tme-slce tmer kernel control structures sgnal handlers debuggng and performance montorng values In VxWorks, one mportant resource that s not part of a task s context s memory address space. All code executes n a sngle common address space. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 33

34 VxWorks Task States READY: The state of a task that s not watng for any resource other than the CPU. PEND: The state of a task that s blocked due to the unavalablty of some resource. DELAY: The state of a task that s asleep for some duraton. SUSPEND: The state of a task that s unavalable for executon. Ths state s used prmarly for debuggng. Suspenson does not nhbt state transton, only task executon. Thus, pended-suspended tasks can stll unblock and delayed-suspended tasks can stll be awaken. DELAY + S: The state of a task that s both delayed and suspended. PEND + S: The state of a task that s both pended and suspended. PEND + T: The state of a task that s pended wth a tmeout value. PEND + S + T: The state of a task that s both pended wth a tmeout value and suspended. state + I: The state of task specfed by state, plus an nherted prorty. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 34

35 Task-State Transtons G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 35

36 Wnd (VxWorks) Task Schedulng The default algorthm n wnd s prorty-based preemptve schedulng. You can also select to use round-robn schedulng for your applcatons. Both algorthms rely on the task s prorty. The wnd kernel has 256 prorty levels, numbered 0 through 255. Prorty 0 s the hghest and prorty 255 s the lowest. Tasks are assgned a prorty when created. You can also change a task s prorty level whle t s executng by callng taskprortyset( ). The ablty to change task prortes dynamcally allows applcatons to track precedence changes n the real world. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 36

37 VxWorks Task Control VxWorks lbrary tasklb provde routnes for task creaton and control, as well as for retrevng nformaton about tasks. Task Creaton and Actvaton taskspawn( ) Spawns (creates and actvates) a new task. taskint( ) Intalzes a new task. taskactvate( ) Actvates an ntalzed task. Task Name and ID Routnes taskname( ) Gets the task name assocated wth a task ID. tasknametoid( ) Looks up the task ID assocated wth a task. taskidself( ) Gets the callng task s ID. taskidverfy( ) Verfes the exstence of a specfed task. Task Informaton Routnes taskidlstget( ) Flls an array wth the IDs of all actve tasks. taskinfoget( ) Gets nformaton about a task. taskprortyget( ) Examnes the prorty of a task. taskregsget( ) Examnes a task s regsters (cannot be used for current task). G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 37

38 VxWorks Task Control Task-Deleton Routnes ext( ) Termnates the callng task and frees memory (task stacks and task control blocks only). taskdelete( ) Termnates a specfed task and frees memory (task stacks and task control blocks only). tasksafe( ) Protects the callng task from deleton. taskunsafe( ) Undoes a tasksafe( ) (makes the callng task avalable for deleton). Task Control Routnes tasksuspend( ) Suspends a task. taskresume( ) Resumes a task. taskrestart( ) Restarts a task. taskdelay( ) Delays a task; delay unts and resoluton n tcks. nanosleep( ) Delays a task; delay unts are nanoseconds. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 38

39 Task Scheduler Control VxWorks provde routnes for task scheduler control. taskprortyset( ) Changes the prorty of a task. kerneltmeslce( ) Controls round-robn schedulng. Round-robn schedulng s enabled by callng kerneltmeslce( ), whch takes a parameter for a tme slce, or nterval. Ths nterval s the amount of tme each task s allowed to run before relnqushng the processor to another equal-prorty task. tasklock( ) Dsables task reschedulng. taskunlock( ) Enables task reschedulng. The wnd scheduler can be explctly dsabled and enabled on a per-task bass wth the routnes tasklock( ) and taskunlock( ). When a task dsables the scheduler by callng tasklock( ), no prortybased preempton can take place whle that task s runnng. Note that preempton locks prevent task context swtchng, but do not lock out nterrupt handlng. Preempton locks can be used to acheve mutual excluson; however, keep the duraton of preempton lockng to a mnmum. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 39

40 IPC: Interprocess Communcaton OS provdes mechansms so that processes can pass data. Two types of semantcs: blockng: sendng process wats for response; non-blockng: sendng process contnues. IPC styles Shared memory: processes have some memory n common; must cooperate to avod destroyng and/or mssng any messages. Message passng: processes send messages along a communcaton channel---no common address space. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 40

41 IPC Styles Shared memory on a bus: CPU 1 Memory CPU 2 Message passng CPU 1 CPU 2 message message message G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 41

42 Crtcal Regons Crtcal regon: secton of code that cannot be nterrupted by another process. Examples: wrtng shared memory; accessng I/O devce. Semaphores Semaphore: OS prmtve for controllng access to crtcal regons. Get access to semaphore wth P().Perform crtcal regon operatons. Release semaphore wth V(). G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 42

43 Embedded vs. General-Purpose Schedulng Workstatons try to avod starvng processes of CPU access. Farness = access to CPU. Embedded systems must meet deadlnes. Low-prorty processes may not run for a long tme. Prorty-drven Schedulng Each process has a prorty CPU goes to hghest-prorty process that s ready Prortes determne the schedulng polcy: Fxed prorty Tme-varyng prortes G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 43

44 Prorty-drven Schedulng Rules: each process has a fxed prorty (1 hghest); hghest-prorty ready process gets CPU; process contnues untl done. Processes P1: prorty 1, executon tme 10 P2: prorty 2, executon tme 30 P3: prorty 3, executon tme 20 P3 ready t=18 P2 ready t=0 P1 ready t=15 P2 P1 P2 P G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 44 tme

45 The Schedulng Problem Can we meet all deadlnes? Must be able to meet deadlnes n all cases. How much CPU tme, we need to meet the deadlnes? Process Intaton Perodc process: executes on (almost) every perod. Aperodc process: executes on demand. Analyzng aperodc process set s harder---must consder worst-case combnatons of process actvatons. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 45

46 Process Tmng Requrements Perod: nterval between process actvatons. Intaton nterval: recprocal of perod. Intaton tme: tme at whch process becomes ready. Deadlne: tme at whch process must fnsh. Tmng volatonswhat happens f a process doesn t fnsh by ts deadlne? Hard deadlne: system fals f mssed. Soft deadlne: user may notce, but system doesn t necessarly fal. Example: Space Shuttle software error A software tmng error delayed shuttle s frst launch: Prmary control system PASS and backup system BFS. BFS faled to synchronze wth PASS. Change to one routne added delay that threw off start tme calculaton. 1 n 67 chance of tmng problem. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 46

47 Process Model The applcaton s assumed to consst of a fxed set of processes. Processes are completely ndependent of each other. All system's overheads, context-swtchng tmes and so on are gnored (.e. assumed to have zero cost) All processes are perodc, wth known perods. All processes have a deadlne equal to ther perod (that s, each process must complete before t s next released) All processes have a fxed worst-case executon tme. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 47

48 CPU Schedulng CPU schedulng determnes whch process s gong to execute next. Relevant to Real-tme Systems CPU scheduler s also known as the dspatcher It s nvoked on an event that may lead to choose another process for executon: Clock nterrupts I/O nterrupts Operatng system calls and traps Sgnals Short-term schedulng G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 48

49 Schedulng Polces The selecton functon: It determnes whch process n the ready queue s selected next for executon. The decson mode: It specfes the nstants n tme at whch the selecton functon s exercsed Non-preemptve Once a process s n the runnng state, t wll contnue untl t termnates or blocks tself for I/O. Preemptve Currently runnng process may be nterrupted and moved to the Ready state by the OS. Allows for better servce snce any one process cannot monopolze the processor for very long. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 49

50 FCFS Schedulng Servce tme = Total processor tme needed n a (CPU-I/O) cycle Process Arrval Tme Servce Tme FCFS: Frst Come Frst Served When the current process ceases to execute, the oldest process n the Ready queue s selected G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 50

51 FCFS: Frst Come Frst Served Selecton functon: The process that has been watng the longest n the ready queue Decson mode: Non-preemptve Process run untl t blocks tself FCFS Drawbacks Process that does not perform any I/O wll monopolze the processor. Favors CPU-bound processes: I/O-bound processes have to wat untl CPU-bound process completes. I/O-bound processes have to wat even when ther I/O s completed (poor devce utlzaton). We could have kept the I/O devces busy by gvng a bt more prorty to I/O bound processes. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 51

52 Tme-Slced Schedulng Known as Round Robn Each process runs for a fxed amount of tme. Processes are run n a round-robn sequence. Approprate for regular mult-programmng envronments. Poor response tme performance. Need better strategy for real-tme system applcatons. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 52

53 Round Robn (RR) Schedulng Selecton functon: FCFS Decson mode: Preemptve A process s allowed to run untl the tme slce perod has expred Then a clock nterrupt occurs and the runnng process s put on the ready queue. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 53

54 Round Robn Tme quantum must be substantally larger than the tme requred to handle the clock nterrupt and dspatchng. Round Robn favors CPU-bound processes I/O bound process uses the CPU for a tme less than the tme quantum and t s blocked watng for I/O. A CPU-bound process run for full tme slce and put back nto the ready queue. Soluton: Use Vrtual Round Robn When an I/O completes, the blocked process s moved to an auxlary queue that gets preference over the man ready queue. A process dspatched from the auxlary queue runs no longer than the basc tme quantum mnus the tme spent runnng snce t was selected from the ready queue. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 54

55 Problem: Consder the followng processes are to be scheduled usng FCFS and Round Robn Process A B C D Arrval Tme Ta Servce Tme Ts Perform the analyss for each schedulng algorthm. FCFS RR, q = 1 A BBBBBBBBBC D DDDDDDDD A BCBDBDBDBD B DBDBDBDD A B C D FCFS Tf Tr Tr/Ts RR q = 1 Tf Tr Tr/Ts G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 55

56 Problem. Consder the followng processes, A, B, C, D and E that are to be scheduled usng, FCFS and Round Robn schedulng technques wth tme quantum 1 and 4. A B C D E Ta Ts Where Ta = Process Arrval Tme Ts = Process Servce Tme Show a complete schedule for both cases. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 56

57 Real-tme Schedulng Technques Fxed-Prorty Schedulng (FPS) Earlest Deadlne Frst (EDF) FPS: Fxed-Prorty Schedulng Ths s the most wdely used approach. Each process has a fxed, (statc) prorty that s computed before executon. The runnable processes are executed n the order determned by ther prorty. In real-tme systems, the prorty of a process s derved from ts temporal requrements, not ts mportance to the correct functonng of the system or ts ntegrty. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 57

58 FPS: Fxed-Prorty Schedulng Rate Monotonc Prorty Assgnment Each process s assgned a (unque) prorty based on ts perod; the shorter the perod, the hgher the prorty For two processes and j: T < T j P > An optmal prorty assgnment means: f any process set can be scheduled (usng preemptve prorty-based schedulng) wth a fxed-prorty assgnment scheme, then the gven process set can also be scheduled wth a rate monotonc assgnment scheme Prorty 1 s the lowest (least) prorty P j G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 58

59 Prorty Assgnment: An Example Perod T: Mnmum tme between process releases. C: Worst-case computaton tme (WCET) of the process. U: The utlzaton of each process (equal to C/T). R: Worst-case response tme of the process. B: Worst-case blockng tme for the process. D: Deadlne of the process. N: Number of process. The nterference tme of the process. Release jtter of the process. Process Perod, T Prorty, P a 25 5 b 60 3 c 42 4 d e 75 2 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 59

60 Utlzaton-Based Analyss For D=T process sets, a suffcent but not necessary schedulablty test exsts. U N = 1 C T ( 2 N Utlzaton bound % % % % % % N 1 / N 1) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 60

61 Process Set A Utlzaton-Based Analyss Process Perod, T Computaton Tme, C Prorty, P Utlzaton, U a b c The combned utlzaton s 0.82 (or 82%) Ths s above the threshold for three processes (0.78) and, hence, ths process set fals the utlzaton test. c b a c b Tme G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 61

62 Tme-Lne for Process Set A Process a b c Process Release Tme Process Completon Tme Deadlne Met Process Completon Tme Deadlne Mssed Preempted Executng Tme c b a c b G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 62

63 Process Set B Utlzaton-Based Analyss Process Perod Computaton Tme Prorty Utlzaton T C P U a b c The combned utlzaton s (or 77.5%) Ths s below the threshold for three processes (0.78) and, hence, ths process set wll meet all ts deadlnes. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 63

64 Process Set C Utlzaton-Based Analyss Process Perod Computaton Tme Prorty Utlzaton T C P U a b c The combned utlzaton s 1.0 Ths s above the threshold for three processes (0.78) but the process set wll meet all ts deadlnes. The Utlzaton test s sad to be suffcent but not necessary G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 64

65 Process Tme-Lne for Process Set C a b c Tme Utlzaton-based test s nether exact nor general but ts O(N) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 65

66 Earlest Deadlne Frst (EDF) Schedulng The runnable processes are executed n the order determned by the absolute deadlnes of the processes. The next process to run beng the one wth the shortest (nearest) deadlne. It s possble to know the relatve deadlnes of each process e.g. 25ms after release. The absolute deadlnes are computed at run tme and hence the scheme s descrbed as dynamc. Value Based (VBS) Schedulng If a system can become overloaded then smple statc prortes or deadlnes are not suffcent; a more adaptve scheme s needed. Ths often takes the form of assgnng a value to each process and employng an on-lne value-based schedulng algorthm to decde whch process to run next. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 66

67 Preempton and Non-Preempton Wth prorty-based schedulng, a hgh-prorty process may be released durng the executon of a lower prorty one. In a preemptve scheme, there wll be an mmedate swtch to the hgher-prorty process Wth non-preempton, the lower-prorty process wll be allowed to complete before the other executes. Preemptve schemes enable hgher-prorty processes to be more reactve, and hence they are preferred. Alternatve strateges allow a lower prorty process to contnue to execute for a bounded tme. These schemes are known as deferred preempton or cooperatve dspatchng. Schemes such as EDF and VBS can also take on a preemptve or non pre-emptve form. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 67

68 Utlzaton-based Test for EDF N = 1 C T 1 A much smpler test Superor to FPS; t can support hgh utlzatons. However, FPS s easer to mplement, as prortes are statc. EDF s dynamc and requres a more complex run-tme system that wll have hgher overhead. It s easer to ncorporate processes wthout deadlnes nto FPS; gvng a process an arbtrary deadlne s more artfcal It s easer to ncorporate other factors nto the noton of prorty than t s nto the noton of deadlne. Durng overload stuatons: FPS s more predctable; Low prorty process mss ther deadlnes frst EDF s unpredctable; a domno effect can occur n whch a large number of processes mss deadlnes G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 68

69 Response-Tme Analyss Task 's worst-case response tme, R s calculated frst and then checked (trvally) wth ts deadlne. R D R = C + I where I s the nterference from hgher prorty tasks Durng R, each hgher prorty task j wll execute a no. of tmes. Number of Releases = Total nterference = R T j R C j T j Celng functon gves the smallest nteger greater than the fractonal number on whch t acts. Celng of 1/3 = 2, 6/5 = 2 And 6/3 =2 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 69

70 Response Tme R R = C + j hp ( ) T j C j where hp() s the set of tasks wth prorty hgher than task Solve by formng a recurrence relatonshp: n n + 1 w = C + j hp ( ) T j n The set of values w, w, w,..., w,.. s monotoncally non-decreasng n When = n+1 0 w w the soluton to the equaton has been found, w must not be greater than R (e.g. 0 or C ) w C j G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 70

71 Response Tme Calculaton Algorthm for n 1..N loop -- for each process n turn n := 0 n w : = C loop n+1 calculate new w n+1 n f w = w then n R = w ext value found end f n+1 f w > T then ext value not found end f n := n + 1 end loop end loop G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 71

72 Response Tme Calculaton Example Process Set D Process Perod, T Computaton Tme, C Prorty, P a b c R a = 3 w w w 0 b 1 b 2 b = 3 3 = = 6 = = 6 7 R b = 6 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 72

73 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 73 Response Tme Calculaton Process c = + + = = + + = = + + = = c c c c w w w w = = + + = = + + = c c c R w w

74 Process Set C Process Perod, T Computaton Tme, C Prorty, P Response Tme, R a b c The combned utlzaton s 1.0. Ths was above the utlzaton threshold for three processes (0.78) therefore t faled the test. The response tme analyss shows that the process set wll meet all ts deadlnes. RTA s necessary and suffcent. If the process set passes the test they wll meet all ther deadlnes; f they fal the test then, at run-tme, a process wll mss ts deadlne. (unless computaton tme estmatons themselves turn out to be pessmstc) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 74

75 Worst-Case Executon Tme WCET Obtaned by ether measurement or analyss The problem wth measurement s that t s dffcult to be sure when the worst case has been observed. The drawback of analyss s that an effectve model of the processor (ncludng caches, ppelnes, memory wat states and so on) must be avalable. Most analyss technques nvolve two dstnct actvtes. The frst takes the process and decomposes ts code nto a drected graph of basc blocks. These basc blocks represent straght-lne code. The second component of the analyss takes the machne code correspondng to a basc block and uses the processor model to estmate ts worst-case executon tme. Once the tmes for all the basc blocks are known, the drected graph can be collapsed. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 75

76 Need Semantc Informaton WCET Analyss for I n loop f Cond then -- basc block of cost 100 else -- basc block of cost 10 end f; end loop; Smple cost 10 x 100 (+overhead), say But f Cond only true on 3 occasons then cost s 375 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 76

77 Real-tme Schedulng Exercses Exercse-1: Consder three processes P, Q and S. P has a perod of 100msec n whch t requres 30msecs of processng. The correspondng values for Q and S are (6, 1) and (25, 5) respectvely. Assume that P s the most mportant process n the system, followed by Q and then S. (1) What s the behavor of the scheduler f prorty s based on mportance? (2) What s the process utlzaton of P, Q and S. (3) How should the process be scheduled so that all deadlnes are met. (4) Illustrate one of the schemes that allows these processes to be scheduled. Exercse-2: Add a fourth process R, to the set of processes gven n Exercse-1. Falure of ths process wll not lead to safety beng undermned. R has a perod of 50ms, but has a processng requrement that s data dependent and vares from 5 to 25 ms. Dscuss how ths process should be ntegrated wth P, Q and S. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 77

78 Hard and Soft Real-tme Processes Hard Real-tme Process: The deadlne must not be mssed. Soft Real-tme Process: The applcaton s tolerant of mssed deadlnes. In many stuatons the WCET (worst-case executon tme) fgures for sporadc processes are consderably hgher than the averages. Measurng schedulablty wth worst-case fgures may lead to very low processor utlzatons. Interrupts often arrve n bursts e.g. an abnormal sensor readng may lead to sgnfcant addtonal computaton. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 78

79 Sporadc Processes A Sporadc process s that whch has hard real-tme applcatons. Sporadc processes have a mnmum nter-arrval tme. They also requre D < T The response tme algorthm for fxed prortyschedulng works perfectly for values of D less than T as long as the stoppng crtera becomes W n+1 > D It also works perfectly well wth any prorty orderng, hp() always gves the set of hgher-prorty processes G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 79

80 Hard/Soft Process Schedulng Gudelnes Rule 1 all processes should be schedulable usng average executon tmes and average arrval rates. Rule 2 all hard real-tme processes should be schedulable usng worst-case executon tmes and worst-case arrval rates of all processes (ncludng soft) A consequent of Rule 1 s that there may be stuatons n whch t s not possble to meet all current deadlnes Ths condton s known as a transent overload Rule 2 ensures that no hard process wll mss ts deadlne If Rule 2 gves rse to unacceptably low utlzatons for normal executon then acton must be taken to reduce the worst-case executon tmes (or arrval rates) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 80

81 Aperodc Processes Aperodc processes have soft real-tme jobs. They do not have mnmum nter-arrval tmes. Can run aperodc processes at a prorty below the prortes assgned to hard processes, therefore, they cannot steal, n a pre-emptve system, resources from the hard processes. Ths does not provde adequate support to soft processes, whch wll often mss ther deadlnes. To mprove the stuaton for soft processes, a server (sporadc) can be employed. Servers protect the processng resources needed by hard processes but otherwse allow soft processes to run as soon as possble. POSIX support Sporadc Servers G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 81

82 Process Sets wth D < T For D = T, Rate Monotonc prorty orderng s optmal. For D < T, (DMPO) Deadlne Monotonc Prorty Orderng s optmal. D < T Example Process Set Process Perod T D < D P > Deadlne Computaton Prorty D Tme, C P a b c d Proof of DMPO s Optmal s gven n the text j P j Response Tme, R G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 82

83 Deadlne Schedulng Exercses Exercse-1: Consder two jobs, A and B, n a deadlne schedulng system. The deadlne for A s before the deadlne for B. Explan why we should run A before B, that s, show that f runnng A then B fals to meet some deadlne then runnng B before A wll also fal to meet some deadlne. Exercse 2: Consder a set of 5 aperodc tasks whose executon profles are gven below. Develop the schedulng dagram of these processes employng EDF and FCFS. Process Arrval Tme Executon Tme Startng Deadlne A B C D E G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 83

84 Process Interactons and Blockng If a process s suspended watng for a lower-prorty process to complete some requred computaton then the prorty model s, n some sense, beng undermned. The process s sad to suffer prorty nverson. If a process s watng for a lower-prorty process, the process s sad to be blocked. Dynamc prortes can vary durng executon. One has to avod Prorty Inverson. Bounded Prorty Inverson Duraton s not longer than that of the crtcal secton where the lower-prorty process owns the resource. Unbounded Prorty Inverson Occurs when a thrd (medum-prorty) process preempts the lowprorty process durng the nverson for an ndefnte tme. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 84

85 Prorty Inverson An extreme example of prorty nverson, consder the executons of four perodc processes: a, b, c and d; and two resources: Q and V Example of Prorty Inverson Process Prorty Executon Sequence Release Tme a 1 EQQQQE 0 b 2 EE 2 c 3 EVVE 2 d 4 EEQVE 4 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 85

86 Process Example of Prorty Inverson d c b Process Completon Tme Deadlne Met Process Release Tme a Executng Preempted Executng wth Q locked Executng wth V locked Blocked G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 86

87 Prorty Inhertance If process a s blockng the process d, then t runs wth the prorty of d. Process d Process Release Tme Process Completon Tme Deadlne Met c b a G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 87

88 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 88 Calculatng Blockng If a process has m crtcal sectons that can lead to ts blockng then the maxmum number of tmes t can be blocked s m. If B s the maxmum blockng tme and K s the number of crtcal sectons, the process has an upper bound on ts Response Tme and Blockng: = = K k k C usage k B 1 ) ( ), ( blockng gven by: I B C R + + = j hp j j C T R B C R + + = ) ( j hp j j n n C T w B C w + + = + ) ( 1

89 Prorty Celng Protocols OCPP: Orgnal celng prorty protocol ICPP: Immedate celng prorty protocol OCPP Each process has a statc default prorty assgned (perhaps by the deadlne monotonc scheme) Each resource has a statc celng value defned, ths s the maxmum prorty of the processes that use t. A process has a dynamc prorty that s the maxmum of ts own statc prorty and any t nherts due to t blockng the hgherprorty processes. A process can only lock a resource f ts dynamc prorty s hgher than the celng of any currently locked resource. (excludng any that t has already locked tself) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 89

90 OCPP Inhertance Process d Executng Executng wth Q locked Executng wth V locked Process Completon Tme Deadlne Met Process Release Tme c b a G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 90

91 ICPP Each process has a statc default prorty assgned (perhaps by the deadlne monotonc scheme). Each resource has a statc celng value defned, ths s the maxmum prorty of the processes that use t. A process has a dynamc prorty that s the maxmum of ts own statc prorty and the celng values of any resources t has locked. As a consequence, a process wll only suffer a block at the very begnnng of ts executon. Once the process starts actually executng, all the resources t needs must be free; f they were not, then some process would have an equal or hgher prorty and the process's executon would be postponed. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 91

92 ICPP Inhertance Process Executng Executng wth Q locked Executng wth V locked Process Completon Tme Deadlne Met Process Release Tme d c b a G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 92

93 OCPP versus ICPP The worst-case behavor of the two celng schemes s dentcal (from a schedulng vew pont) A hgh-prorty process can be blocked at most once durng ts executon by lower-prorty processes Deadlocks are prevented. Transtve blockng s prevented. Ensure mutual exclusve access to resources (by protocol tself) There are some ponts of dfference: ICPP s easer to mplement than the orgnal (OCPP) as blockng relatonshps need not be montored ICPP leads to less context swtches as blockng s pror to frst executon ICPP requres more prorty movements as ths happens wth all resource usage OCPP changes prorty only f an actual block has occurred. ICPP s called Prorty Protect Protocol n POSIX G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 93

94 Mars Pathfnder Suffered Unbounded Prorty Inverson Low-prorty Meteorologcal Process: Acqured the (shared) bus. Medum-prorty, Long-runnng, Communcatons Process: Woke up and preempted the meteorologcal thread. Hgh-prorty Bus Management Process: Woke up and was blocked because t couldn't acqure the bus; When t couldn't meet ts deadlne t rentalzed the computer va a hardware reset. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 94

95 Mars Pathfnder G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 95

96 Duraton of an Unbounded Prorty Inverson Lmtng the duraton of unbounded prorty nverson prevents low-prorty process from beng preempted by the medumprorty processes durng the prorty nverson. Technque: Manpulate process prortes at run-tme. Schedulng: Processes wth hgher prorty are scheduled to run frst. Objectve: Assgn prortes n such a way that all outputs are computed before ther deadlnes. Deadlne-Drven Assgnment: Assgn hghest prortes to processes wth shortest deadlnes. Rate Monotonc Assgnment: Assgn hghest prortes to processes that run most frequently wthout regard to deadlnes. G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 96

97 Modfed Process ModelUntl Now: Deadlnes can be less than perod (D < T) Sporadc and aperodc processes, as well as perodc processes, can be supported Process nteractons are possble, wth the resultng blockng beng factored nto the response tme equatons. Extensons to the Orgnal Model Cooperatve Schedulng Release Jtter Arbtrary Deadlnes Fault Tolerance Offsets Optmal Prorty Assgnment G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 97

98 Cooperatve Schedulng True preemptve behavor s not always acceptable for safetycrtcal systems Cooperatve or deferred preempton splts processes nto slots Mutual excluson s va non-preempton The use of deferred preempton has two mportant advantages It ncreases the schedulablty of the system, and t can lead to lower values of C(computaton tme).wth deferred preempton, no nterference can occur durng the last slot of executon. Let the executon tme of the fnal block be After the soluton converge.e. The response tme s gven by: n n w + 1 w = B + MAX C F + j hp( ) Tj = n+1 n w w R = w + F n C j G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 98

99 Arbtrary Deadlnes To cater for the stuatons where D (and hence potentally R) > T w n n+ 1 w ( q) ( q) = B + ( q + 1) C + j hp( ) Tj n The number of releases s bounded by the lowest value of q for whch the followng relaton s true: R ( q) R ( q) T = w ( q) qt The worst-case response tme s then the maxmum value found for each q: R = max q= 0,1,2,... R C j ( q) G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 99

100 Fault Tolerance Fault tolerance va ether forward or backward error recovery always results n extra computaton Ths could be an excepton handler or a recovery block. In a real-tme fault tolerant system, deadlnes should stll be met even when a certan level of faults occur Ths level of fault tolerance s know as the fault model If the extra computaton tme that results from an error n process s f C R = C + B + j max j hp( ) T k hep( ) j where hep() s set of processes wth prorty equal to or hgher than R C + C f k G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 100

101 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 101 Fault Tolerance If F s the number of faults allows If there s a mnmum arrval nterval = f k f hep k j hp j j C T R C T R B C R max ) ( ) ( f k hep k j hp j j FC C T R B C R max ) ( ) ( =

102 Offsets So far assumed all processes share a common release tme (crtcal nstant) Process T D C R a b c Wth offsets Process T D C O R a b c G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 102

103 Non-Optmal Analyss In most realstc systems, process perods are not arbtrary but are lkely to be related to one another. When two processes have a common perod. In these stuatons t s easy to gve one process an offset (of T/2) and to analyze the resultng system usng a transformaton technque that removes the offset - and, hence, crtcal nstant analyss apples. Last page example: processes b and c (havng the offset of 10) are replaced by a sngle notonal process wth perod 10, computaton tme 4, deadlne 10 but no offset G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 103

104 Non-Optmal Analyss The notonal process, n has two mportant propertes. If t s schedulable (when sharng a crtcal nstant wth all other processes) then the two real process wll meet ther deadlnes when one s gven the half perod offset If all lower prorty processes are schedulable when sufferng nterference from the notonal process (and other hgh-prorty processes) then they wll reman schedulable when the notonal process s replaced by two real processes (one wth the offset). These propertes follow from the observaton that the notonal process always uses more (or equal) CPU tme than the two real process. Process T D C O R a n G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 104

105 G. Khan Embedded Computer Systems EE8205: Multtaskng & Real-tme Schedulng Page: 105 Notonal Process Parameters The above parameters can be extended to more than two processes ), ( ), ( ), ( 2 2 b a n b a n b a n b a n P P Max P D D Mn D C C Max C T T T = = = = =

Real-time Scheduling

Real-time Scheduling Real-tme Schedulng COE718: Embedded System Desgn http://www.ee.ryerson.ca/~courses/coe718/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty Overvew RTX

More information

Multitasking and Real-time Scheduling

Multitasking and Real-time Scheduling Multtaskng and Real-tme Schedulng EE8205: Embedded Computer Systems http://www.ee.ryerson.ca/~courses/ee8205/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrcal and Computer Engneerng Ryerson Unversty

More information

AADL : about scheduling analysis

AADL : about scheduling analysis AADL : about schedulng analyss Schedulng analyss, what s t? Embedded real-tme crtcal systems have temporal constrants to meet (e.g. deadlne). Many systems are bult wth operatng systems provdng multtaskng

More information

Scheduling. In general, a scheduling scheme provides two features: An algorithm for ordering the use of system resources (in particular the CPUs)

Scheduling. In general, a scheduling scheme provides two features: An algorithm for ordering the use of system resources (in particular the CPUs) Schedulng Goal To understand the role that schedulng and schedulablty analyss plays n predctng that real-tme applcatons meet ther deadlnes Topcs Smple process model The cyclc executve approach Process-based

More information

Virtual Memory. Background. No. 10. Virtual Memory: concept. Logical Memory Space (review) Demand Paging(1) Virtual Memory

Virtual Memory. Background. No. 10. Virtual Memory: concept. Logical Memory Space (review) Demand Paging(1) Virtual Memory Background EECS. Operatng System Fundamentals No. Vrtual Memory Prof. Hu Jang Department of Electrcal Engneerng and Computer Scence, York Unversty Memory-management methods normally requres the entre process

More information

Lecture 7 Real Time Task Scheduling. Forrest Brewer

Lecture 7 Real Time Task Scheduling. Forrest Brewer Lecture 7 Real Tme Task Schedulng Forrest Brewer Real Tme ANSI defnes real tme as A Real tme process s a process whch delvers the results of processng n a gven tme span A data may requre processng at a

More information

Verification by testing

Verification by testing Real-Tme Systems Specfcaton Implementaton System models Executon-tme analyss Verfcaton Verfcaton by testng Dad? How do they know how much weght a brdge can handle? They drve bgger and bgger trucks over

More information

Processes and Multitasking

Processes and Multitasking Processes and Multitasking EE8205: Embedded Computer Systems http://www.ee.ryerson.ca/~courses/ee8205/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrical and Computer Engineering Ryerson University

More information

Real-Time Systems. Real-Time Systems. Verification by testing. Verification by testing

Real-Time Systems. Real-Time Systems. Verification by testing. Verification by testing EDA222/DIT161 Real-Tme Systems, Chalmers/GU, 2014/2015 Lecture #8 Real-Tme Systems Real-Tme Systems Lecture #8 Specfcaton Professor Jan Jonsson Implementaton System models Executon-tme analyss Department

More information

Compiler Design. Spring Register Allocation. Sample Exercises and Solutions. Prof. Pedro C. Diniz

Compiler Design. Spring Register Allocation. Sample Exercises and Solutions. Prof. Pedro C. Diniz Compler Desgn Sprng 2014 Regster Allocaton Sample Exercses and Solutons Prof. Pedro C. Dnz USC / Informaton Scences Insttute 4676 Admralty Way, Sute 1001 Marna del Rey, Calforna 90292 pedro@s.edu Regster

More information

Real-Time Guarantees. Traffic Characteristics. Flow Control

Real-Time Guarantees. Traffic Characteristics. Flow Control Real-Tme Guarantees Requrements on RT communcaton protocols: delay (response s) small jtter small throughput hgh error detecton at recever (and sender) small error detecton latency no thrashng under peak

More information

An Investigation into Server Parameter Selection for Hierarchical Fixed Priority Pre-emptive Systems

An Investigation into Server Parameter Selection for Hierarchical Fixed Priority Pre-emptive Systems An Investgaton nto Server Parameter Selecton for Herarchcal Fxed Prorty Pre-emptve Systems R.I. Davs and A. Burns Real-Tme Systems Research Group, Department of omputer Scence, Unversty of York, YO10 5DD,

More information

ELEC 377 Operating Systems. Week 6 Class 3

ELEC 377 Operating Systems. Week 6 Class 3 ELEC 377 Operatng Systems Week 6 Class 3 Last Class Memory Management Memory Pagng Pagng Structure ELEC 377 Operatng Systems Today Pagng Szes Vrtual Memory Concept Demand Pagng ELEC 377 Operatng Systems

More information

Burst Round Robin as a Proportional-Share Scheduling Algorithm

Burst Round Robin as a Proportional-Share Scheduling Algorithm Burst Round Robn as a Proportonal-Share Schedulng Algorthm Tarek Helmy * Abdelkader Dekdouk ** * College of Computer Scence & Engneerng, Kng Fahd Unversty of Petroleum and Mnerals, Dhahran 31261, Saud

More information

Course Introduction. Algorithm 8/31/2017. COSC 320 Advanced Data Structures and Algorithms. COSC 320 Advanced Data Structures and Algorithms

Course Introduction. Algorithm 8/31/2017. COSC 320 Advanced Data Structures and Algorithms. COSC 320 Advanced Data Structures and Algorithms Course Introducton Course Topcs Exams, abs, Proects A quc loo at a few algorthms 1 Advanced Data Structures and Algorthms Descrpton: We are gong to dscuss algorthm complexty analyss, algorthm desgn technques

More information

Nachos Project 3. Speaker: Sheng-Wei Cheng 2010/12/16

Nachos Project 3. Speaker: Sheng-Wei Cheng 2010/12/16 Nachos Project Speaker: Sheng-We Cheng //6 Agenda Motvaton User Programs n Nachos Related Nachos Code for User Programs Project Assgnment Bonus Submsson Agenda Motvaton User Programs n Nachos Related Nachos

More information

Scheduling and queue management. DigiComm II

Scheduling and queue management. DigiComm II Schedulng and queue management Tradtonal queung behavour n routers Data transfer: datagrams: ndvdual packets no recognton of flows connectonless: no sgnallng Forwardng: based on per-datagram forwardng

More information

Parallelism for Nested Loops with Non-uniform and Flow Dependences

Parallelism for Nested Loops with Non-uniform and Flow Dependences Parallelsm for Nested Loops wth Non-unform and Flow Dependences Sam-Jn Jeong Dept. of Informaton & Communcaton Engneerng, Cheonan Unversty, 5, Anseo-dong, Cheonan, Chungnam, 330-80, Korea. seong@cheonan.ac.kr

More information

The Codesign Challenge

The Codesign Challenge ECE 4530 Codesgn Challenge Fall 2007 Hardware/Software Codesgn The Codesgn Challenge Objectves In the codesgn challenge, your task s to accelerate a gven software reference mplementaton as fast as possble.

More information

Assembler. Building a Modern Computer From First Principles.

Assembler. Building a Modern Computer From First Principles. Assembler Buldng a Modern Computer From Frst Prncples www.nand2tetrs.org Elements of Computng Systems, Nsan & Schocken, MIT Press, www.nand2tetrs.org, Chapter 6: Assembler slde Where we are at: Human Thought

More information

A mathematical programming approach to the analysis, design and scheduling of offshore oilfields

A mathematical programming approach to the analysis, design and scheduling of offshore oilfields 17 th European Symposum on Computer Aded Process Engneerng ESCAPE17 V. Plesu and P.S. Agach (Edtors) 2007 Elsever B.V. All rghts reserved. 1 A mathematcal programmng approach to the analyss, desgn and

More information

VRT012 User s guide V0.1. Address: Žirmūnų g. 27, Vilnius LT-09105, Phone: (370-5) , Fax: (370-5) ,

VRT012 User s guide V0.1. Address: Žirmūnų g. 27, Vilnius LT-09105, Phone: (370-5) , Fax: (370-5) , VRT012 User s gude V0.1 Thank you for purchasng our product. We hope ths user-frendly devce wll be helpful n realsng your deas and brngng comfort to your lfe. Please take few mnutes to read ths manual

More information

Maintaining temporal validity of real-time data on non-continuously executing resources

Maintaining temporal validity of real-time data on non-continuously executing resources Mantanng temporal valdty of real-tme data on non-contnuously executng resources Tan Ba, Hong Lu and Juan Yang Hunan Insttute of Scence and Technology, College of Computer Scence, 44, Yueyang, Chna Wuhan

More information

Assignment # 2. Farrukh Jabeen Algorithms 510 Assignment #2 Due Date: June 15, 2009.

Assignment # 2. Farrukh Jabeen Algorithms 510 Assignment #2 Due Date: June 15, 2009. Farrukh Jabeen Algorthms 51 Assgnment #2 Due Date: June 15, 29. Assgnment # 2 Chapter 3 Dscrete Fourer Transforms Implement the FFT for the DFT. Descrbed n sectons 3.1 and 3.2. Delverables: 1. Concse descrpton

More information

The Greedy Method. Outline and Reading. Change Money Problem. Greedy Algorithms. Applications of the Greedy Strategy. The Greedy Method Technique

The Greedy Method. Outline and Reading. Change Money Problem. Greedy Algorithms. Applications of the Greedy Strategy. The Greedy Method Technique //00 :0 AM Outlne and Readng The Greedy Method The Greedy Method Technque (secton.) Fractonal Knapsack Problem (secton..) Task Schedulng (secton..) Mnmum Spannng Trees (secton.) Change Money Problem Greedy

More information

A Genetic Algorithm Based Dynamic Load Balancing Scheme for Heterogeneous Distributed Systems

A Genetic Algorithm Based Dynamic Load Balancing Scheme for Heterogeneous Distributed Systems Proceedngs of the Internatonal Conference on Parallel and Dstrbuted Processng Technques and Applcatons, PDPTA 2008, Las Vegas, Nevada, USA, July 14-17, 2008, 2 Volumes. CSREA Press 2008, ISBN 1-60132-084-1

More information

Cache Performance 3/28/17. Agenda. Cache Abstraction and Metrics. Direct-Mapped Cache: Placement and Access

Cache Performance 3/28/17. Agenda. Cache Abstraction and Metrics. Direct-Mapped Cache: Placement and Access Agenda Cache Performance Samra Khan March 28, 217 Revew from last lecture Cache access Assocatvty Replacement Cache Performance Cache Abstracton and Metrcs Address Tag Store (s the address n the cache?

More information

A Binarization Algorithm specialized on Document Images and Photos

A Binarization Algorithm specialized on Document Images and Photos A Bnarzaton Algorthm specalzed on Document mages and Photos Ergna Kavalleratou Dept. of nformaton and Communcaton Systems Engneerng Unversty of the Aegean kavalleratou@aegean.gr Abstract n ths paper, a

More information

Efficient Distributed File System (EDFS)

Efficient Distributed File System (EDFS) Effcent Dstrbuted Fle System (EDFS) (Sem-Centralzed) Debessay(Debsh) Fesehaye, Rahul Malk & Klara Naherstedt Unversty of Illnos-Urbana Champagn Contents Problem Statement, Related Work, EDFS Desgn Rate

More information

CS 268: Lecture 8 Router Support for Congestion Control

CS 268: Lecture 8 Router Support for Congestion Control CS 268: Lecture 8 Router Support for Congeston Control Ion Stoca Computer Scence Dvson Department of Electrcal Engneerng and Computer Scences Unversty of Calforna, Berkeley Berkeley, CA 9472-1776 Router

More information

Mixed-Criticality Scheduling on Multiprocessors using Task Grouping

Mixed-Criticality Scheduling on Multiprocessors using Task Grouping Mxed-Crtcalty Schedulng on Multprocessors usng Task Groupng Jankang Ren Lnh Th Xuan Phan School of Software Technology, Dalan Unversty of Technology, Chna Computer and Informaton Scence Department, Unversty

More information

Tolerating Transient Faults in Statically Scheduled Safety-Critical Embedded Systems

Tolerating Transient Faults in Statically Scheduled Safety-Critical Embedded Systems Toleratng Transent Faults n Statcally Scheduled Safety-Crtcal Embedded Systems Nagaraan Kandasamy *, John P. Hayes *, and Bran T. Murray ** * Department of Electrcal Engneerng ** Delph Automotve Systems

More information

CMPS 10 Introduction to Computer Science Lecture Notes

CMPS 10 Introduction to Computer Science Lecture Notes CPS 0 Introducton to Computer Scence Lecture Notes Chapter : Algorthm Desgn How should we present algorthms? Natural languages lke Englsh, Spansh, or French whch are rch n nterpretaton and meanng are not

More information

If you miss a key. Chapter 6: Demand Paging Source:

If you miss a key. Chapter 6: Demand Paging Source: ADRIAN PERRIG & TORSTEN HOEFLER ( -6- ) Networks and Operatng Systems Chapter 6: Demand Pagng Source: http://redmne.replcant.us/projects/replcant/wk/samsunggalaxybackdoor If you mss a key after yesterday

More information

IP Camera Configuration Software Instruction Manual

IP Camera Configuration Software Instruction Manual IP Camera 9483 - Confguraton Software Instructon Manual VBD 612-4 (10.14) Dear Customer, Wth your purchase of ths IP Camera, you have chosen a qualty product manufactured by RADEMACHER. Thank you for the

More information

A Generic and Compositional Framework for Multicore Response Time Analysis

A Generic and Compositional Framework for Multicore Response Time Analysis A Generc and Compostonal Framework for Multcore Response Tme Analyss Sebastan Altmeyer Unversty of Luxembourg Unversty of Amsterdam Clare Maza Grenoble INP Vermag Robert I. Davs Unversty of York INRIA,

More information

Sorting Review. Sorting. Comparison Sorting. CSE 680 Prof. Roger Crawfis. Assumptions

Sorting Review. Sorting. Comparison Sorting. CSE 680 Prof. Roger Crawfis. Assumptions Sortng Revew Introducton to Algorthms Qucksort CSE 680 Prof. Roger Crawfs Inserton Sort T(n) = Θ(n 2 ) In-place Merge Sort T(n) = Θ(n lg(n)) Not n-place Selecton Sort (from homework) T(n) = Θ(n 2 ) In-place

More information

CE 221 Data Structures and Algorithms

CE 221 Data Structures and Algorithms CE 1 ata Structures and Algorthms Chapter 4: Trees BST Text: Read Wess, 4.3 Izmr Unversty of Economcs 1 The Search Tree AT Bnary Search Trees An mportant applcaton of bnary trees s n searchng. Let us assume

More information

Brave New World Pseudocode Reference

Brave New World Pseudocode Reference Brave New World Pseudocode Reference Pseudocode s a way to descrbe how to accomplsh tasks usng basc steps lke those a computer mght perform. In ths week s lab, you'll see how a form of pseudocode can be

More information

A Free-Collision MAC Proposal for Networks

A Free-Collision MAC Proposal for Networks 12th Brazlan Workshop on Real-Tme and Embedded Systems 89 A Free-Collson MAC Proposal for 802.11 Networks Omar Alment 1,2, Gullermo Fredrch 1, Gullermo Reggan 1 1 SITIC Group Unversdad Tecnológca Naconal

More information

Wishing you all a Total Quality New Year!

Wishing you all a Total Quality New Year! Total Qualty Management and Sx Sgma Post Graduate Program 214-15 Sesson 4 Vnay Kumar Kalakband Assstant Professor Operatons & Systems Area 1 Wshng you all a Total Qualty New Year! Hope you acheve Sx sgma

More information

CHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION

CHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION 24 CHAPTER 2 PROPOSED IMPROVED PARTICLE SWARM OPTIMIZATION The present chapter proposes an IPSO approach for multprocessor task schedulng problem wth two classfcatons, namely, statc ndependent tasks and

More information

RAP. Speed/RAP/CODA. Real-time Systems. Modeling the sensor networks. Real-time Systems. Modeling the sensor networks. Real-time systems:

RAP. Speed/RAP/CODA. Real-time Systems. Modeling the sensor networks. Real-time Systems. Modeling the sensor networks. Real-time systems: Speed/RAP/CODA Presented by Octav Chpara Real-tme Systems Many wreless sensor network applcatons requre real-tme support Survellance and trackng Border patrol Fre fghtng Real-tme systems: Hard real-tme:

More information

Concurrent Apriori Data Mining Algorithms

Concurrent Apriori Data Mining Algorithms Concurrent Apror Data Mnng Algorthms Vassl Halatchev Department of Electrcal Engneerng and Computer Scence York Unversty, Toronto October 8, 2015 Outlne Why t s mportant Introducton to Assocaton Rule Mnng

More information

Load Balancing for Hex-Cell Interconnection Network

Load Balancing for Hex-Cell Interconnection Network Int. J. Communcatons, Network and System Scences,,, - Publshed Onlne Aprl n ScRes. http://www.scrp.org/journal/jcns http://dx.do.org/./jcns.. Load Balancng for Hex-Cell Interconnecton Network Saher Manaseer,

More information

Parallel matrix-vector multiplication

Parallel matrix-vector multiplication Appendx A Parallel matrx-vector multplcaton The reduced transton matrx of the three-dmensonal cage model for gel electrophoress, descrbed n secton 3.2, becomes excessvely large for polymer lengths more

More information

TN348: Openlab Module - Colocalization

TN348: Openlab Module - Colocalization TN348: Openlab Module - Colocalzaton Topc The Colocalzaton module provdes the faclty to vsualze and quantfy colocalzaton between pars of mages. The Colocalzaton wndow contans a prevew of the two mages

More information

Design and Analysis of Algorithms

Design and Analysis of Algorithms Desgn and Analyss of Algorthms Heaps and Heapsort Reference: CLRS Chapter 6 Topcs: Heaps Heapsort Prorty queue Huo Hongwe Recap and overvew The story so far... Inserton sort runnng tme of Θ(n 2 ); sorts

More information

A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform

A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform A comparson of MPCP and MSRP when sharng resources n the Janus multple-processor on a chp platform Paolo Ga, Marco D Natale, Guseppe Lpar, Scuola Superore Sant Anna, Psa, Italy {pj,marco,lpar}@sssup.t

More information

Problem Definitions and Evaluation Criteria for Computational Expensive Optimization

Problem Definitions and Evaluation Criteria for Computational Expensive Optimization Problem efntons and Evaluaton Crtera for Computatonal Expensve Optmzaton B. Lu 1, Q. Chen and Q. Zhang 3, J. J. Lang 4, P. N. Suganthan, B. Y. Qu 6 1 epartment of Computng, Glyndwr Unversty, UK Faclty

More information

S1 Note. Basis functions.

S1 Note. Basis functions. S1 Note. Bass functons. Contents Types of bass functons...1 The Fourer bass...2 B-splne bass...3 Power and type I error rates wth dfferent numbers of bass functons...4 Table S1. Smulaton results of type

More information

Problem Set 3 Solutions

Problem Set 3 Solutions Introducton to Algorthms October 4, 2002 Massachusetts Insttute of Technology 6046J/18410J Professors Erk Demane and Shaf Goldwasser Handout 14 Problem Set 3 Solutons (Exercses were not to be turned n,

More information

SLAM Summer School 2006 Practical 2: SLAM using Monocular Vision

SLAM Summer School 2006 Practical 2: SLAM using Monocular Vision SLAM Summer School 2006 Practcal 2: SLAM usng Monocular Vson Javer Cvera, Unversty of Zaragoza Andrew J. Davson, Imperal College London J.M.M Montel, Unversty of Zaragoza. josemar@unzar.es, jcvera@unzar.es,

More information

Outline. Digital Systems. C.2: Gates, Truth Tables and Logic Equations. Truth Tables. Logic Gates 9/8/2011

Outline. Digital Systems. C.2: Gates, Truth Tables and Logic Equations. Truth Tables. Logic Gates 9/8/2011 9/8/2 2 Outlne Appendx C: The Bascs of Logc Desgn TDT4255 Computer Desgn Case Study: TDT4255 Communcaton Module Lecture 2 Magnus Jahre 3 4 Dgtal Systems C.2: Gates, Truth Tables and Logc Equatons All sgnals

More information

Hierarchical clustering for gene expression data analysis

Hierarchical clustering for gene expression data analysis Herarchcal clusterng for gene expresson data analyss Gorgo Valentn e-mal: valentn@ds.unm.t Clusterng of Mcroarray Data. Clusterng of gene expresson profles (rows) => dscovery of co-regulated and functonally

More information

Chapter 1. Introduction

Chapter 1. Introduction Chapter 1 Introducton 1.1 Parallel Processng There s a contnual demand for greater computatonal speed from a computer system than s currently possble (.e. sequental systems). Areas need great computatonal

More information

6.854 Advanced Algorithms Petar Maymounkov Problem Set 11 (November 23, 2005) With: Benjamin Rossman, Oren Weimann, and Pouya Kheradpour

6.854 Advanced Algorithms Petar Maymounkov Problem Set 11 (November 23, 2005) With: Benjamin Rossman, Oren Weimann, and Pouya Kheradpour 6.854 Advanced Algorthms Petar Maymounkov Problem Set 11 (November 23, 2005) Wth: Benjamn Rossman, Oren Wemann, and Pouya Kheradpour Problem 1. We reduce vertex cover to MAX-SAT wth weghts, such that the

More information

Architectural Optimization & Design of Embedded Systems based on AADL Performance Analysis

Architectural Optimization & Design of Embedded Systems based on AADL Performance Analysis Amercan Journal of Computer Archtecture 2012, 1(2): 21-36 DOI: 10.5923/j.ajca.20120102.02 Archtectural Optmzaton & Desgn of Embedded Roberto Varona-Gómez 1,*, Eugeno Vllar 1, Ana Isabe l Rodrígue z 2,

More information

Programming in Fortran 90 : 2017/2018

Programming in Fortran 90 : 2017/2018 Programmng n Fortran 90 : 2017/2018 Programmng n Fortran 90 : 2017/2018 Exercse 1 : Evaluaton of functon dependng on nput Wrte a program who evaluate the functon f (x,y) for any two user specfed values

More information

Simulation Based Analysis of FAST TCP using OMNET++

Simulation Based Analysis of FAST TCP using OMNET++ Smulaton Based Analyss of FAST TCP usng OMNET++ Umar ul Hassan 04030038@lums.edu.pk Md Term Report CS678 Topcs n Internet Research Sprng, 2006 Introducton Internet traffc s doublng roughly every 3 months

More information

Virtual Machine Migration based on Trust Measurement of Computer Node

Virtual Machine Migration based on Trust Measurement of Computer Node Appled Mechancs and Materals Onlne: 2014-04-04 ISSN: 1662-7482, Vols. 536-537, pp 678-682 do:10.4028/www.scentfc.net/amm.536-537.678 2014 Trans Tech Publcatons, Swtzerland Vrtual Machne Mgraton based on

More information

Internet Traffic Managers

Internet Traffic Managers Internet Traffc Managers Ibrahm Matta matta@cs.bu.edu www.cs.bu.edu/faculty/matta Computer Scence Department Boston Unversty Boston, MA 225 Jont work wth members of the WING group: Azer Bestavros, John

More information

Learning the Kernel Parameters in Kernel Minimum Distance Classifier

Learning the Kernel Parameters in Kernel Minimum Distance Classifier Learnng the Kernel Parameters n Kernel Mnmum Dstance Classfer Daoqang Zhang 1,, Songcan Chen and Zh-Hua Zhou 1* 1 Natonal Laboratory for Novel Software Technology Nanjng Unversty, Nanjng 193, Chna Department

More information

Real-time Fault-tolerant Scheduling Algorithm for Distributed Computing Systems

Real-time Fault-tolerant Scheduling Algorithm for Distributed Computing Systems Real-tme Fault-tolerant Schedulng Algorthm for Dstrbuted Computng Systems Yun Lng, Y Ouyang College of Computer Scence and Informaton Engneerng Zheang Gongshang Unversty Postal code: 310018 P.R.CHINA {ylng,

More information

Adaptive Resource Allocation Control with On-Line Search for Fair QoS Level

Adaptive Resource Allocation Control with On-Line Search for Fair QoS Level Adaptve Resource Allocaton Control wth On-Lne Search for Far QoS Level Fumko Harada, Toshmtsu Usho, Graduate School of Engneerng Scence Osaka Unversty {harada@hopf, usho@}sysesosaka-uacjp Yukkazu akamoto

More information

Support Vector Machines

Support Vector Machines /9/207 MIST.6060 Busness Intellgence and Data Mnng What are Support Vector Machnes? Support Vector Machnes Support Vector Machnes (SVMs) are supervsed learnng technques that analyze data and recognze patterns.

More information

Motivation. EE 457 Unit 4. Throughput vs. Latency. Performance Depends on View Point?! Computer System Performance. An individual user wants to:

Motivation. EE 457 Unit 4. Throughput vs. Latency. Performance Depends on View Point?! Computer System Performance. An individual user wants to: 4.1 4.2 Motvaton EE 457 Unt 4 Computer System Performance An ndvdual user wants to: Mnmze sngle program executon tme A datacenter owner wants to: Maxmze number of Mnmze ( ) http://e-tellgentnternetmarketng.com/webste/frustrated-computer-user-2/

More information

Fibre-Optic AWG-based Real-Time Networks

Fibre-Optic AWG-based Real-Time Networks Fbre-Optc AWG-based Real-Tme Networks Krstna Kunert, Annette Böhm, Magnus Jonsson, School of Informaton Scence, Computer and Electrcal Engneerng, Halmstad Unversty {Magnus.Jonsson, Krstna.Kunert}@de.hh.se

More information

Technical Report. i-game: An Implicit GTS Allocation Mechanism in IEEE for Time- Sensitive Wireless Sensor Networks

Technical Report. i-game: An Implicit GTS Allocation Mechanism in IEEE for Time- Sensitive Wireless Sensor Networks www.hurray.sep.pp.pt Techncal Report -GAME: An Implct GTS Allocaton Mechansm n IEEE 802.15.4 for Tme- Senstve Wreless Sensor etworks Ans Koubaa Máro Alves Eduardo Tovar TR-060706 Verson: 1.0 Date: Jul

More information

Perfecting Preemption Threshold Scheduling for Object-Oriented Real-Time System Design: From The Perspective of Real-Time Synchronization

Perfecting Preemption Threshold Scheduling for Object-Oriented Real-Time System Design: From The Perspective of Real-Time Synchronization Perfectng Preempton Threshold Schedulng for Obect-Orented Real-Tme System Desgn: From The Perspectve of Real-Tme Synchronzaton Saehwa Km School of Electrcal Engneerng and Computer Scence Seoul Natonal

More information

WITH rapid improvements of wireless technologies,

WITH rapid improvements of wireless technologies, JOURNAL OF SYSTEMS ARCHITECTURE, SPECIAL ISSUE: HIGHLY-RELIABLE CPS, VOL. 00, NO. 0, MONTH 013 1 Adaptve GTS Allocaton n IEEE 80.15.4 for Real-Tme Wreless Sensor Networks Feng Xa, Ruonan Hao, Je L, Naxue

More information

Petri Net Based Software Dependability Engineering

Petri Net Based Software Dependability Engineering Proc. RELECTRONIC 95, Budapest, pp. 181-186; October 1995 Petr Net Based Software Dependablty Engneerng Monka Hener Brandenburg Unversty of Technology Cottbus Computer Scence Insttute Postbox 101344 D-03013

More information

Mathematics 256 a course in differential equations for engineering students

Mathematics 256 a course in differential equations for engineering students Mathematcs 56 a course n dfferental equatons for engneerng students Chapter 5. More effcent methods of numercal soluton Euler s method s qute neffcent. Because the error s essentally proportonal to the

More information

Advanced Computer Networks

Advanced Computer Networks Char of Network Archtectures and Servces Department of Informatcs Techncal Unversty of Munch Note: Durng the attendance check a stcker contanng a unque QR code wll be put on ths exam. Ths QR code contans

More information

NAG Fortran Library Chapter Introduction. G10 Smoothing in Statistics

NAG Fortran Library Chapter Introduction. G10 Smoothing in Statistics Introducton G10 NAG Fortran Lbrary Chapter Introducton G10 Smoothng n Statstcs Contents 1 Scope of the Chapter... 2 2 Background to the Problems... 2 2.1 Smoothng Methods... 2 2.2 Smoothng Splnes and Regresson

More information

Load-Balanced Anycast Routing

Load-Balanced Anycast Routing Load-Balanced Anycast Routng Chng-Yu Ln, Jung-Hua Lo, and Sy-Yen Kuo Department of Electrcal Engneerng atonal Tawan Unversty, Tape, Tawan sykuo@cc.ee.ntu.edu.tw Abstract For fault-tolerance and load-balance

More information

REAL-TIME and embedded systems are applied in many

REAL-TIME and embedded systems are applied in many 95 IEEE TRANSACTIONS ON COMPUTERS, VOL. 57, NO. 7, JULY 008 Deferrable Schedulng for Mantanng Real-Tme Data Freshness: Algorthms, Analyss, and Results Mng Xong, Member, IEEE, Song Han, Student Member,

More information

Overview. Basic Setup [9] Motivation and Tasks. Modularization 2008/2/20 IMPROVED COVERAGE CONTROL USING ONLY LOCAL INFORMATION

Overview. Basic Setup [9] Motivation and Tasks. Modularization 2008/2/20 IMPROVED COVERAGE CONTROL USING ONLY LOCAL INFORMATION Overvew 2 IMPROVED COVERAGE CONTROL USING ONLY LOCAL INFORMATION Introducton Mult- Smulator MASIM Theoretcal Work and Smulaton Results Concluson Jay Wagenpfel, Adran Trachte Motvaton and Tasks Basc Setup

More information

Subspace clustering. Clustering. Fundamental to all clustering techniques is the choice of distance measure between data points;

Subspace clustering. Clustering. Fundamental to all clustering techniques is the choice of distance measure between data points; Subspace clusterng Clusterng Fundamental to all clusterng technques s the choce of dstance measure between data ponts; D q ( ) ( ) 2 x x = x x, j k = 1 k jk Squared Eucldean dstance Assumpton: All features

More information

Memory and I/O Organization

Memory and I/O Organization Memory and I/O Organzaton 8-1 Prncple of Localty Localty small proporton of memory accounts for most run tme Rule of thumb For 9% of run tme next nstructon/data wll come from 1% of program/data closest

More information

For instance, ; the five basic number-sets are increasingly more n A B & B A A = B (1)

For instance, ; the five basic number-sets are increasingly more n A B & B A A = B (1) Secton 1.2 Subsets and the Boolean operatons on sets If every element of the set A s an element of the set B, we say that A s a subset of B, or that A s contaned n B, or that B contans A, and we wrte A

More information

Space-Optimal, Wait-Free Real-Time Synchronization

Space-Optimal, Wait-Free Real-Time Synchronization 1 Space-Optmal, Wat-Free Real-Tme Synchronzaton Hyeonjoong Cho, Bnoy Ravndran ECE Dept., Vrgna Tech Blacksburg, VA 24061, USA {hjcho,bnoy}@vt.edu E. Douglas Jensen The MITRE Corporaton Bedford, MA 01730,

More information

Lobachevsky State University of Nizhni Novgorod. Polyhedron. Quick Start Guide

Lobachevsky State University of Nizhni Novgorod. Polyhedron. Quick Start Guide Lobachevsky State Unversty of Nzhn Novgorod Polyhedron Quck Start Gude Nzhn Novgorod 2016 Contents Specfcaton of Polyhedron software... 3 Theoretcal background... 4 1. Interface of Polyhedron... 6 1.1.

More information

DLK Pro the all-rounder for mobile data downloading. Tailor-made for various requirements.

DLK Pro the all-rounder for mobile data downloading. Tailor-made for various requirements. DLK Pro the all-rounder for moble data downloadng Talor-made for varous requrements www.dtco.vdo.com Smply brllant, brllantly smple Always the rght soluton The DLK Pro s the VDO product famly, whch sets

More information

ADRIAN PERRIG & TORSTEN HOEFLER ( -6- ) Networks and Operatng Systems Chapter 6: Demand Pagng Page Table Structures Page table structures Page table structures Problem: smple lnear table s too bg Problem:

More information

Distributed Resource Scheduling in Grid Computing Using Fuzzy Approach

Distributed Resource Scheduling in Grid Computing Using Fuzzy Approach Dstrbuted Resource Schedulng n Grd Computng Usng Fuzzy Approach Shahram Amn, Mohammad Ahmad Computer Engneerng Department Islamc Azad Unversty branch Mahallat, Iran Islamc Azad Unversty branch khomen,

More information

X- Chart Using ANOM Approach

X- Chart Using ANOM Approach ISSN 1684-8403 Journal of Statstcs Volume 17, 010, pp. 3-3 Abstract X- Chart Usng ANOM Approach Gullapall Chakravarth 1 and Chaluvad Venkateswara Rao Control lmts for ndvdual measurements (X) chart are

More information

ETAtouch RESTful Webservices

ETAtouch RESTful Webservices ETAtouch RESTful Webservces Verson 1.1 November 8, 2012 Contents 1 Introducton 3 2 The resource /user/ap 6 2.1 HTTP GET................................... 6 2.2 HTTP POST..................................

More information

An Efficient Garbage Collection for Flash Memory-Based Virtual Memory Systems

An Efficient Garbage Collection for Flash Memory-Based Virtual Memory Systems S. J and D. Shn: An Effcent Garbage Collecton for Flash Memory-Based Vrtual Memory Systems 2355 An Effcent Garbage Collecton for Flash Memory-Based Vrtual Memory Systems Seunggu J and Dongkun Shn, Member,

More information

Ravenscar Computational Model compliant AADL Simulation on LEON2

Ravenscar Computational Model compliant AADL Simulation on LEON2 Ravenscar Computatonal Model complant AADL Smulaton on LEON2 Roberto VARONA-GÓMEZ, Eugeno VILLAR TEISA, GIM, Unversdad de Cantabra 39005 Santander, Span {roberto, vllar}@tesauncanes Ana-Isabel RODRÍGUEZ-RODRÍGUEZ

More information

Module Management Tool in Software Development Organizations

Module Management Tool in Software Development Organizations Journal of Computer Scence (5): 8-, 7 ISSN 59-66 7 Scence Publcatons Management Tool n Software Development Organzatons Ahmad A. Al-Rababah and Mohammad A. Al-Rababah Faculty of IT, Al-Ahlyyah Amman Unversty,

More information

A Frame Packing Mechanism Using PDO Communication Service within CANopen

A Frame Packing Mechanism Using PDO Communication Service within CANopen 28 A Frame Packng Mechansm Usng PDO Communcaton Servce wthn CANopen Mnkoo Kang and Kejn Park Dvson of Industral & Informaton Systems Engneerng, Ajou Unversty, Suwon, Gyeongg-do, South Korea Summary The

More information

Array transposition in CUDA shared memory

Array transposition in CUDA shared memory Array transposton n CUDA shared memory Mke Gles February 19, 2014 Abstract Ths short note s nspred by some code wrtten by Jeremy Appleyard for the transposton of data through shared memory. I had some

More information

CSE 326: Data Structures Quicksort Comparison Sorting Bound

CSE 326: Data Structures Quicksort Comparison Sorting Bound CSE 326: Data Structures Qucksort Comparson Sortng Bound Steve Setz Wnter 2009 Qucksort Qucksort uses a dvde and conquer strategy, but does not requre the O(N) extra space that MergeSort does. Here s the

More information

A Predictable Execution Model for COTS-based Embedded Systems

A Predictable Execution Model for COTS-based Embedded Systems 2011 17th IEEE Real-Tme and Embedded Technology and Applcatons Symposum A Predctable Executon Model for COTS-based Embedded Systems Rodolfo Pellzzon, Emlano Bett, Stanley Bak, Gang Yao, John Crswell, Marco

More information

Agenda & Reading. Simple If. Decision-Making Statements. COMPSCI 280 S1C Applications Programming. Programming Fundamentals

Agenda & Reading. Simple If. Decision-Making Statements. COMPSCI 280 S1C Applications Programming. Programming Fundamentals Agenda & Readng COMPSCI 8 SC Applcatons Programmng Programmng Fundamentals Control Flow Agenda: Decsonmakng statements: Smple If, Ifelse, nested felse, Select Case s Whle, DoWhle/Untl, For, For Each, Nested

More information

Transaction-Consistent Global Checkpoints in a Distributed Database System

Transaction-Consistent Global Checkpoints in a Distributed Database System Proceedngs of the World Congress on Engneerng 2008 Vol I Transacton-Consstent Global Checkponts n a Dstrbuted Database System Jang Wu, D. Manvannan and Bhavan Thurasngham Abstract Checkpontng and rollback

More information

Meta-heuristics for Multidimensional Knapsack Problems

Meta-heuristics for Multidimensional Knapsack Problems 2012 4th Internatonal Conference on Computer Research and Development IPCSIT vol.39 (2012) (2012) IACSIT Press, Sngapore Meta-heurstcs for Multdmensonal Knapsack Problems Zhbao Man + Computer Scence Department,

More information

A fault tree analysis strategy using binary decision diagrams

A fault tree analysis strategy using binary decision diagrams Loughborough Unversty Insttutonal Repostory A fault tree analyss strategy usng bnary decson dagrams Ths tem was submtted to Loughborough Unversty's Insttutonal Repostory by the/an author. Addtonal Informaton:

More information

An Optimal Algorithm for Prufer Codes *

An Optimal Algorithm for Prufer Codes * J. Software Engneerng & Applcatons, 2009, 2: 111-115 do:10.4236/jsea.2009.22016 Publshed Onlne July 2009 (www.scrp.org/journal/jsea) An Optmal Algorthm for Prufer Codes * Xaodong Wang 1, 2, Le Wang 3,

More information