Tiny CPU Data Path (2B) Young Won Lim 5/2/16

Transcription

1 Tiny CPU Data Path (2B)

2 Copyright (c) Young W. Lim. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled "GNU Free Documentation License". Please send corrections (or suggestions) to youngwlim@hotmail.com. This document was produced by using OpenOffice and Octave.

3 Data Path mmx mal mdo mdi Data Path (2B) 3

4 Instruction Set Architecture 8-bit 8-bit OP code M: Operand Address ADD M ADD $M ; ACC ACC + [M] STR M STR $M ; [M] ACC CLA CLA ; ACC JN M JN $M ; M if = RST RST ; Variable Length Data Path (2B) 4

5 Instruction Cycles c c2 c3 common cycles ; MEM_RD; MEM; +; Opcode_RD Operand_RD c4 c5 c6 c7 c8 ADD specific cycles ; MEM_RD MEM; + ; MEM_RD MEM; ACC ACC + ; c4 c5 c6 c7 STR specific cycles ; MEM_RD MEM; + ; ACC MEM_WR; CLA specific cycles c4 c4 ACC RST specific cycles c4 c5 c6 JN specific cycles ; MEM_RD; MEM; + If (=='') ; Data Path (2B) 5

6 Clock Cycle Counts C C2 C3 C4 C5 C6 C7 C8 Opcode_RD Opcode_RD Data_RD MEM MEM MEM ADD $M STR $M Data_WR MEM = (branch not taken) = (branch taken) CLA JN $M JN $M RST MEM_RD MEM_RD MEM_RD MEM_WR MEM MEM Data Path (2B) 6

7 Data Path (IF: S, S2, S3) Data Path (ADD: A, A2, A3, A4, A5) Data Path (STR: T, T2, T3, T4) Data Path (CLA, A) Data Path (JN, J, J2, J3) Data Path (RST, R) c c2 c3 ; MEM_RD; MEM; +; Data Path (2B) 7

8 Data Path (IF, S) wr ; MEM_RD; S RD mmx, mal Data Path (2B) 8

9 Data Path (IF, S2) MEM MEM; +; S2 OP OP +,, Data Path (2B) 9

10 Data Path (IF, S3) S3 OP OP Data Path (2B)

11 Data Path (IF: S, S2, S3) Data Path (ADD: A, A2, A3, A4, A5) Data Path (STR: T, T2, T3, T4) Data Path (CLA, A) Data Path (JN, J, J2, J3) Data Path (RST, R) c4 c5 c6 c7 c8 ; MEM_RD MEM; + ; MEM_RD MEM; ACC ACC + ; Data Path (2B)

12 Data Path (ADD, A) wr ; MEM_RD S4 RD mmx, mal Data Path (2B) 2

13 Data Path (ADD, A2) MEM MEM; + S5 M M +,, Data Path (2B) 3

14 Data Path (ADD, A3) wr ; MEM_RD S6 M RD M mal Data Path (2B) 4

15 Data Path (ADD, A4) MEM; S4 MEM [M] [M] Data Path (2B) 5

16 Data Path (ADD, A5) ACC ACC + ; S8 ACC A A+[M] [M] Data Path (2B) 6

17 Data Path (IF: S, S2, S3) Data Path (ADD: A, A2, A3, A4, A5) Data Path (STR: T, T2, T3, T4) Data Path (CLA, A) Data Path (JN, J, J2, J3) Data Path (RST, R) c4 c5 c6 c7 ; MEM_RD MEM; + ; ACC MEM_WR; Data Path (2B) 7

18 Data Path (STR, T) wr ; MEM_RD S4 RD mmx, mal Data Path (2B) 8

19 Data Path (STR, T2) MEM; + MEM S5 M M +, Data Path (2B) 9

20 Data Path (STR, T3) ; ACC ACC S6 A M A M mal, Data Path (2B) 2

21 Data Path (STR, T4) MEM_WR; S7 M wr A WR Data Path (2B) 2

22 Data Path (IF: S, S2, S3) Data Path (ADD: A, A2, A3, A4, A5) Data Path (STR: T, T2, T3, T4) Data Path (CLA, A) Data Path (JN, J, J2, J3) Data Path (RST, R) c4 ACC Data Path (2B) 22

23 Data Path (CLA, C) ACC S4 ACC A Data Path (2B) 23

24 Data Path (IF: S, S2, S3) Data Path (ADD: A, A2, A3, A4, A5) Data Path (STR: T, T2, T3, T4) Data Path (CLA, A) Data Path (JN, J, J2, J3) Data Path (RST, R) c4 c5 c6 ; MEM_RD; MEM; + If (=='') ; Data Path (2B) 24

25 Data Path (JN, J) wr ; MEM_RD; S RD mmx, mal Data Path (2B) 25

26 Data Path (JN, J2) MEM; + MEM S5 M M +, Data Path (2B) 26

27 Data Path (JN, J3) If (=='') ; S6 M M Data Path (2B) 27

28 Data Path (IF: S, S2, S3) Data Path (ADD: A, A2, A3, A4, A5) Data Path (STR: T, T2, T3, T4) Data Path (CLA, A) Data Path (JN, J, J2, J3) Data Path (RST, R) c4 Data Path (2B) 28

29 Data Path (RST, R) ; S4 Data Path (2B) 29

30 References [] [2] [3] [4] [5] [6] [7] [8] Digital Systems, Hill, Peterson, 987 [9] []