Most common example today: wireless (cell) phones
|
|
- Raymond Bryant
- 6 years ago
- Views:
Transcription
1 Virtual Memory Separate the concept of: address space (name) from physical memory address (location) Most common example today: wireless (cell) phones Phone number is your id or name Location varies as you move Map A Maintain a Map between name (phone number) and current location A Change Map to indicate new location is B B
2 Virtual Memory Location Physical Memory Name Program Addresses CPU generates an address in the program Corresponds to a word in physical memory
3 Virtual Memory Decouple program address and physical memory address Physical Memory Program Addresses MAP UNMAPPED CPU generates an address in the program Lookup Map to find physical memory address
4 Virtual Memory: Motivation. Memory size: Main memory size limited by cost Many programs too large to fit in main memory Some program addresses do not correspond to physical memory address (Historically: small amounts of DRAM. Today: -bit address space) (Historically) Application programmer used overlays to manage memory Program image stored on cheaper secondary storage (disk) Only active portions of the program image reside in memory Programmer explicitly moved required program sections into memory Problems: Ad-hoc, repetitive, non-portable, tedious, error-prone
5 Virtual Memory: Motivation. Multitasking Multiple concurrent processes sharing main memory Partition main memory among the processes Requires processes to have disjoint address spaces Collectively exceed the size of main memory today Only a fraction of concurrent processes can execute concurrently. Protection: A runaway (or malicious) task may destroy the memory of a different process Need to prevent a task from accessing address space of others. Sharing of code and data in main memory
6 Virtual Memory Physical Address CPU Virtual Address MMU Virtual Address TO Physical Address Map Main Memory MMU: Memory Management Unit Disk Home Location
7 Virtual Memory: Overview Programs (code+data) reside in a virtual address space Virtual addresses are just like memory addresses (e.g. -bit address) Programs written/compiled exactly as if physical memory addresses Program actually stored on disk CPU generates a virtual address A v for some program word Memory management unit (MMU) intercepts virtual address A v MMU translates the virtual address to a physical address: If copy of word is in main memory at address A p main memory location A p is accessed else physical location is some disk address A d word is read from disk to memory in physical address A s access word from its new physical address A s
8 Virtual Memory: Details Virtual address space: Program address space partitioned into fixed-size pages of size P = p bytes Virtual space consists of N = n pages :,,, n - Virtual address space has addresses in range,,,., n+p - Physical address space (Main memory size) is M = m+p bytes Main memory partitioned into page frames of size P = p bytes Main memory consists of m pages:,,, m - Physical memory addresses are in range,,,., M- -bit page number -bit offset 8 -bit address 9 Page Size: KB = bytes = bytes Pages Address space: x = 9 bytes 8
9 Virtual Memory: Details Virtual address A v : address of word generated by the CPU : Virtual page number (n bits) Offset: Displacement (offset) within a page (p bits) Physical address A p : Memory address of word if in main memory : Physical page frame number (m bits) Offset: Displacement (offset) within a page (p bits) If accessed word on disk it has some disk address A d m-bit page n-bit page number p-bit offset frame number p-bit offset n + p bit virtual address m + p bit physical address 9
10 Virtual Address Virtual address space size N = bytes, n+p = Page size, P = bytes, p = Virtual address space: n pages = pages Virtual address: A v n A v = = = Offset = p d d A v 8 9
11 Physical Address Main memory size M = 8 bytes, m+p = Page size, P = bytes, p = Memory space: m = page frames Physical address: A p m p d d A p A p = = = Offset =
12 Virtual to Physical Address Translation Some subset of the virtual pages are in main memory at any time Each such page is stored in some page frame The offset of a byte in a page is the same as that in the page frame A v 8 9 P Q R S A BC D Map A d A d Map A v = A p A B C D P Q R S A p =
13 Page Tables Mapping of virtual address to physical address done by a Page Table (PT) PT is a -dimensional array of page descriptors PT has one descriptor for each possible ( n entries in Page Table) Each PT entry (descriptor) contains: Control Bits: P (presence), D (dirty), U (use), Protection bits. of the page if it is currently in main memory (Indication of) disk address of page if it is not in main memory Index PDU-- Disk address xx-- A d xx-- Memory xx-- address xx-- A d Disk address Page Table Page Table stored in main memory: Base address of PT in special Page Table Register (PTR)
14 Virtual to Physical Address Translation Map A v = Protection checks when accessing page descriptor A v 8 9 P Q R S A B C D Index PDU-- xx-- xx-- xx-- xx-- A p = A d A d Page Table A p Disk address A B C D P Q R S
15 Simple Address Translation Scheme PTR n p P-- P-- d is an index into the Page Table P-- P-- d n - P-- m p Page Table
16 Simple Address Translation CPU: generates (n+p)-bit virtual address A v MMU:. Index into the Page Table using the ( n MSBs of A v ). The base address of the PT is available in the Page Table Register (PTR).. Read the page descriptor at PageTable[]. Its physical memory address is PTR + (scaled). If the presence bit (P) of the page descriptor is ON: /* Required page is currently in main memory */ Get the m-bit stored in the page descriptor Update page descriptor fields U, and W if a write access Concatenate it with the offset field of A v (p LSBs of A v ) Access main memory with the (m+p)-bit physical address Return accessed word to CPU else /* P bit OFF: requested page not in main memory*/ Handle Page Fault
17 Simple Address Translation MMU: Page Fault Handling. Make space in memory by evicting a page to disk ** (a) Select a victim page to evict from main memory LRU replacement policy (approximate LRU based on U bits) (b) Write victim page to disk if it is dirty (D is true) Use Write-back policy for updates: disk writes expensive (c) Update Page Table: victim page descriptor to reflect its transfer to disk ** In practice waiting to do the eviction at the time of fault (synchronous page replacement) is not good for performance. The Operating System maintains a pool of free pages by asynchronously flushing (evicting) the pages to disk as a background activity, whenever the free pool falls below a threshold. So steps (a) - (c) are done as backgroundactivities.. Get a free page frame from the OS.
18 MMU: Page Fault Handling Simple Address Translation. Read faulting page into free page frame (a) Read victim page from disk into freed page frame (b) Update Page Table: descriptor of faulting page updated to reflect new memory location, clear U and D bits, and set P to TRUE. (c) Restart execution of instruction causing the page fault (*) * Since servicing the page fault takes millions of cycles, the CPU does not usually wait for its completion, but begins executing some other task. At some later point in time the task is rescheduled on the CPU and this instruction is executed again. 8
19 Virtual Memory Operation: Example Address Trace:,, (data words C,P and W respectively) Accesses to both C and P are page hits: served from memory directly. Access to W (address ): =. PT[] indicates Page Fault! A v 8 9 U V W X P Q R S A B C D Index PDU-- xx-- xx-- xx-- xx-- A d A d Page Table A p Disk address A B C D P Q R S 9
20 Page Fault Handling: Example (contd ) Virtual page (word P) accessed later than page (word C) LRU policy will evict page from memory, freeing up page frame Virtual page (word W) fetched from disk into page frame A v 8 9 U V W X P Q R S A B C D Index PDU-- xx-- xx-- xx-- xx-- A d A d Page Table A p U V W X P Q R S Disk address
2-Level Page Tables. Virtual Address Space: 2 32 bytes. Offset or Displacement field in VA: 12 bits
-Level Page Tables Virtual Address (VA): bits Offset or Displacement field in VA: bits Virtual Address Space: bytes Page Size: bytes = KB Virtual Page Number field in VA: - = bits Number of Virtual Pages:
More informationEmbedded Systems Dr. Santanu Chaudhury Department of Electrical Engineering Indian Institute of Technology, Delhi
Embedded Systems Dr. Santanu Chaudhury Department of Electrical Engineering Indian Institute of Technology, Delhi Lecture - 13 Virtual memory and memory management unit In the last class, we had discussed
More informationVirtual Memory. Patterson & Hennessey Chapter 5 ELEC 5200/6200 1
Virtual Memory Patterson & Hennessey Chapter 5 ELEC 5200/6200 1 Virtual Memory Use main memory as a cache for secondary (disk) storage Managed jointly by CPU hardware and the operating system (OS) Programs
More informationMemory Management! How the hardware and OS give application pgms:" The illusion of a large contiguous address space" Protection against each other"
Memory Management! Goals of this Lecture! Help you learn about:" The memory hierarchy" Spatial and temporal locality of reference" Caching, at multiple levels" Virtual memory" and thereby " How the hardware
More informationMemory Management. Goals of this Lecture. Motivation for Memory Hierarchy
Memory Management Goals of this Lecture Help you learn about: The memory hierarchy Spatial and temporal locality of reference Caching, at multiple levels Virtual memory and thereby How the hardware and
More informationMemory Management! Goals of this Lecture!
Memory Management! Goals of this Lecture! Help you learn about:" The memory hierarchy" Why it works: locality of reference" Caching, at multiple levels" Virtual memory" and thereby " How the hardware and
More informationCSE 451: Operating Systems Winter Page Table Management, TLBs and Other Pragmatics. Gary Kimura
CSE 451: Operating Systems Winter 2013 Page Table Management, TLBs and Other Pragmatics Gary Kimura Moving now from Hardware to how the OS manages memory Two main areas to discuss Page table management,
More informationVirtual to physical address translation
Virtual to physical address translation Virtual memory with paging Page table per process Page table entry includes present bit frame number modify bit flags for protection and sharing. Page tables can
More informationLecture 21: Virtual Memory. Spring 2018 Jason Tang
Lecture 21: Virtual Memory Spring 2018 Jason Tang 1 Topics Virtual addressing Page tables Translation lookaside buffer 2 Computer Organization Computer Processor Memory Devices Control Datapath Input Output
More informationVIRTUAL MEMORY II. Jo, Heeseung
VIRTUAL MEMORY II Jo, Heeseung TODAY'S TOPICS How to reduce the size of page tables? How to reduce the time for address translation? 2 PAGE TABLES Space overhead of page tables The size of the page table
More informationThe memory of a program. Paging and Virtual Memory. Swapping. Paging. Physical to logical address mapping. Memory management: Review
The memory of a program Paging and Virtual Memory Operating Systems Spring 4 Source-code is compiled into linkable object modules Memory addresses given as relative offsets Libraries contain object modules
More informationAddress Translation. Jinkyu Jeong Computer Systems Laboratory Sungkyunkwan University
Address Translation Jinkyu Jeong (jinkyu@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Today s Topics How to reduce the size of page tables? How to reduce the time for
More informationCSE 120 Principles of Operating Systems Spring 2017
CSE 120 Principles of Operating Systems Spring 2017 Lecture 12: Paging Lecture Overview Today we ll cover more paging mechanisms: Optimizations Managing page tables (space) Efficient translations (TLBs)
More informationCSE 120. Translation Lookaside Buffer (TLB) Implemented in Hardware. July 18, Day 5 Memory. Instructor: Neil Rhodes. Software TLB Management
CSE 120 July 18, 2006 Day 5 Memory Instructor: Neil Rhodes Translation Lookaside Buffer (TLB) Implemented in Hardware Cache to map virtual page numbers to page frame Associative memory: HW looks up in
More informationVirtual Memory. Today. Segmentation Paging A good, if common example
Virtual Memory Today Segmentation Paging A good, if common example Virtual memory system Goals Transparency Programs should not know that memory is virtualized; the OS +HW multiplex memory among processes
More informationVirtual Memory. Computer Systems Principles
Virtual Memory Computer Systems Principles Objectives Virtual Memory What is it? How does it work? Virtual Memory Address Translation /7/25 CMPSCI 23 - Computer Systems Principles 2 Problem Lots of executing
More informationVirtual Memory. Virtual Memory
Virtual Memory Virtual Memory Main memory is cache for secondary storage Secondary storage (disk) holds the complete virtual address space Only a portion of the virtual address space lives in the physical
More informationCache Memories. From Bryant and O Hallaron, Computer Systems. A Programmer s Perspective. Chapter 6.
Cache Memories From Bryant and O Hallaron, Computer Systems. A Programmer s Perspective. Chapter 6. Today Cache memory organization and operation Performance impact of caches The memory mountain Rearranging
More information1. Creates the illusion of an address space much larger than the physical memory
Virtual memory Main Memory Disk I P D L1 L2 M Goals Physical address space Virtual address space 1. Creates the illusion of an address space much larger than the physical memory 2. Make provisions for
More informationAddress Translation. Tore Larsen Material developed by: Kai Li, Princeton University
Address Translation Tore Larsen Material developed by: Kai Li, Princeton University Topics Virtual memory Virtualization Protection Address translation Base and bound Segmentation Paging Translation look-ahead
More information198:231 Intro to Computer Organization. 198:231 Introduction to Computer Organization Lecture 14
98:23 Intro to Computer Organization Lecture 4 Virtual Memory 98:23 Introduction to Computer Organization Lecture 4 Instructor: Nicole Hynes nicole.hynes@rutgers.edu Credits: Several slides courtesy of
More informationCS 318 Principles of Operating Systems
CS 318 Principles of Operating Systems Fall 2018 Lecture 10: Virtual Memory II Ryan Huang Slides adapted from Geoff Voelker s lectures Administrivia Next Tuesday project hacking day No class My office
More informationCS 153 Design of Operating Systems Winter 2016
CS 153 Design of Operating Systems Winter 2016 Lecture 16: Memory Management and Paging Announcement Homework 2 is out To be posted on ilearn today Due in a week (the end of Feb 19 th ). 2 Recap: Fixed
More informationVirtual Memory. User memory model so far:! In reality they share the same memory space! Separate Instruction and Data memory!!
Virtual Memory User memory model so far:! Separate Instruction and Data memory!! In reality they share the same memory space!!! 0x00000000 User space Instruction memory 0x7fffffff Data memory MicroComuter
More informationProcesses and Virtual Memory Concepts
Processes and Virtual Memory Concepts Brad Karp UCL Computer Science CS 37 8 th February 28 (lecture notes derived from material from Phil Gibbons, Dave O Hallaron, and Randy Bryant) Today Processes Virtual
More informationVirtual Memory. Motivation:
Virtual Memory Motivation:! Each process would like to see its own, full, address space! Clearly impossible to provide full physical memory for all processes! Processes may define a large address space
More informationCS 333 Introduction to Operating Systems. Class 11 Virtual Memory (1) Jonathan Walpole Computer Science Portland State University
CS 333 Introduction to Operating Systems Class 11 Virtual Memory (1) Jonathan Walpole Computer Science Portland State University Virtual addresses Virtual memory addresses (what the process uses) Page
More informationCSE 120 Principles of Operating Systems
CSE 120 Principles of Operating Systems Spring 2018 Lecture 10: Paging Geoffrey M. Voelker Lecture Overview Today we ll cover more paging mechanisms: Optimizations Managing page tables (space) Efficient
More informationChapter 8. Virtual Memory
Operating System Chapter 8. Virtual Memory Lynn Choi School of Electrical Engineering Motivated by Memory Hierarchy Principles of Locality Speed vs. size vs. cost tradeoff Locality principle Spatial Locality:
More informationCPS104 Computer Organization and Programming Lecture 16: Virtual Memory. Robert Wagner
CPS104 Computer Organization and Programming Lecture 16: Virtual Memory Robert Wagner cps 104 VM.1 RW Fall 2000 Outline of Today s Lecture Virtual Memory. Paged virtual memory. Virtual to Physical translation:
More informationCS 153 Design of Operating Systems Winter 2016
CS 153 Design of Operating Systems Winter 2016 Lecture 17: Paging Lecture Overview Recap: Today: Goal of virtual memory management: map 2^32 byte address space to physical memory Internal fragmentation
More informationVirtual Memory: From Address Translation to Demand Paging
Constructive Computer Architecture Virtual Memory: From Address Translation to Demand Paging Arvind Computer Science & Artificial Intelligence Lab. Massachusetts Institute of Technology November 9, 2015
More informationComputer Systems. Virtual Memory. Han, Hwansoo
Computer Systems Virtual Memory Han, Hwansoo A System Using Physical Addressing CPU Physical address (PA) 4 Main memory : : 2: 3: 4: 5: 6: 7: 8:... M-: Data word Used in simple systems like embedded microcontrollers
More informationVirtual Memory. Samira Khan Apr 27, 2017
Virtual Memory Samira Khan Apr 27, 27 Virtual Memory Idea: Give the programmer the illusion of a large address space while having a small physical memory So that the programmer does not worry about managing
More information6.004 Tutorial Problems L20 Virtual Memory
6.004 Tutorial Problems L20 Virtual Memory Page Table (v + p) bits in virtual address (m + p) bits in physical address 2 v number of virtual pages 2 m number of physical pages 2 p bytes per physical page
More informationTransistor: Digital Building Blocks
Final Exam Review Transistor: Digital Building Blocks Logically, each transistor acts as a switch Combined to implement logic functions (gates) AND, OR, NOT Combined to build higher-level structures Multiplexer,
More informationVirtual Memory. CS 351: Systems Programming Michael Saelee
Virtual Memory CS 351: Systems Programming Michael Saelee registers cache (SRAM) main memory (DRAM) local hard disk drive (HDD/SSD) remote storage (networked drive / cloud) previously: SRAM
More informationPreview. Memory Management
Preview Memory Management With Mono-Process With Multi-Processes Multi-process with Fixed Partitions Modeling Multiprogramming Swapping Memory Management with Bitmaps Memory Management with Free-List Virtual
More informationECE331: Hardware Organization and Design
ECE331: Hardware Organization and Design Lecture 29: an Introduction to Virtual Memory Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Virtual memory used to protect applications
More informationMemory management. Requirements. Relocation: program loading. Terms. Relocation. Protection. Sharing. Logical organization. Physical organization
Requirements Relocation Memory management ability to change process image position Protection ability to avoid unwanted memory accesses Sharing ability to share memory portions among processes Logical
More informationVirtual Memory 1. To do. q Segmentation q Paging q A hybrid system
Virtual Memory 1 To do q Segmentation q Paging q A hybrid system Address spaces and multiple processes IBM OS/360 Split memory in n parts (possible!= sizes) A process per partition Program Code Heap Operating
More informationChapter 10: Virtual Memory. Lesson 05: Translation Lookaside Buffers
Chapter 10: Virtual Memory Lesson 05: Translation Lookaside Buffers Objective Learn that a page table entry access increases the latency for a memory reference Understand that how use of translationlookaside-buffers
More informationVirtual or Logical. Logical Addr. MMU (Memory Mgt. Unit) Physical. Addr. 1. (50 ns access)
Virtual Memory - programmer views memory as large address space without concerns about the amount of physical memory or memory management. (What do the terms 3-bit (or 6-bit) operating system or overlays
More informationOperating Systems. Paging... Memory Management 2 Overview. Lecture 6 Memory management 2. Paging (contd.)
Operating Systems Lecture 6 Memory management 2 Memory Management 2 Overview Paging (contd.) Structure of page table Shared memory Segmentation Segmentation with paging Virtual memory Just to remind you...
More informationCSE 351. Virtual Memory
CSE 351 Virtual Memory Virtual Memory Very powerful layer of indirection on top of physical memory addressing We never actually use physical addresses when writing programs Every address, pointer, etc
More informationModeling Page Replacement: Stack Algorithms. Design Issues for Paging Systems
Modeling Page Replacement: Stack Algorithms 7 4 6 5 State of memory array, M, after each item in reference string is processed CS450/550 Memory.45 Design Issues for Paging Systems Local page replacement
More informationChapter 6 Memory 11/3/2015. Chapter 6 Objectives. 6.2 Types of Memory. 6.1 Introduction
Chapter 6 Objectives Chapter 6 Memory Master the concepts of hierarchical memory organization. Understand how each level of memory contributes to system performance, and how the performance is measured.
More informationComputer Science 432/563 Operating Systems The College of Saint Rose Spring Topic Notes: Memory Hierarchy
Computer Science 432/563 Operating Systems The College of Saint Rose Spring 2016 Topic Notes: Memory Hierarchy We will revisit a topic now that cuts across systems classes: memory hierarchies. We often
More informationCMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 27, SPRING 2013
CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 27, SPRING 2013 CACHING Why: bridge speed difference between CPU and RAM Modern RAM allows blocks of memory to be read quickly Principle
More informationVirtual Memory 1. Virtual Memory
Virtual Memory 1 Virtual Memory key concepts virtual memory, physical memory, address translation, MMU, TLB, relocation, paging, segmentation, executable file, swapping, page fault, locality, page replacement
More informationVirtual Memory 1. Virtual Memory
Virtual Memory 1 Virtual Memory key concepts virtual memory, physical memory, address translation, MMU, TLB, relocation, paging, segmentation, executable file, swapping, page fault, locality, page replacement
More informationVirtual Memory 2. Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University. P & H Chapter 5.4
Virtual Memory 2 Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University P & H Chapter 5.4 Administrivia Project3 available now Design Doc due next week, Monday, April 16 th Schedule
More informationModern Virtual Memory Systems. Modern Virtual Memory Systems
6.823, L12--1 Modern Virtual Systems Asanovic Laboratory for Computer Science M.I.T. http://www.csg.lcs.mit.edu/6.823 6.823, L12--2 Modern Virtual Systems illusion of a large, private, uniform store Protection
More informationMemory. Objectives. Introduction. 6.2 Types of Memory
Memory Objectives Master the concepts of hierarchical memory organization. Understand how each level of memory contributes to system performance, and how the performance is measured. Master the concepts
More informationTopic 18: Virtual Memory
Topic 18: Virtual Memory COS / ELE 375 Computer Architecture and Organization Princeton University Fall 2015 Prof. David August 1 Virtual Memory Any time you see virtual, think using a level of indirection
More informationMemory Hierarchy. Goal: Fast, unlimited storage at a reasonable cost per bit.
Memory Hierarchy Goal: Fast, unlimited storage at a reasonable cost per bit. Recall the von Neumann bottleneck - single, relatively slow path between the CPU and main memory. Fast: When you need something
More informationCPS 104 Computer Organization and Programming Lecture 20: Virtual Memory
CPS 104 Computer Organization and Programming Lecture 20: Virtual Nov. 10, 1999 Dietolf (Dee) Ramm http://www.cs.duke.edu/~dr/cps104.html CPS 104 Lecture 20.1 Outline of Today s Lecture O Virtual. 6 Paged
More informationChapter 4: Memory Management. Part 1: Mechanisms for Managing Memory
Chapter 4: Memory Management Part 1: Mechanisms for Managing Memory Memory management Basic memory management Swapping Virtual memory Page replacement algorithms Modeling page replacement algorithms Design
More informationCS162 Operating Systems and Systems Programming Lecture 14. Caching (Finished), Demand Paging
CS162 Operating Systems and Systems Programming Lecture 14 Caching (Finished), Demand Paging October 11 th, 2017 Neeraja J. Yadwadkar http://cs162.eecs.berkeley.edu Recall: Caching Concept Cache: a repository
More informationVirtual Memory. Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. April 12, 2018 L16-1
Virtual Memory Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. L16-1 Reminder: Operating Systems Goals of OS: Protection and privacy: Processes cannot access each other s data Abstraction:
More informationCS Part III 1 Dr. Rajesh Subramanyan, Virtual Memory Technologies And Virtual Addressing
CS250 -- Part III 1 Dr. Rajesh Subramanyan, 2005 Memories Chapter 11 Virtual Memory Technologies And Virtual Addressing CS250 -- Part III 2 Dr. Rajesh Subramanyan, 2005 Topics Introduction Definition of
More informationCourse Outline. Processes CPU Scheduling Synchronization & Deadlock Memory Management File Systems & I/O Distributed Systems
Course Outline Processes CPU Scheduling Synchronization & Deadlock Memory Management File Systems & I/O Distributed Systems 1 Today: Memory Management Terminology Uniprogramming Multiprogramming Contiguous
More informationVirtual Memory 2. Today. Handling bigger address spaces Speeding translation
Virtual Memory 2 Today Handling bigger address spaces Speeding translation Considerations with page tables Two key issues with page tables Mapping must be fast Done on every memory reference, at least
More informationHY225 Lecture 12: DRAM and Virtual Memory
HY225 Lecture 12: DRAM and irtual Memory Dimitrios S. Nikolopoulos University of Crete and FORTH-ICS May 16, 2011 Dimitrios S. Nikolopoulos Lecture 12: DRAM and irtual Memory 1 / 36 DRAM Fundamentals Random-access
More informationSpring 2016 :: CSE 502 Computer Architecture. Caches. Nima Honarmand
Caches Nima Honarmand Motivation 10000 Performance 1000 100 10 Processor Memory 1 1985 1990 1995 2000 2005 2010 Want memory to appear: As fast as CPU As large as required by all of the running applications
More informationPage 1. Memory Hierarchies (Part 2)
Memory Hierarchies (Part ) Outline of Lectures on Memory Systems Memory Hierarchies Cache Memory 3 Virtual Memory 4 The future Increasing distance from the processor in access time Review: The Memory Hierarchy
More informationChapter 5 Memory Hierarchy Design. In-Cheol Park Dept. of EE, KAIST
Chapter 5 Memory Hierarchy Design In-Cheol Park Dept. of EE, KAIST Why cache? Microprocessor performance increment: 55% per year Memory performance increment: 7% per year Principles of locality Spatial
More informationCHAPTER 6 Memory. CMPS375 Class Notes (Chap06) Page 1 / 20 Dr. Kuo-pao Yang
CHAPTER 6 Memory 6.1 Memory 341 6.2 Types of Memory 341 6.3 The Memory Hierarchy 343 6.3.1 Locality of Reference 346 6.4 Cache Memory 347 6.4.1 Cache Mapping Schemes 349 6.4.2 Replacement Policies 365
More informationOutline. V Computer Systems Organization II (Honors) (Introductory Operating Systems) Advantages of Multi-level Page Tables
Outline V22.0202-001 Computer Systems Organization II (Honors) (Introductory Operating Systems) Lecture 15 Memory Management (cont d) Virtual Memory March 30, 2005 Announcements Lab 4 due next Monday (April
More informationProcesses and Tasks What comprises the state of a running program (a process or task)?
Processes and Tasks What comprises the state of a running program (a process or task)? Microprocessor Address bus Control DRAM OS code and data special caches code/data cache EAXEBP EIP DS EBXESP EFlags
More informationVirtual Memory Nov 9, 2009"
Virtual Memory Nov 9, 2009" Administrivia" 2! 3! Motivations for Virtual Memory" Motivation #1: DRAM a Cache for Disk" SRAM" DRAM" Disk" 4! Levels in Memory Hierarchy" cache! virtual memory! CPU" regs"
More informationMemory: Page Table Structure. CSSE 332 Operating Systems Rose-Hulman Institute of Technology
Memory: Page Table Structure CSSE 332 Operating Systems Rose-Hulman Institute of Technology General address transla+on CPU virtual address data cache MMU Physical address Global memory Memory management
More informationVirtual Memory Virtual memory first used to relive programmers from the burden of managing overlays.
CSE420 Virtual Memory Prof. Mokhtar Aboelaze York University Based on Slides by Prof. L. Bhuyan (UCR) Prof. M. Shaaban (RIT) Virtual Memory Virtual memory first used to relive programmers from the burden
More informationVirtual Memory. Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. November 15, MIT Fall 2018 L20-1
Virtual Memory Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. L20-1 Reminder: Operating Systems Goals of OS: Protection and privacy: Processes cannot access each other s data Abstraction:
More informationCMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 27, FALL 2012
CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 27, FALL 2012 ANNOUNCEMENTS Need student input on Lecturer Search Max Morawski Lecture 2:30pm 3:15pm, Fri 12/7, ITE 217 Meet with
More informationCSF Improving Cache Performance. [Adapted from Computer Organization and Design, Patterson & Hennessy, 2005]
CSF Improving Cache Performance [Adapted from Computer Organization and Design, Patterson & Hennessy, 2005] Review: The Memory Hierarchy Take advantage of the principle of locality to present the user
More informationregisters data 1 registers MEMORY ADDRESS on-chip cache off-chip cache main memory: real address space part of virtual addr. sp.
Cache associativity Cache and performance 12 1 CMPE110 Spring 2005 A. Di Blas 110 Spring 2005 CMPE Cache Direct-mapped cache Reads and writes Textbook Edition: 7.1 to 7.3 Second Third Edition: 7.1 to 7.3
More informationVirtual Memory 2. To do. q Handling bigger address spaces q Speeding translation
Virtual Memory 2 To do q Handling bigger address spaces q Speeding translation Considerations with page tables Two key issues with page tables Mapping must be fast Done on every memory reference, at least
More informationCS399 New Beginnings. Jonathan Walpole
CS399 New Beginnings Jonathan Walpole Memory Management Memory Management Memory a linear array of bytes - Holds O.S. and programs (processes) - Each cell (byte) is named by a unique memory address Recall,
More informationCSE 431 Computer Architecture Fall Chapter 5A: Exploiting the Memory Hierarchy, Part 1
CSE 431 Computer Architecture Fall 2008 Chapter 5A: Exploiting the Memory Hierarchy, Part 1 Mary Jane Irwin ( www.cse.psu.edu/~mji ) [Adapted from Computer Organization and Design, 4 th Edition, Patterson
More informationVirtual Memory 2. q Handling bigger address spaces q Speeding translation
Virtual Memory 2 q Handling bigger address spaces q Speeding translation Two considerations with page tables Mapping must be fast Done on every memory reference, at least 1 per instruction With large address
More informationChapter 8 & Chapter 9 Main Memory & Virtual Memory
Chapter 8 & Chapter 9 Main Memory & Virtual Memory 1. Various ways of organizing memory hardware. 2. Memory-management techniques: 1. Paging 2. Segmentation. Introduction Memory consists of a large array
More informationBasic Memory Management
Basic Memory Management CS 256/456 Dept. of Computer Science, University of Rochester 10/15/14 CSC 2/456 1 Basic Memory Management Program must be brought into memory and placed within a process for it
More informationCarnegie Mellon. Bryant and O Hallaron, Computer Systems: A Programmer s Perspective, Third Edition
Carnegie Mellon Virtual Memory: Concepts 5-23: Introduction to Computer Systems 7 th Lecture, October 24, 27 Instructor: Randy Bryant 2 Hmmm, How Does This Work?! Process Process 2 Process n Solution:
More informationVirtual Memory: From Address Translation to Demand Paging
Constructive Computer Architecture Virtual Memory: From Address Translation to Demand Paging Arvind Computer Science & Artificial Intelligence Lab. Massachusetts Institute of Technology November 12, 2014
More informationLECTURE 12. Virtual Memory
LECTURE 12 Virtual Memory VIRTUAL MEMORY Just as a cache can provide fast, easy access to recently-used code and data, main memory acts as a cache for magnetic disk. The mechanism by which this is accomplished
More informationMemory hierarchies: caches and their impact on the running time
Memory hierarchies: caches and their impact on the running time Irene Finocchi Dept. of Computer and Science Sapienza University of Rome A happy coincidence A fundamental property of hardware Different
More informationDAT (cont d) Assume a page size of 256 bytes. physical addresses. Note: Virtual address (page #) is not stored, but is used as an index into the table
Assume a page size of 256 bytes 5 Page table size (determined by size of program) 1 1 0 1 0 0200 00 420B 00 xxxxxx 1183 00 xxxxxx physical addresses Residency Bit (0 page frame is empty) Note: Virtual
More informationCS3350B Computer Architecture
CS335B Computer Architecture Winter 25 Lecture 32: Exploiting Memory Hierarchy: How? Marc Moreno Maza wwwcsduwoca/courses/cs335b [Adapted from lectures on Computer Organization and Design, Patterson &
More informationIntroduction to Virtual Memory Management
Introduction to Virtual Memory Management Minsoo Ryu Department of Computer Science and Engineering Virtual Memory Management Page X Demand Paging Page X Q & A Page X Memory Allocation Three ways of memory
More informationChapter 5B. Large and Fast: Exploiting Memory Hierarchy
Chapter 5B Large and Fast: Exploiting Memory Hierarchy One Transistor Dynamic RAM 1-T DRAM Cell word access transistor V REF TiN top electrode (V REF ) Ta 2 O 5 dielectric bit Storage capacitor (FET gate,
More informationECE232: Hardware Organization and Design
ECE232: Hardware Organization and Design Lecture 28: More Virtual Memory Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Virtual memory used to protect applications from
More informationCS 33. Architecture and Optimization (3) CS33 Intro to Computer Systems XVI 1 Copyright 2018 Thomas W. Doeppner. All rights reserved.
CS 33 Architecture and Optimization (3) CS33 Intro to Computer Systems XVI 1 Copyright 2018 Thomas W. Doeppner. All rights reserved. Hyper Threading Instruction Control Instruction Control Retirement Unit
More informationECE 7650 Scalable and Secure Internet Services and Architecture ---- A Systems Perspective. Part I: Operating system overview: Memory Management
ECE 7650 Scalable and Secure Internet Services and Architecture ---- A Systems Perspective Part I: Operating system overview: Memory Management 1 Hardware background The role of primary memory Program
More informationCAM Content Addressable Memory. For TAG look-up in a Fully-Associative Cache
CAM Content Addressable Memory For TAG look-up in a Fully-Associative Cache 1 Tagin Fully Associative Cache Tag0 Data0 Tag1 Data1 Tag15 Data15 1 Tagin CAM Data RAM Tag0 Data0 Tag1 Data1 Tag15 Data15 Tag
More informationCS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2014 Lecture 14
CS24: INTRODUCTION TO COMPUTING SYSTEMS Spring 2014 Lecture 14 LAST TIME! Examined several memory technologies: SRAM volatile memory cells built from transistors! Fast to use, larger memory cells (6+ transistors
More informationCSE 153 Design of Operating Systems
CSE 53 Design of Operating Systems Winter 28 Lecture 6: Paging/Virtual Memory () Some slides modified from originals by Dave O hallaron Today Address spaces VM as a tool for caching VM as a tool for memory
More informationCHAPTER 6 Memory. CMPS375 Class Notes Page 1/ 16 by Kuo-pao Yang
CHAPTER 6 Memory 6.1 Memory 233 6.2 Types of Memory 233 6.3 The Memory Hierarchy 235 6.3.1 Locality of Reference 237 6.4 Cache Memory 237 6.4.1 Cache Mapping Schemes 239 6.4.2 Replacement Policies 247
More informationCOS 318: Operating Systems. Virtual Memory and Address Translation
COS 318: Operating Systems Virtual Memory and Address Translation Andy Bavier Computer Science Department Princeton University http://www.cs.princeton.edu/courses/archive/fall10/cos318/ Today s Topics
More informationCS450/550 Operating Systems
CS450/550 Operating Systems Lecture 4 memory Palden Lama Department of Computer Science CS450/550 Memory.1 Review: Summary of Chapter 3 Deadlocks and its modeling Deadlock detection Deadlock recovery Deadlock
More information