Computer. Organization. Design. vishnu 1

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1 Computer Organization Design vishnu

2 Chapter. Basic Structure of Computers vishnu 2

3 Basic Structure of Computers COMPUTER TYPES FUNCTIONAL UNITS BASIC OPERATIONAL CONCEPTS BUS STRUCTURES SOFTWARE PERFORMANCE vishnu 3

4 Types of computer Type of computer Digital computer Analog computer Hybrid Computer Micro Computer Main frame Computer Super Computer Mini Computer Home PC vishnu 4

5 Analog computer Analog computer measures and answer the questions by the method of HOW MUCH. The input data is not a number infect a physical quantity like tem, pressure, speed, velocity. Signals are continuousof ( to V) Accuracy % Approximately High speed Output is continuous Time is wasted in transmission time vishnu 5

6 Analog computer vishnu 6

7 Digital Computers Digital computer counts and answer the questions by the method of HOW Many. The input data is represented by a number. These are used for the logical and arithmetic operations. Signals are two level of ( V or 5 V) Accuracy unlimited low speed sequential as well as parallel processing Output is continuous but obtain when computation is completed. vishnu 7

8 Micro Computer Micro computer are the smallestcomputer system. There size range from calculator to desktop size. Its CPU is microprocessor. It also known as Grand child Computer. Application : -personal computer, Multi user system, offices. vishnu 8

9 Mini Computer These are also small general purpose system. They are generally more powerful and most useful as compared to micro computer. Mini computer are also known as mid range computer or Child computer. Application :-Departmental systems, Network Servers, work group system. vishnu 9

10 Mini computer vishnu

11 Handheld Also called a PDA (Personal Digital Assistant). A computer that fits into a pocket, runs on batteries, and is used while holding in your hand. Typically used as an appointment book, address book, calculator, and notepad. Can be synchronized with a personal microcomputer as a backup. vishnu

12 Handheld PC(PDA) vishnu 2

13 Workstation Desktop computer which is usually more powerful than a Microcomputer. Powerful desktop computer designed for specialized tasks. A microcomputer that fits on a desk and runs on power from an electrical wall outlet. The CPU can be housed in either a vertical or horizontal case. Has separate components (keyboard, mouse, etc.) that are each plugged into the computer. vishnu 3

14 workstation vishnu 4

15 Laptop or Notebook Portable, compact computer that runs on a wall outlet or battery unit with all components in one unit. All components (keyboard, mouse, etc.) are in one compact unit. Usually more expensive than a comparable desktop. Sometimes called a notebook. vishnu 5

16 Mainframe Large powerful computer often serving many connected terminals. Large expensive computer capable of simultaneously processing data for hundreds or thousands of users. Used to store, manage, and process large amounts of data that need to be reliable, secure, and centralized. Usually housed in a closet sized cabinet. Application Host computer, Central data base server. vishnu 6

17 Server A computer that processes request for HTML and other documents that are components of Web pages. Purpose is to serve. A computer that has the purpose of supplying its users with data; usually through the use of a LAN (Local Area Network). vishnu 7

18 Super Computer Super computer are those computer which are designed for scientific joblike whether forecasting and artificial intelligence etc. They are fastest and expensive. A super computer contains a number of CPU which operate in parallel to make it faster. It also known as grand father computer. Application whether forecasting, weapons research and development. vishnu 8

19 Super computer vishnu 9

20 Functional Units vishnu 2

21 Functional Units Input Arithmetic and logic Memory Output Control I/O Processor Figure : Basic functional units of a computer. vishnu 2

22 Information Handled by a Computer Instructions/machine instructions Govern the transfer of information within a computer as well as between the computer and its I/O devices Specify the arithmetic and logic operations to be performed Program Data Used as operands by the instructions Source program Encoded in binary code and vishnu 22

23 Memory Unit Store programs and data Two classes of storage Primary storage Fast Programs must be stored in memory while they are being executed Large number of semiconductor storage cells Address RAM and memory access time Memory hierarchy cache, main memory Secondary storage larger and cheaper vishnu 23

24 Arithmetic and Logic Unit (ALU) Most computer operations are executed in ALU of the processor. Load the operands into memory bring them to the processor perform operation in ALU store the result back to memory or retain in the processor. Registers vishnu 24

25 Control Unit All computer operations are controlledby the control unit. The timing signals that govern the I/O transfers are also generated by the control unit. Control unit is usually distributedthroughout the machine instead of standing alone. Operations of a computer: Accept information in the form of programs and data through an input unit and store it in the memory Fetch the information stored in the memory, under program control, into an ALU, where the information is processed Output the processed information through an output unit Control all activities inside the machine through a control unit vishnu 25

26 Basic Operational Concepts vishnu 26

27 Basic Operational Concepts Activity in a computer is governed by instructions. To perform a task, an appropriate program consisting of a list of instructions is stored in the memory. Individual instructions are brought from the memory into the processor, which executes the specified operations. Data to be used as operands are also stored in the memory. vishnu 27

28 A Typical Instruction Add LOCA, R Add the operand at memory location LOCA to the operand in a register R in the processor. Place the sum into register R. The original contents of LOCA are preserved. The original contents of R is overwritten. Instruction is fetched from the memory into the processor the operand at LOCA is fetched and added to the contents of R the resulting sum is stored in register R. vishnu 28

29 Separate Memory Access and ALU Operation Load LOCA, R Add R, R Whose contents will be overwritten? vishnu 29

30 Connection Between the Processor and the Memory Memory MAR PC MDR R Control IR R Processor ALU R n- n general purpose registers Figure : Connections between the vishnu processor and the memory. 3

31 Registers Instruction register (IR) Program counter (PC) General-purpose register (R R n- ) Memory address register (MAR) Memory data register (MDR) vishnu 3

32 Typical Operating Steps Programs reside in the memory through input devices PC is set to point to the first instruction The contents of PC are transferred to MAR A Read signal is sent to the memory The first instruction is read out and loaded into MDR The contents of MDR are transferred to IR Decode and execute the instruction vishnu 32

33 Typical Operating Steps (Cont ) Get operands for ALU General-purpose register Memory (address to MAR Read MDR to ALU) Perform operation in ALU Store the result back To general-purpose register To memory (address to MAR, result to MDR Write) During the execution, PC is incremented to the next instruction vishnu 33

34 Operating Steps Involved for the Instruction Execution Of : ADD LOCA, R Transfer the contents of register PC to register MAR Issue a Read command to memory, and then wait until it has transferred the requested word into register MDR Transfer the instruction from MDR into IR and decode it Transfer the address LOCA from IR to MAR Issue a Read command and wait until MDR is loaded Transfer contents of MDR to the ALU Transfer contents of R to the ALU Perform addition of the two operands in the ALU and transfer result into R Transfer contents of PC to ALU Add to operand in ALU and transfer incremented address to PC vishnu 34

35 Interrupt Normal execution of programs may be preemptedif some device requires urgent servicing. The normal execution of the current program must be interrupted the device raises an interrupt signal. Interrupt-service routine Current system information backup and restore (PC, general-purpose registers, control information, specific information) vishnu 35

36 Bus Structures There are many ways to connect different parts inside a computer together. A group of lines that serves as a connecting path for several devices is called a bus. Address/data/control vishnu 36

37 Bus Structure Single-bus Input Output Memory Processor Figure : Single-bus structure. vishnu 37

38 Speed Issue Different devices have different transfer/operate speed. If the speed of bus is bounded by the slowest device connected to it, the efficiencywill be very low. How to solve this? A common approach use buffers. vishnu 38

39 Software Software Consists of instructions that control the hardware and cause the desired process to happen A Disk is considered hardware. A program ON the disk is considered software! vishnu 39

40 Applications(Application Programs) Sets of computer instructions designed to perform a particular application or task. Examples of popular application programs: Word or WordPerfect for word processing. Excel for keeping a ledger. Norton s Utilities for checking disks for damage. vishnu 4

41 Operating Systems A collection of programs that manage and control all operations and coordinate all hardware components of the computer. Some functions include: Controlling the mouse pointer. Sending data to the printer and screen. Managing files. Formatting disks. Popular Operating Systems include Windows, Unix, MacOS, VMS, Linux, OS/2. vishnu 4

42 SOFTWARE Printer Hard disk OS routines Program t t t2 t3 t4 Figure : User program and OS routines sharing the processor. t5 vishnu 42

43 Performance vishnu 43

44 Performance The most important measure of a computer is how quickly it can execute programs. Three factors affect performance: Hardware design Instruction set Compiler vishnu 44

45 Performance Processor time to execute a program depends on the hardware involved in the execution of individual machine instructions. Main memory Cache memory Processor Bus Figure : The processor cache. vishnu 45

46 Performance The processor and a relatively small cache memory can be fabricated on a single integrated circuit chip. Speed Cost Memory management vishnu 46

47 Processor Clock Clock, clock cycle, and clock rate The execution of each instruction is divided into several steps, each of which completes in one clock cycle. Hertz cycles per second vishnu 47

48 Basic Performance Equation T processor time required to execute a program that has been prepared in high-level language N number of actual machine language instructions needed to complete the execution (note: loop) S average number of basic steps needed to execute one machine instruction. Each step completes in one clock cycle R clock rate Note: these are not independent to each other T = N S R How to improve T? vishnu 48

49 Pipeline and Superscalar Operation Instructions are not necessarily executed one after another. The value of S doesn t have to be the number of clock cycles to execute one instruction. Pipelining overlapping the execution of successive instructions. Superscalar operation multiple instruction pipelines are implemented in the processor. Goal reduce S (could become <!) vishnu 49

50 Clock Rate Increase clock rate Improve the integrated-circuit (IC) technology to make the circuits faster Reduce the amount of processing done in one basic step (however, this may increase the number of basic steps needed) Increases in R that are entirely caused by improvements in IC technology affect all aspects of the processor s operation equally except the time to access the main memory. vishnu 5

51 CISC and RISC Tradeoff between N and S A key consideration is the use of pipelining S is close to even though the number of basic steps per instruction may be considerably larger It is much easier to implement efficient pipeliningin processor with simple instruction sets Reduced Instruction Set Computers (RISC) Complex Instruction Set Computers (CISC) vishnu 5

52 Compiler A compiler translates a high-levellanguage program into a sequence of machine instructions. To reduce N, we need a suitable machine instruction set and a compiler that makes good use of it. Goal reduce N S A compiler may not be designed for a specific processor; however, a high-quality compiler is usually designed for, and with, a specific processor. vishnu 52

53 Performance Measurement T is difficult to compute. Measure computer performance using benchmark programs. System Performance Evaluation Corporation (SPEC) selects and publishes representative application programs for different application domains, together with test results for many commercially available computers. Compile and run (no simulation) Reference computer SPEC rating = Running Running time time on the on the reference computer computer under test vishnu 53

54 Chapter 2. Machine Instructions and Programs vishnu 54

55 Machine Instructions and Programs NUMBERS ARITHMETIC OPERATIONS AND CHARACTERS MEMORY LOCATIONS AND ADDRESSES MEMORY OPERATIONS INSTRUCTIONS AND INSTRUCTION SEQUENCING ADDRESSING MODES vishnu 55

56 Number, Arithmetic Operations, and Characters vishnu 56

57 Humans Decimal Numbers(base ) Sign-Magnitude (-324) Decimal Fractions (23.27) Lettersfor text vishnu 57

58 Computers Binary Numbers (base 2) Two s complement and sign-magnitude Binary fractions and floating point ASCII codes for characters (A 65) Why binary? Information is stored in computer via voltage levels. vishnu 58

59 Base Decimal: Non-negatives Uses decimal digits:,,2,3,4,5,6,7,8,9 Positional System - position gives power of the base Example: 3845= 3x 3 + 8x 2 + 4x + 5x Positions: 5432 vishnu 59

60 Binary: Non-negatives Base 2 Uses binary digits(bits):, Positional system Example: = x2 3 + x2 2 + x2 + x2 vishnu 6

61 Conversions External Internal (Human) (Computer) 25 A Humans want to see and enter numbers in decimal. Computers must store and compute with bits. vishnu 6

62 Binary to Decimal Conversion Algorithm: Expand binary number using positional scheme. Perform computation using decimal arithmetic. Example: 2 x2 4 + x2 3 + x2 2 + x2 + x2 = = = 25 vishnu 62

63 Decimal to Binary Algorithm: While N do Set N to N/2 Record the remainder ( or ) end-of-loop Set A to remainders in reverse order vishnu 63

64 Decimal to binary -Example Example: Convert 324 to binary N Rem = 2 vishnu 64

65 Signed Integer 3 major representations: Assumptions: Sign and magnitude One s complement Two s complement 4-bit machine word 6 different values can be represented Roughly half are positive, half are negative vishnu 65

66 - b 3 b 2 b b B vishnu 66

67 Sign and Magnitude Representation = High order bit is sign: = positive (or zero), = negative Three low order bits is the magnitude: () thru 7 () Number range for n bits = +/-2 n- - Two representations for = vishnu 67

68 One s Complement Representation = Subtraction implemented by addition & 's complement Still two representations of! This causes some problems Some complexities in addition = vishnu 68

69 Two s Complement Representation like 's comp except shifted one position clockwise = + 4 = Only one representation for One more negative number than positive number vishnu 69

70 Binary, Signed-Integer Representations b 3 b 2 b b Sign and magnitude 's complement 2's complement B Values represented Figure : Binary, signed-integer representations. vishnu 7

71 Binary, Signed-Integer Representations b 3 b 2 b b Sign and magnitude 's complement 2's complement B Values represented Figure : Binary, signed-integer representations. vishnu 7

72 Binary, Signed-Integer Representations b 3 b 2 b b Sign and magnitude 's complement 2's complement B Values represented Figure : Binary, signed-integer representations. vishnu 72

73 Addition of 2 Single Bits vishnu 73

74 Addition From right to left, we add each pair of digits We write the sum, and add the carry to the next column on the left Sum Carry Sum Carry vishnu 74

75 Addition and Subtraction 2 s Complement 4-4 If carry-in to the high order bit = carry-out then ignore carry (-3) -7 if carry-in!= carry-out then overflow Simpler addition scheme makes twos complement the most common choice for integer number systems within digital systems vishnu 75

76 2 s-complement Add and Subtract (a) (c) (e) (f) (g) (h) (i) (j) Operations ( +2) ( +3) ( +5) (- 5) (- 2) (- 7) (- 3) (- 7) ( +2) ( + 4) ( +6) ( +3) (- 7) (- 5) (- 7) ( +) ( +2) (- 3) (b) (d) ( +4) (- 6) (- 2) ( +7) (- 3) ( +4) ( +4) (- 2) ( +3) (- 2) (- 8) ( + 5) Figure : 2's-complement Add vishnu and Subtract operations. 76

77 Overflow -Add two positive numbers to get a negative number or two negative numbers to get a positive number = = +7 vishnu 77

78 Overflow Conditions Overflow Overflow No overflow No overflow Overflow when carry-in to the high-order bit does not equal carry out vishnu 78

79 Sign Extension Task: Given w-bit signed integer x Convert it to w+k-bit integer with same value Rule: Make kcopies of sign bit: X = x w,, x w, x w, x w 2,, x k copies of MSB X w X k vishnu 79 w

80 Sign Extension Example short int x = 523; int ix = (int) x; short int y = -523; int iy = (int) y; Decimal Hex Binary x 523 3B 6D ix 523 C4 92 y -523 C4 93 iy -523 FF FF C4 93 vishnu 8

81 Representation of Character Since we are working with 's and 's only, to represent character in computer we use strings of 's and 's only. To represent character we are using some coding scheme, which is nothing but a mapping function. Some of standard coding schemes are: ASCII, EBCDIC, UNICODE. ASCII : American Standard Code for Information Interchange. It uses a 7-bit code. All together we have 28 combinations of 7 bits and we can represent 28 character. As for example 65 = represents character 'A'. EBCDIC : Extended Binary Coded Decimal Interchange Code. It uses 8-bit code and we can represent 256 character. UNICODE : It is used to capture most of the languages of the world. It uses 6-bit Unicode provides a unique number for every character, no matter what the platform, no matter what the program, no matter what the language. The Unicode Standard has been adopted by such industry leaders as Apple, HP, IBM, JustSystem, Microsoft, Oracle, SAP, Sun, Sybase, Unisys and many others. vishnu 8

82 Memory Locations, Addresses, and Operations vishnu 82

83 Memory Location, Addresses, and Operation n bits Memory consists of many millions of storagecells, each of which can store bit. Data is usually accessed in n-bit groups. nis called word length. 2 k first word second word i th word last word vishnu 83 Figure : Memory words.

84 Memory Location, Addresses, and Operation 32-bit word length example 32 bits b 3 b 3 b b Sign bit: b 3 = b 3 = for positive numbers for negative numbers (a) A signed integer 8 bits 8 bits 8 bits 8 bits ASCII character ASCII ASCII ASCII character character character vishnu 84 (b) Four characters

85 Memory Location, Addresses, and Operation To retrieve information from memory, either for one word or one byte (8-bit), addresses for each location are needed. A k-bitaddress memory has 2 k memory locations, namely 2 k -, called memory space. 24-bit memory: 2 24 = 6,777,26 = 6M (M=2 2 ) 32-bit memory: 2 32 = 4G (G=2 3 ) K(kilo)=2 T(tera)=2 4 vishnu 85

86 Memory Location, Addresses, and Operation It is impractical to assign distinct addresses to individual bit locations in the memory. The most practical assignment is to have successive addresses refer to successive byte locations in the memory byte-addressable memory. Byte locations have addresses,, 2, If word length is 32 bits, the successive words are located at addresses, 4, 8, vishnu 86

87 Big-Endian and Little-Endian Assignments Big-Endian: lower byte addresses are used for the most significant bytes of the word Little-Endian: opposite ordering. lower byte addresses are used for the less significant bytes of the word Word address Byte address Byte address k k k k k - 2 k k - 2 k k k - 4 (a) Big-endian assignment (b) Little-endian assignment vishnu 87 Figure : Byte and word addressing.

88 Memory Location, Addresses, and Operation Address ordering of bytes Word alignment Words are said to be aligned in memory if they begin at a byte addr. that is a multiple of the num of bytes in a word. 6-bit word: word addresses:, 2, 4,. 32-bit word: word addresses:, 4, 8,. 64-bit word: word addresses:, 8,6,. Access numbers, characters, and character strings vishnu 88

89 Memory Operation Load(or Read or Fetch) Copy the content. The memory content doesn t change. Address Load Registers can be used Store(or Write) Overwrite the content in memory Address and Data Store Registers can be used vishnu 89

90 Instruction and Instruction Sequencing vishnu 9

91 Types of Instructions Types of Instructions: Data transfers between the memory and the processor registers Arithmetic and logic operations on data Program sequencing and control I/O transfers vishnu 9

92 Representation of Machine Instruction 2 ways:. REGISTER TRANSFER NOTATION 2. ASSEMBLY LANGAGE NOTATION vishnu 92

93 Register Transfer Notation Identify a location by a symbolic name standing for its hardware binary address (LOC, R, ) Example: Momery locations LOC, PLACE, A,VAR2 Processor register R... R n- IO register - DATAIN, DATAOUT Contents of a location are denoted by placing square brackets around the name of the location Example: [LOC] vishnu 93

94 R [LOC] R3 [R]+[R2] vishnu 94

95 Assembly Language Notation Represent machine instructions and programs. Instruction having the format: Opcode Operand(s) or Address(es) Example: Move LOC, R Add R, R2, R3 vishnu 95

96 Basic Instruction Types Let A, B and C are variables then C=A+B In register transfer notation it can be written as: C [A]+[B] Types of Instructions: Three-Address Instructions Two-Address Instructions One-Address Instructions Zero-Address Instructions vishnu 96

97 Three-Address Instructions Example: Operation Source,Source2,Destination ADD R, R2, R3 R3 R + R2 For C=A+B ADD A, B, C What is the problem?. vishnu 97

98 Two-Address Instructions Operation Source, Destination Example: For C=A+B: ADD R, R2 R2 R + R2 ADD A, B MOV B, C What is the problem?. vishnu 98

99 One-Address Instructions Instruction can have only one memory operand Implicitly Accumulator is taken as another operand Example: ADD A AC [AC]+[A] For C=A+B LOAD A ADD B STORE C vishnu 99

100 Zero-Address Instructions Processor uses pushdown stack Example: For C=A+B PUSH A PUSH B ADD POP C ADD TOS TOS + (TOS ) vishnu

101 Summery: Basic Instruction Types Three-Address Instructions ADD R, R2, R3 R3 R + R2 Two-Address Instructions ADD R, R2 R2 R + R2 One-Address Instructions ADD M AC AC + M[AR] Zero-Address Instructions ADD TOS TOS + (TOS ) RISC Instructions Lots of registers. Memory is restricted to Load & Store Opcode Operand(s) or Address(es) vishnu

102 Instruction Execution and Straight- Line Sequencing vishnu 2

103 C=A+Bis a High Level Language statement where A, B and C are memory locations Assembly language program for C=A+B is: MOV A, R ADD B, R MOV R, C vishnu 3

104 Instruction Execution and Straight- Line Sequencing Address Contents Begin execution here i i + 4 i + 8 A Move Add Move A,R B,R R,C 3-instruction program segment Assumptions: - One memory operand per instruction - 32-bit word length - Memory is byte addressable - Full memory address can be directly specified in a single-word instruction B C Data for the program Two-phase procedure -Instruction fetch -Instruction execute vishnu 4 Figure : A program for C [Α] + [Β].

105 Branching i i + 4 Move Add NUM,R NUM2,R i + 8 Add NUM3,R i + 4n- 4 Add NUMn,R i 4n + Move R,SUM SUM NUM NUM2 NUMn vishnu 5 Figure : A straight-line program for adding n numbers.

106 Branching Program loop LOOP Move N,R Clear R Determine address of "Next" number and add "Next" number to R Decrement R Branch target Conditional branch Branch> Move LOOP R,SUM SUM N NUM n Figure : Using a loop to addnnumbers. NUM2 NUMn vishnu 6

107 Condition Codes Condition code flags Condition code register / status register N (negative) Z (zero) V (overflow) C (carry) Different instructions affect different flags vishnu 7

108 Summery: Basic Instruction Types Three-Address Instructions ADD R, R2, R3 R3 R + R2 Two-Address Instructions ADD R, R2 R2 R + R2 One-Address Instructions ADD M AC AC + M[AR] Zero-Address Instructions ADD TOS TOS + (TOS ) RISC Instructions Lots of registers. Memory is restricted to Load & Store Opcode Operand(s) or Address(es) vishnu 8

109 Conditional Branch Instructions Example: A: B: A: +( B): C = Z = S = V = vishnu 9

110 Addressing Modes vishnu

111 Register mode Operand is in the processor register Name of the register is given in the instruction Absolute/Direct mode Operand is in memory location. Address of the memory location is given in the instruction vishnu

112 Immediate Operand is given explicitly in the instruction The use of a constant in MOV #5, R,, i.e. R 5 vishnu 2

113 Indirect Address Indicate the memory location that holds the address of the memory location that holds the data AR = i.e., Operand is avialable in memory, That Memory address is avialable in either register or Memory A vishnu 3

114 Index mode the effective address of the operand is generated by adding a constant value to the contents of a register. X(R i ): EA = X + [R i ] Several variations: (R i, R j ): EA = [R i ] + [R j ] X(R i, R j ): EA = X + [R i ] + [R j ] vishnu 4

115 Indexed EA= Index Register + Relative Addr Useful with Autoincrement or Autodecrement Ri = 2 + Could be Positive or Negative (2 s Complement) Rj = A vishnu 5

116 Relative mode the effective address is determined by the Index mode using the program counterin place of the general-purpose register. X(PC) note that X is a signed number Branch> LOOP This location is computed by specifying it as an offset from the current value of PC. NOTE: Branch target may be either before or after the branch instruction, the offset is given as a singed num. vishnu 6

117 Relative Address EA= PC + Relative Addr PC = AR = Could be Positive or Negative (2 s Complement) A vishnu 7

118 Autoincrement mode the effective address of the operand is the contents of a register specified in the instruction. After accessing the operand, the contents of this register are automatically incremented to point to the next item in a list. (R i )+. The increment is for byte-sized operands, 2 for 6-bit operands, and 4 for 32-bit operands. Autodecrement mode: -(R i ) decrement first LOOP Move Move Clear Add Decrement Branch> Move N,R #NUM,R2 R (R2)+,R R LOOP R,SUM Initialization vishnu 8 Figure : The Autoincrement addressing mode used in the program

119 Addressing Modes The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes. Name Assembler syntax Addressing function Immediate #Value Op erand = Value Register Ri EA = Ri Absolute(Direct) LOC EA = LOC Indirect (Ri ) EA = [Ri ] (LOC) EA = [LOC] Index X(Ri) EA = [Ri ] + X Basewith index (Ri,Rj ) EA = [Ri ] + [Rj ] Basewith index X(Ri,Rj ) EA = [Ri ] + [Rj ] + X and offset Relative X(PC) EA = [PC] + X Autoincrement (Ri )+ EA = [Ri ] ; Increment Ri Autodecrement (Ri ) Decrement R i ; EA = [Ri] vishnu 9

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