CPU. Objectives. Introduction to Assembly Chapter 2. Topics. AVR s CPU 12/09/2017

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Corey Atkins
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Students should be able to: Objectives ntroduction to Assembly Chapter 2 he AVR microcontroller and embedded systems using assembly and c List the registers of the AVR microcontroller Draw and label

data RAM memory space in allocation in the AVR microcontroller Code in AVR assembly language Describe AVR data types and directives AssembleandrunaAVRprogramusingAVRStudio Describe the sequence of

1 Students should be able to: Objectives ntroduction to Assembly Chapter 2 he AVR microcontroller and embedded systems using assembly and c List the registers of the AVR microcontroller Draw and label a detail memory map of any AVR microcontroller Writecodetoperformsimpleoperations,suchas:ADDandloaddataand access internal RAM memory in the AVR Explain the purpose of the status register Discuss data RAM memory space in allocation in the AVR microcontroller Code in AVR assembly language Describe AVR data types and directives AssembleandrunaAVRprogramusingAVRStudio Describe the sequence of events that occur upon power-up Examine programs in AVR ROM code Detail the execution of AVR assembly language instructions Understand the RSC and Harvard architectures of the AVR microcontroller Examine the AVR s registers and data RAM using the AVR Studio simulator opics AVR s CPU AVR s CPU ts architecture Some simple programs Data Memory access Program memory RSC architecture AVR s CPU ALU 32 General Purpose registers (R0 to R31) PC register nstruction decoder ALU CPU R0 R1 R2 R15 R16 R17 PC nstruction decoder R30 R31 nstruction Register registers 1

MCU nstructions MCU nstructions Opcode Operand Opcode Operand nstruction nstruction Operation Code Meaning 0011 0001 1100 0100 0010 0110 1000 0001 1110 1010 0000 0000 0000 0101 0 1 2 3 4 5 6 7 31h

2 MCU nstructions MCU nstructions Opcode Operand Opcode Operand nstruction nstruction Operation Code Meaning h C4h 26h 81h EAh 0h 5h A [17] B A A [6] A A+B [7] A 000 A x 001 A [x] 010 A A register (x) 011 A A + x 100 A A + register (x) 101 A A x 110 Register (x H ) Register (x L ) 111 [x] A Source: Loading values into the general purpose registers (Load mmediate) Rd, k Example: ts equivalent in high level languages: Rd = k R16,53 R16 = 53 R19,132 R23,0x27 R23 = 0x27 Arithmetic calculation here are some instructions for doing Arithmetic and logic operations; such as: ADD, ADC, SUB, SBC, MUL, AND, etc. ADD Rd,Rs Rd = Rd + Rs Example: ADD R25, R9 R25 = R25 + R9 ADD R17,R30 R17 = R17 + R30 2

3 A simple program Write a program that calculates R16, 19 ;R16 = 19 R20, 95 ;R20 = 95 ADD R16, R20 ;R16 = R16 + R20 A simple program Write a program that calculates R16, 19 ;R16 = 19 R20, 95 ;R20 = 95 R21, 5 ;R21 = 5 ADD R16, R20 ;R16 = R16 + R20 ADC R16, R21 ;R16 = R16 + R21 R16, 19 ;R16 = 19 R20, 95 ;R20 = 95 ADD R16, R20 ;R16 = R16 + R20 R20, 5 ;R20 = 5 ADC R16, R20 ;R16 = R16 + R20 SUB Rd,Rs Rd = Rd Rs Example: SUB R25, R9 R25 = R25 -R9 SUB R17,R30 R17 = R17 -R30 Arithmetic calculation NC Rd Rd = Rd + 1 Example: NC R25 R25 = R DEC Rd Rd = Rd -1 Example: DEC R23 R23 = R23-1 Arithmetic calculation 3

4 Assembly Assembly What is assembly language? Assembly language is an alphanumeric representation of machine code. Below is an example of a AVR assembly code written in assembly language. Each line of the code is an instruction telling the microcontroller to carry out a task. Example Code ADD R16, R17 ; Add value in R16 to value in R17 DEC R17 ; Minus 1 from the value contained in R17 MOV R18, R16 ; Copy the value in R16 to R18 END: JMP END ; Jump to the label END Notes: he instructions used in writing programs in assembly programs are not general but specific to the microcontroller. Each company provides a set of instructions for there microcontrollers. AVR 8-bits microcontrollers have a common instruction set. Note however that not all instructions are available to all microcontrollers. he set available to each AVR microcontroller is given in its datasheet. Reference: Reference: Assembly Assembly Good Programming Practice Good Programming Practice When writing your AVR assembly programs it is a good practice to organize your code in four columns as shown in the code below. his has the benefit of your program being easier to read/debug by you and others. Column 1 (Col_1) is used for labels. Labels are basically markers use by the programmer when indicating to the microcontroller to jump to a specific location in the code. Column 2 (Col_2) is used for the microcontroller instructions. Col_1 Col_2 Col_3 Col_4 Column 3 (Col_3) is used for arguments operated on by the instruction in column 2. ADD R16, R17 ;Add value in R16 to value in R17 DEC R17 ;Minus 1 from the value contained in R17 MOV R18, R16 ;Copy the value in R16 to R18 END: JMP END ;Jump to the label END Reference: Column 4 (Col_4) is used for comments. Note here that a semicolon ";" is put in front of each comments. hat is the semi-colon indicate that the statement that follows it in the same line is a comment. Reference: 4

5 Address Name /O Mem. $00 $20 WBR $01 $21 WSR $02 $22 WAR $03 $23 WDR $04 $24 ADCL $05 $25 ADCH $06 $26 ADCSRA $07 $27 ADMUX $08 $28 ACSR $09 $29 UBRRL $0A $2A UCSRB $0B $2B UCSRA $0C $2C UDR $0D $2D SPCR $0E $2E SPSR $0F $2F SPDR $10 $30 PND $11 $31 DDRD $12 $32 PORD $13 $33 PNC $14 $34 DDRC $15 $35 PORC Address /O Mem. $16 $36 $17 $37 $18 $38 $19 $39 $1A $3A $1B $3B $1C $3C $1D $3D $1E $3E $1F $3F Name PNB DDRB PORB PNA DDRA PORA EECR EEDR EEARL EEARH UBRRC $20 $40 UBRRH $21 $41 WDCR $22 $42 ASSR $23 $43 OCR2 $24 $44 CN2 $25 $45 CCR2 $26 $46 CR1L $27 $47 CR1H $28 $48 OCR1BL $29 $49 OCR1BH Address /O Mem. $2B $4B $2C $4C $2D $4D $2E $4E $2F $4F $30 $50 $31 $51 $32 $52 $33 $53 $34 $54 $35 $55 $36 $56 $37 $57 $38 $58 $39 $59 $3A $5A $3B $5B $3C $5C $3D $5D $3E $5E Name OCR1AH CN1L CN1H CCR1B CCR1A SFOR OCDR OSCCAL CN0 CCR0 MCUCSR MCUCR WCR SPMCR FR MSK GFR GCR OCR0 SPL SPH OCR1AL $3E $5E $2A $4A SREG LDS (Load direct from data space) LDS Rd, addr ;Rd = [addr] Example: LDS R1, 0x60 Example: Write a program that copies the contents of location 0x80 of RAM into location 0x81. LDS R20, 0x80 SS 0x81, R20 ;R20 = [0x80] ;[0x81] = R20 = [0x80] SS (Store direct to data space) SS addr,rd ;[addr]=rd Example: SS 0x60,R15 ; [0x60] = R15 Example: Write a program that stores 55 into location 0x80 of RAM. R20, 55 ;R20 = 55 SS 0x80, R20 ;[0x80] = R20 = 55 5

6 Example: Add contents of location 0x90 to contents of location 0x95 and store the result in location 0x313. Example: Store 0x53 into the SPH register. he address of SPH is 0x5E LDS R20, 0x90 LDS R21, 0x95 ADD R20, R21 SS 0x313, R20 ;R20 = [0x90] ;R21 = [0x95] ;R20 = R20 + R21 ;[0x313] = R20 R20, 0x53 ;R20 = 0x53 SS 0x5E, R20 ;SPH = R20 Example: What does the following instruction do? LDS R20,2 Answer: t copies the contents of R2 into R20; as 2 is the address of R2. OU (OU to O location) Using Names of O registers OU OAddr,Rd ;[addr]=rd Example: OU 0x3F,R12 ;SREG = R12 OU 0x3E,R15 ;SPH = R15 N (N from O location) N Rd,Oaddress ;Rd = [addr] Example: N R1, 0x3F ;R1 = SREG N R17,0x3E ;R17 = SPH Example: OU SPH,R12 ;OU 0x3E,R12 N R15,SREG ;N R15,0x3F Example: Write a program that adds the contents of the PNC O register to the contents of PND and stores the result in location 0x90 of the SRAM N R20,PNC ;R20 = PNC N R21,PND ;R21 = PND ADD R20,R21 ;R20 = R20 + R21 SS 0x90,R20 ;[0x90] = R20 6

nterrupt emporary Sign N+V overflow Negative nterrupt emporary Sign N+V overflow Negative ALU R0 R1 R2 ALU R0 R1 R2 H CPU S V N Z C PC R15 R16 R17 H CPU S V N Z C PC R15 R16 R17 nstruction decoder

7 nterrupt emporary Sign N+V overflow Negative nterrupt emporary Sign N+V overflow Negative ALU R0 R1 R2 ALU R0 R1 R2 H CPU S V N Z C PC R15 R16 R17 H CPU S V N Z C PC R15 R16 R17 nstruction decoder nstruction Register R30 R31 registers nstruction decoder nstruction Register R30 R31 registers Example: Show the status of the C, H, and Z flags after the addition of 0x38 and 0x2F in the following instructions: R16, 0x38 R17, 0x2F ADD R16, R17 ;R16 = 0x38 ;R17 = 0x2F ;add R17 to R16 Example: Show the status of the C, H, and Z flags after the addition of 0x9C and 0x64 in the following instructions: R20, 0x9C R21, 0x64 ADD R20, R21 ;add R21 to R20 1 $ $2F $ R16 = 0x67 C = 0 because there is no carry beyond the D7 bit. H = 1 because there is a carry from the D3 to the D4 bit. Z = 0 because the R16 (the result) has a value other than 0 after the addition. 1 $9C $ $ R20 = 00 C = 1 because there is a carry beyond the D7 bit. H = 1 because there is a carry from the D3 to the D4 bit. Z = 1 because the R20 (the result) has a value 0 in it after the addition. 7

8 Example: Show the status of the C, H, and Z flags after the subtraction of 0x23 from 0xA5 in the following instructions: R20, 0xA5 R21, 0x23 SUB R20, R21 ;subtract R21 from R20 Example: Show the status of the C, H, and Z flags after the subtraction of 0x73 from 0x52 in the following instructions: R20, 0x52 R21, 0x73 SUB R20, R21 ;subtract R21 from R20 $A $ $ R20 = $82 C = 0 because R21 is not bigger than R20 and there is no borrow from D8 bit. Z = 0 because the R20 has a value other than 0 after the subtraction. H = 0 because there is no borrow from D4 to D3. $ $ $DF R20 = $DF C = 1 because R21 is bigger than R20 and there is a borrow from D8 bit. Z = 0 because the R20 has a value other than zero after the subtraction. H = 1 because there is a borrow from D4 to D3. Assembly Language Example: Show the status of the C, H, and Z flags after the subtraction of 0x9C from 0x9C in the following instructions: R20, 0x9C R21, 0x9C SUB R20, R21 ;subtract R21 from R20 $9C $9C $ R20 = $00 C = 0 because R21 is not bigger than R20 and there is no borrow from D8 bit. Z = 1 because the R20 is zero after the subtraction. H = 0 because there is no borrow from D4 to D3. 8

.EQU name= value Assembler Directives.EQU and.se Example:.EQU COUN = 0x25 R21, COUN ;R21 = 0x25 R22, COUN + 3 ;R22 = 0x28 Assembler Directives.NCLUDE.NCLUDE filename.ext.se name= value Example:.

9 .EQU name= value Assembler Directives.EQU and.se Example:.EQU COUN = 0x25 R21, COUN ;R21 = 0x25 R22, COUN + 3 ;R22 = 0x28 Assembler Directives.NCLUDE.NCLUDE filename.ext.se name= value Example:.SE COUN = 0x25 R21, COUN ;R21 = 0x25 R22, COUN + 3 ;R22 = 0x28.SE COUN = 0x19 R21, COUN ;R21 = 0x19 M32def.inc.equ SREG = 0x3f.equ SPL = 0x3d.equ SPH = 0x3e....equ N_VECORS_SZE = 42 Program.asm.NCLUDE M32DEF.NC R20, 10 OU SPL, R20 Assembler Directives.ORG Assembler.ORG address Assembly EDOR PROGRAM assembler myfile.asm 00 E ASSEMBLER PROGRAM Machine Language Program.asm ORG 0 R16, 0x25.ORG 0x7 R17, 0x34 R18, 0x31 assembler E E321 myfile.eep myfile.hex myfile.map myfile.lst DOWNLOAD O AVR s EEPROM DOWNLOAD O AVR s FLASH myfile.obj A

10 Flash memory and PC register Fetch and execute R16, 0x25 R17, $34 R18, 0x31 ADD R16, R17 ADD R16, R18 R17, 11 ADD R16, R17 SS SUM, R16 HERE:JMP HERE 00 E E E F F02 16-bit E01B 05 E01B 06 0F C 0A 0009 Old Architectures nstruct 4 nstruct 3 nstruct 2 nstruct 1 Fetch 00 E E E F F02 16-bit 05 E01B 06 0F C 0A AB Execute Pipelining nstruct 4 nstruct 3 nstruct 2 nstruct 1 Fetch Execute Pipelining 00 E E E F F02 16-bit 05 E01B 06 0F C 0A 0009 How to speed up the CPU ncrease the clock frequency More frequency More power consumption & more heat Limitations Change the architecture Pipelining RSC 10

11 Changing the architecture RSC vs. CSC CSC (Complex nstruction Set Computer) Put as many instruction as you can into the CPU RSC (Reduced nstruction Set Computer) Reduce the number of instructions, and use your facilities in a more proper way. RSC architecture Feature 1 RSC processors have a fixed instruction size. t makes the task of instruction decoder easier. n AVR the instructions are 2 or 4 bytes. n CSC processors instructions have different lengths E.g. in 8051 CLR C ; a 1-byte instruction ADD A, #20H ; a 2-byte instruction LJMP HERE ; a 3-byte instruction RSC architecture Feature 2: reduce the number of instructions Pros: Reduces the number of used transistors Cons: Can make the assembly programming more difficult Can lead to using more memory Feature 4: Load/Store LDS R20, 0x200 LDS R21, 0x220 ADD R20, R21 SS 0x230, R20 RSC architecture Feature 3: limit the addressing mode Advantage hardwiring Disadvantage Can make the assembly programming more difficult 11

12 RSC architecture Feature 5 (Harvard architecture): separate buses for opcodes and operands Advantage: opcodes and operands can go in and out of the CPU together. Disadvantage: leads to more cost in general purpose computers. RSC architecture Feature 6: more than 95% of instructions are executed in 1 machine cycle Code Memory Control bus Data bus CPU Control bus Data bus Data Memory Feature 7 RSC processors have at least 32 registers. Decreases the need for stack and memory usages. n AVR there are 32 general purpose registers (R0 to R31) Address bus Address bus Memory Maps Memory Maps What is a memory map? he memory map of a microcontroller is a diagram which gives the size, type and layout of the memories that are available in the microcontroller. he information use to construct the memory map is extracted from the datasheet of the microcontroller. Notes: Although the above memory map includes the EEPROM. he EEPROM is seen by some as a peripheral and may not be included as part of the map. he above memory map is basic. t could be expanded giving more details for the General Purpose and nput/output (/O) registers. he external memory option could also be included in the memory map. Each section can also be seen as a memory map in and of itself. Namely the Data Memory Map, the Program Memory Map and the EEPROM Memory Map. Source: 12

Lecture 2. Introduction to Microcontrollers

Lecture 2. Introduction to Microcontrollers Lecture 2 Introduction to Microcontrollers 1 Microcontrollers Microcontroller CPU + ++++++++++ Microprocessor CPU (on single chip) 2 What is a Microcontroller Integrated chip that typically contains integrated