AVR MICROCONTROLLER ARCHITECTURTE

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Daisy Hancock
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1 AVR MICROCONTROLLER ARCHITECTURTE

2 AVR MICROCONTROLLER AVR- Advanced Virtual RISC. The founders are Alf Egil Bogen Vegard Wollan RISC AVR architecture was conceived by two students at Norwegian Institute of Technology (NTH) and further refined and developed at Atmel Norway, the Atmel company founded by the two chip architects. AVR Micro controllers is Family of RISC Microcontrollers from Atmel. There are multiple architectures 1.RISC (Reduced Instruction Set Computer) 2. CISC (Complex Instruction Set Computer)

3 RISC MICROCONTROLLER RISC-Reduced Introduction Set Computer Till 1980 Trend was to build increasingly complex CPUs with complex set of instructions like (CISC) Instruction execute in single cycle. Architecture which reduces the chip complexity by simpler processing instructions. RISC architecture CPUs capable of executing only a very limited (simple) set of instructions.

4 RISC MICROCONTROLLER Reduced Instruction Set Computers Advantages. Fast Execution of Instructions due to simple instructions for CPU. RISC chips require fewer transistors, which makes them cheaper to design and produce. Emphasis on software. Single-clock, reduced instruction only. Register to register: LOAD" and "STORE are independent instructions. Spends more transistors on memory registers.

5 AVR MICROCONTROLLER The AVR is a Harvard architecture CPU. Harvard Architecture Computer architectures that used physically separate storage and signal pathways for their instructions and data. CPU can read both an instruction and data from memory at the same time that makes it faster. von Neumann architecture CPU can Read an instruction or data from/to the memory. Read, Write can`t occur at the same time due to same memory and signal pathway for data and instructions.

6 AVR MICROCONTROLLER Harvard Architecture diagram

7 AVR MICROCONTROLLER A series of 8-bit RISC microcontrollers from Atmel. All AVR microcontrollers share same instruction set and a basic CPU (Harvard) architecture. It has 32 8-Bit general purpose registers. Mostly instruction Execute in Single clock cycle. Which makes it faster among 8 bit microcontrollers. AVR was designed for efficient execution of compiled C code.

8 AVR MICROCONTROLLER AVR is a family of 8-bit microcontrollers with a large range of variants differing in: - size of program-memory (flash) - size of EEPROM memory - number of I/O pins - number of on-chip features such as UART and ADC Smallest microcontroller is the ATTiny11 with 1k flash ROM, no RAM and 6 I/O pins. Large such as the ATMEGA128 with 128k flash, 4KB RAM, 53 I/O pins and lots of on-chip features.

9 AVR General Features The architecture of AVR makes it possible to use the storage area for constant data as well as instructions. Instructions are 16 or 32-bits Most are 16-bits and are executed in a single clock cycle. Each instruction contains an opcode Opcodes generally are located in the initial bits of an instruction

10 AVR ARCHITECHTURE

11 AVR General Features RISC architecture with mostly fixed-length instruction, load-store memory access and 32 general-purpose registers. A two-stage instruction pipeline that speeds up execution Majority of instructions take one clock cycle Up to 16-MHz clock operation Up to 12 times performance speedup over conventional CISC controllers. Wide operating voltage from 2.7V to 6.0V Simple architecture offers a small learning curve to the uninitiated.

12 REGISTERS AVR CORE ARCHITECHTURE Two types of registers GENREL purpose & SPECIAL purpose registers GENREL purpose 32 general purpose registers having storage capacity of 8-Bits Named as R0,R1,R2 to R31. Register 0 to 15 & 16 to 31 are different. Can store both Data & Addresses. SPECIAL purpose: Three registers Program counter Stack Pointer Status Register

13 Interrupt A condition or event that interrupts the normal flow of control in a program Interrupt hardware inserts a function call between instructions to service the interrupt condition When the interrupt handler is finished, the normal program resumes execution Interrupts are generally classified as internal or external software or hardware An external interrupt is triggered by a device originating off-chip An internal interrupt is triggered by an on-chip component

14 AVR ARCHITECHTURE STATUS REGISTER (SREG) It is 8-bit long each bit has a different meaning. I T H S V N Z C I: Global Interrupt Enable/Disable Flag, SREG7 T: Transfer bit used by BLD and BST instructions, SREG6 H: Half Carry Flag, SREG5 S: For signed tests Instruction Set, SREG4 V: Two's complement overflow indicator, SREG3 N: Negative Flag, SREG2 Z: Zero Flag, SREG1 C: Carry Flag, SREG0

15 Timer/Counter The ATMega16 has three timer/counter devices on-chip Each timer/counter has a count register A clock signal can increment or decrement the counter Interrupts can be triggered by counter events External Clock Signal

16 AVR MEMORY ORGANIZATION AVR address Spaces Three address spaces Data memory Storing data to be processed Program memory Storing program and sometimes constants EEPROM memory Large permanent data storage

17 Memory: AVR MEMORY ORGANIZATION There are two separate memories Program Memory (Flask Memory) Data Memory

18 AVR MEMORY ORGANIZATION Program Memory (Flask Memory) 2K Bytes of flash memory 128 Bytes of In-System Programmable EEPROM program memory holds interrupt function addresses,16 bit and double word (32 bit) opcode, and static data tables

19 AVR MEMORY ORGANIZATION Data Memory Used for data and is separate from the program memory. 128 Bytes of SRAM Register reassigned the 32 Data Space addresses ($00 - $1F), I/O memory space contains 64 addresses for CPU peripheral functions such as control registers, Timer/Counters, A/D converters and other I/O functions. I/O memory can be accessed directly or as the Data Space locations those of the Register File, $20 - $5F. Stack is effectively allocated in the general data SRAM, and consequently the stack size is only limited by the total SRAM size and the usage of the SRAM.

20 AVR ADDRESSING MODES Register Direct, with 1 and 2 registers I/O Direct Data Direct Data Indirect with pre-decrement with post-increment Code Memory Addressing

21 Register Direct: 1 Register Examples: INC R16 CLR R22 EOR R0

22 Register Direct: 2 Registers Examples: ADD R16,R17 CP R22,R5 MOV R0, R1

23 I/O Direct Examples: IN R16,PIND OUT PORTC,R16

24 Examples: STS 0x1000,R16 Data Direct

25 Data Indirect Examples: LD R16, Y ST Z, R16

26 Data Indirect w/ Displacement Examples: LDD R16, Y+0x10 STD Z+0x20, R16

27 Data Indirect: Pre-Decrement Examples: LD R16, -Z ST -Z, R16

28 Data Indirect: Post-Increment Examples: LD R16, Z+ ST Z+, R16

29 Examples: LPM Program Memory Addressing

30 Examples: IJMP ICALL Indirect Program Addressing

31 Examples: RJMP RCALL Relative Program Addressing

32 AVR Instruction Set The types of AVR Instructions are i) Arithmetic and Logic Instructions ii) Branch and Jump Instructions iii) Data Movement Instructions iv) Bit Manipulation and Bit Test Instruction

33 AVR Instructions

34 Arithmetic and Logical Instructions Addition Subtraction Logical AND Logical OR Exclusive OR One s Complement Two s Complement Increment/Decrement Set/Clear Registers and Bits in Registers

35 Branch Instructions RJMP/RCALL Relative Jump (+/-k) IJMP/ICALL Indirect Jump (Z Reg) RET/RETI Return from call/interrupt CP* - Compare SB* - Skip if Bit in Register or I/O is set/clr BR* - Branch if condition is met

36 Bit manipulation and Bit test Instructions SBI/CBI Set / Clear Bit in register LSL/LSR Logical Shift Left / Right ROL/ROR Rotate Left / Right (thru Carry bit) ASR Arithmetic Shift Right SWAP Swap Nibbles BST/BLD Bit Store / Load BSET/BCLR Set / Clear Status Bits by number SE*/CL* - Set / Clear Status Bits by name

37 Bit manipulation and Bit test Instructions SBI/CBI Set / Clear Bit in register LSL/LSR Logical Shift Left / Right ROL/ROR Rotate Left / Right (thru Carry bit) ASR Arithmetic Shift Right SWAP Swap Nibbles BST/BLD Bit Store / Load BSET/BCLR Set / Clear Status Bits by number SE*/CL* - Set / Clear Status Bits by name

38 Other Instructions NOP Do nothing for 1 cycle SLEEP Sleep until reset or interrupted WDR Watch Dog Reset

39 Assembly language and C Programming Code using keywords that are easy to understand, use a software to convert keywords into binary instructions. Assembler Code in symbolic form, use a software to break symbolic instructions into actual instructions of uc Compiler & Linker OS

40 Development Tools The main AVR controller development tools are Code Assembler Code Simulator Evaluation Boards Emulator Device Programmer

41 Code Assembler An assembler takes a text file called the source file, with the mnemonic representation of the program (simply called the source code) and converts it into another file with the machine op-codes (simply called the machine code or object code). They Two types of Assembler used in AVR Controllers are i) AVR Family Assembler ii) IAR Assembler

42 Code Simulator A program that simulates or mimics the AVR controller is called a simulator. A simulator can execute the program code, one code at a time, displaying the result on the screen (contents of registers, ports, status, etc.),and this can help ensure that the program works as expected. The two types of Simulators used in AVR Controllers are i) AVR Simulator ii) AVR Studio

43 Evaluation Boards An evaluation board you can quickly test your programs before committing a final design board. Evaluation boards have a communication link to the PC for downloading your program to the target processor. AVR controllers can be programmed without the need for a special programmer, the downloaded program is programmed into the target controller program memory by the evaluation board and then executed. The evaluation boards can be used not only for testing your programs, but also as a simple device programmer.

44 Evaluation Boards The Popular evaluation boards used with AVR controllers are: ATMEL AVR MCU00100 Development board STK200 Board STK 300 Board

45 Cross Compiler A cross compiler is a compiler capable of creating executable code for a platform other than the one on which the compiler is running. A cross compiler is necessary to compile for multiple platforms from one machine. A platform could be infeasible for a compiler to run on, such as for the microcontroller of an embedded system because those systems contain no operating system. In paravirtualization one machine runs many operating systems, and a cross compiler could generate an executable for each of them from one main source.

46 Hardware issues in AVR The major hardware issues in AVR microcontroller are: Power source Operating Clock Sources Reset Circuit

47 Power Source The power source for running a processor system is a critical component. No system would run without a power supply. There are various options that the designer may consider, depending upon the application. Broadly, the choice would be dictated by whether the system is portable and hence must use a battery source or whether it is for a desktop application, where an AC power line could be used. Sometimes you may have access to an AC power line, but the battery operation may seem more convenient simply because it offers added portability and does not require a bulky transformer and associated rectifier, filter, and regulator components.

48 Power Source Battery Power i) Primary Batteries ii) Secondary Batteries Main Operating Supply Power from port signal lines Voltage Regulators

49 Operating Clock Source Providing a clock source to the AVR processor is another important design process Processor clock frequency determines the rate at which the programs will execute. In AVR, most instructions execute in one clock cycle, some take two clocks, and for some high-end AVR processors, a few instructions also take four or five clock cycles. The AVR processor clock can be operated with a variety of components. Some of the clock source methods are: Using a Crystal Clock IC Using a Ceramic resonator Using a quartz crystal Using a quartz clock crystal Using internal RC clock Oscillator

50 Reset Circuit CPUs require a reset pulse after the power supply has stabilized. The basic requirement is that a processor reset pulse should appear after the power supply has settled to a stable value. The processor has a power-on reset circuit as well as an external reset input circuit. The power-on reset circuit activates when the power supply voltage is below a certain threshold. After some timeout period (called power-on reset period), the processor starts executing program memory code.

51 Reset Circuit The simplest reset circuit using just a capacitor and a shunt switch for external reset. The reset pin of the AVR processor has an internal resistor of about 100- KΩ value between the reset pin and the Vcc supply voltage pin, and so any external resistor is not required. The capacitor is required to debounce the switch when it is pressed and released.

ก AVR Microcontrollers

ก AVR Microcontrollers. ก ก AVR Microcontrollers Architecture 1 Instruction Execution Timing The Parallel Instruction Fetches and Instruction Executions Single Cycle ALU Operation AVR Microcontrollers