微算機原理與實驗 Principle of Microcomputer(UEE 2301/1071 )

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1 微算機原理與實驗 (UEE 2301/1071 ) Chap 6. MCS-51 Instruction sets 宋開泰 Office:EE709 Phone: ( 校內分機 :31865) ktsong@mail.nctu.edu.tw URL: 1

2 Lab#3 5 x 7 單色點矩陣 LED(Dot Matrix) 實驗

3 原理說明單色點矩陣就像是一個增強型的 7-segment 顯示器, 藉由排列成矩陣狀的 LED 之明暗, 來顯示文字或圖形在程式撰寫時一樣是使用查表法來顯示然而一次只能控制點矩陣顯示一排, 因此可以使用顯示 4 個 7 段顯示器時同樣的技巧, 利用視覺暫留的原理使得人眼看起來像是 5 排同時在顯示

4 範例 : 欲顯示中

5 範例 :

6 範例 :

7 範例 :

8 範例 :

9 範例 :

10 DEMO 1. 請撰寫一個程式, 在點矩陣顯示器上顯示一個字或部首 2. 請撰寫一個程式, 在點矩陣顯示器上顯示一串文字跑馬燈或動畫 ( 至少有 3 個不同畫面 )

11 程式 1 流程初始化選擇其中一排讀取 TABLE 並顯示 No Delay 選擇下一排是否顯示完一個字? Yes

12 程式 2 流程初始化設定 TABLE 起始位置讀取 TABLE 並重複顯示該字 No No 是否達到重複次數? Yes 移動 TABLE 起始位置是否顯示完所有畫面? Yes

13 JMP START ORG 50H START: MOV DPTR,#TABLE RESET: MOV R0,#01H MOV R1,#00H LOOP: MOV A,R1 MOVC MOV P1,A INC R1 MOV A,R0 MOV P2,A RL A CALL DELAY MOV R0,A CJNE R0,# B,LOOP JMP RESET DELAY: MOV R2,#25 D1: MOV R3,#10 DJNZ R3,$ DJNZ R2,D1 RET TABLE: DB B DB B DB B DB B DB B DB B END 13

14 LAB #4 文字型 LCD 實驗

15 Intelligent Peripherals 1. Set its function through programming 2. Values in the registers determine operation modes 3. Flexible to use 8051 LCM LCD Module 15

16 實驗原理本次實驗使用 16 2 的文字型 LCD 顯示器目前所使用之 LCD 顯示器多半整合了控制電路以及驅動電路, 所以又可稱為 LCD 模組 (LCD Module, LCM) 因 LCM 與 8051 之執行速度有所差異, 程式當中必須加入適當的延遲, 或是透過檢查 LCM 的忙碌旗標來得知傳送下一筆指令或資料的時機

17 Busy Flag(BF) 讀取 BF( 當 RS=0,R/W=1 時 ) 指令碼 : DB7 DB6 DB0 BF=1 LCM 忙碌中, 無法接收微控器指令 BF=0 LCM 可接收資料或指令

18 LCD Module (LCM) Interface 14-pin LCD controller 1. Vss GND 2. Vdd +5V 3. Vee LCD drive supply, may be negative wrt GND 4. RS Register select 5. R/nW read/write 6. E Enable 7. DB0 Data bit 0 8. DB1 9. DB2 10. DB3 11. DB4 12. DB5 13. Db6 14. DB7 Data bit 7 18

19 Display Data RAM (DDRAM) 80 characters Display windows :16 (or 20) characters/ line x 2 lines DDRAM 40 characters x 2 lines 19

20 Character set Character Generator ROM (CGROM) 192 characters programmed 96 ASCII characters, accessed by ASCII codes 64 Japanese characters 32 Special characters Character Generator RAM (CGRAM) 8 user defined characters 20

21 LCD Controller Control operation Instructions Write to LCD module --For setting operation modes Status Read the status byte Instructions are sent to LCD controller by RS = L R/nW =L 21

22 Status Byte RS = L (control) R/nW = H (read) Bit pattern: BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 BF =1 LCD controller is busy BF =0 otherwise, Controller can accept instructions AC0 ~ AC6, 7-bit address counter AC reports the current DDRAM address if operation on DDRAM 22

23 Instruction Sets No Instruction RS R/nW D7 D6 D5 D4 D3 D2 D1 D0 Action 1 2 Clear display Cursor home X 3 Mode I/nD S 4 5 Display & cursor on/off Shift cursor or display D C B S/nC R/nL X X 23

24 Instruction Sets (continued) No Instruction RS R/nW D7 D6 D5 D4 D3 D2 D1 D0 Action Function set CG RAM address DD RAM address DL N F X X AC5 AC4 AC3 AC2 AC1 AC AC6 AC5 AC4 AC3 AC2 AC1 AC0 9 Busy flag 0 1 BF Address 10 Write data 1 0 Data 11 Read data 1 1 Data 24

25 Instructions Initialization instruction Cursor instructions Display instruction CGRAM instruction Status inquiring Example: DL N F x x x x Data Length: 8-bit Two display lines 5x7 pixels 25

26 按照各自 LCM 上所顯示的腳位接線 (1~14), 不用接 14 1

27 Demo 項目 1) 撰寫一個程式, 使得 LCM 能夠分別在第一行與第二行顯示出 Hello!! 以及自己的學號 xxxxxxx 2) 撰寫一個程式, 使 LCM 顯示出 Microcomputer is very interesting!! 1. 當第一行滿格時即換行 2. 第二行滿格時, 讓 LCM 將舊資料往左移, 新資料顯示在最右邊的位置

28 (1) 第一行填滿時換行顯示 (2) 當第二行填滿時, 再輸入!, 輸出為 (3) 再次輸入!, 輸出為

29 程式流程圖

31 結報討論如何指定文字顯示在 LCM 位置為 42H 的地方?( 寫設定的指令與說明即可 ) 當 LCM 資料已被寫滿, 又有新的資料輸入時, 應該如何設定才能讓 LCM 會將舊資料往左移, 新資料顯示在最右邊的位置? ( 寫出設定的指令與說明即可 )

32 MCS-51 指令簡介 instruction sets 共有 111 個指令 49 個 1-byte instruction 45 個 2-byte instruction 17 個 3-byte instruction 指令之種類 : 1. Data Transfer 2. Arithmetic Operation 3. Logic Operation 4. Boolean-Variable or Bit-variable operation 5. Program Branching 32

33 1. Data Transfer(1/3) MOV destination, source Ex: MOV A, R0 XCH destination, source Ex: XCH A, R0 Destination source A R0~R7 Data memory Stack DPTR A R0~R7 Data memory Program memory Immediate data stack 33

34 資料轉移指令之 Mnemonic(2/3) MOV MOVX MOVC PUSH POP XCH XCHD 例 1. XCHD if A=F3H, R1=40H A=FBH 40H RAM FBH 40H F3H 34

35 資料轉移指令之 Mnemonic(3/3) 例 2. MOV DPTR, #10F4H MOVX MOV R6, A INC DPTR MOVX MOV R7, A 10F5H 10F4H (R7)=? 34H 12H 35

36 5. Program Branching(1/6) ACALL LCALL RET RETI AJMP LJMP AJMP SJMP JMP (GENERIC Jump) (JUMP TABLES) JZ 若 (A)=0 則 Jump JNZ CJNE DJNZ NOP 36

37 5. Program Branching (2/6) MOV MOV RL (Index addressing) JMP JUMP_TABLE: AJMP CASE0 AJMP CASE1 AJMP CASE2 AJMP CASE3 DPTR, #JUMP_TABLE A, #INDEX_NUMBER Index-number is 0 ~ 3 Each entry in the jump table is a twobyte address, offset 變成 0~6 37

38 5. Program Branching (3/6) Suppose the jump table begins at code memory location 8100H Address content D E F0 A10 A9 A ) 2K Block of code memory 8000H to 87FFH 2) Case0 begins at address 80D8H 3) Case3 begins at address F 0 H AJMP A7 A0 38

39 5. Program Branching (4/6) Conditional Jump specify the destination address using relative addressing limited to a jump distance of 128~127 Bytes DJNZ (decrement and jump if not zero) loop control LOOP: MOV R7, #10 (begin loop) (end loop) DJNZ (continue) R7, LOOP 39

40 5. Program Branching (5/6) CJNE(compare and jump if not equal) SKIP: CJNE SJMP (continue) A, #03, SKIP TERMINATE In this example, there is a read into the accumulator from the serial port; the data obtained is : Control_C (03H) Jump is executed only if the two bytes are not equal. 如果是 Control_C 則 Terminate. 40

41 5. Program Branching (6/6) CJNE Actually, in execution of this instruction, if the first is less than the second, then the carry flag is set CJNE A, #20H, $+3 JNC BIG CJNE:3-byte instruction 不管何種狀況皆執行 JNC BIG 但 carry set 的話就不 jump BIG, A=20H 執行 JNC, C=0, jump to BIG A>20H, C=0, jump to BIG (PC) (PC)+3 IF (A) <> (direct) Then (PC) (PC)+relative address IF (A) < (direct) ( C ) 1 Else ( C ) 0 $: Address of the current instruction 41

42 2. Arithmetic Operation(1/11) ADD A, 7FH; Direct ADD Indirect ADD A, R7; Register ADD A, #35H; Immediate These instructions are 1 machine cycle. INC DPTR (2) MUL AB (4) DIV AB DEC ADDC add with carry SUBB subtract with borrow 42

43 2. Arithmetic Operation(2/11) Flags are effected: C, OV, AC ADD A, R C is not set OV is set ACC=63H=99 R3=23H=35 ACC=86H C AC RS1 RS0 OV -- P Unsigned number = Signed number = out of range PSW = = 05H 43

44 2. Arithmetic Operation(3/11) Unsigned addition CY=1 add the flag to another byte Signed addition -128 ~ CY=1 a carry from bit 6 OV=0 44

45 2. Arithmetic Operation(4/11) = -106 No carry from bit 7, CY=0, OV=1 A carry from bit = 120 No carry from bit 6 or 7, OV=0, CY=0 45

46 CY=1 2. Arithmetic Operation(5/11) A carry from bit = -80 OV= CY=1, no carry from bit 6 OV= = +116 OV=1 complement the sign =-12 46

47 Signed addition with OV set A general rule is that if the OV flag is set, then complement the sign. The OV flag also signals that the sum exceeds the largest positive or negative numbers thought to be needed in the program. 47

48 ADDC, add with carry The need to add the carry flag to higher order byte in signed or unsigned addition operations. ADDC A, #n ADDC A, R0 (A) (A) +(C)+(R0) 48

49 An example of adding two 16-bit integers MOV 78H, #34H MOV 79H, #12H MOV 7AH, #0EFH MOV 7BH, #12H ;Add X and Y, Place results in X MOV A, 78H ADD A, 7AH MOV 78H, A ;At this point, the carry flag is set, 78H holds 23H MOV A, 79H ADDC A, 7BH MOV 79H, A ;79H holds 25H 49

50 2. Arithmetic Operation(6/11) Subtraction( 將減數取 2 s complement 再加上被減數 ) Register A is the destination address for subtraction. The commands treat the carry flag as a borrow and always subtract the carry flag as part of the operation. It must be set to 0 if the programmer does not want the flag included in the subtraction. SUBB A, #n; Subtract immediate number n and the C flag from A, put the result in A. SUBB A, Rr SUBB A, addr SUBB 50

51 2. Arithmetic Operation(7/11) Unsigned subtraction 15 -) With a borrow C flag=1 OV=0 C flag clear = ) C flag=0 OV= =85 51

52 2. Arithmetic Operation(8/11) Signed subtraction 100 SUBB CY=1 OV= ~ -128 CY=0 before SUBB = SUBB =+55 CY=0 OV=0 52

53 2. Arithmetic Operation(9/11) SUBB =+57 CY=0 OV=1 -> -71d SUBB =-117 CY=1 OV=1 ->+11d The general rule is that if the OV flag is set to 1, then complement the sign bit. 53

54 Subtraction of two 16-bit integers MOV 78H, #34H MOV 79H, #12H MOV 7AH, #35H MOV 7BH, #11H CLR C ;Subtract Y from X, Place result in X MOV A, 78H SUBB A, 7AH MOV 78H, A ;At this point, the carry flag is set, 78H holds FFH MOV A, 79H SUBB A, 7BH MOV 79H, A ;79H holds 00H 54

55 2. Arithmetic Operation(10/11) Multiplication and Division 8-bit integer multiplication using A and B registers Unsigned MUL AB; Multiply A by B, put the low-order byte of the operation in A, put the high-order byte in B. OV is set if A x B > FFH CY=0 FFH x FFH FE01H see register B 55

56 Examples of MUL instruction ORG 8000H MOV A, #9 MOV B, #5 MUL AB ; B=0, A=2DH MOV A, #99 MOV B, #5 MUL AB ; B=1, A=EFH 56

57 2. Arithmetic Operation(11/11) DIV AB; Divide A by B, put the integer part of quotient in register A and the integer part of the remainder in B. OV flag is cleared to 0 unless B hold 00H before the DIV. Then OV is set to 1 to show division by 0. CY=0 Ex: (A) = 251 or 0FBH (B) = 18 or 12H DIV AB (A) 13 0r 0DH (B) 17 or 11H 57

58 Example of DIV instruction MOV A, #10 MOV B, #5 DIV AB ; B=0, A=2 MOV A, #99 MOV B, #5 DIV AB ; B=4, A=13H MOV A, #99 MOV B, #0 DIV AB ; OV=1 58

59 BCD addition BCD numbers Each nibble of a BCD number represents a decimal digit [ 0 9 ] Decimal numbers are represented by BCD form. 54d ( Decimal ) B ( Binary ) ( BCD ) = 64 MOV A, #23H ADD A, #41H MOV 40H, A 59

60 BCD overflow 2 3 H H 3 5 H H 1 8 H H 2 A H 7 C H 8 0 H + 6 H + 6 H + 6 H 3 0 H 8 2 H 8 6 H 60

61 DA A ORG 8000H MOV A, #12H MOV B, #29H ADD A, B ; 12H+29H=3BH not a BCD DA A ; 6 is added to the result, 3BH+6=41H, the correct result 61

62 BCD Carry MOV A, #55H MOV B, #66H ; 55H+66H=BBH not a BCD ADD A, B DA A ; 66H is added to the result ; BBH + 66H = 121H ; the accumulator holds 21 (BCD), and the carry flag is set 62

63 3. Logical Operations CLR CPL ANL AND logical ORL XRL Exclusive OR RL RLC RR RRC Rotate right with carry SWAP 63

64 3. Logical Operations(continued) ANL A, 55H ANL ANL A, R6 ANL A, #33H One machine cycle XRL P1, #0FFH Read-modify-write operation Read Port 1 8 bits Exclusive-Ored with 0FFH complement read byte The result is write back to Port 1. 64

65 ORL and ANL ORL ; or logic MOV A, #18H ; set bit 3 and 4 ORL PSW, A ; force bits 3 and 4 to high ANL ; and logic MOV A, #0E7H ; clear bit 3 and 4 ANL PSW, A ; force bits 3 and 4 to low 65

66 Rotate Instructions Rotate Instruction (on Accumulator) power of 2, 乘 2 或除 2, bit 0 is first cleared MOV A, #80H RR A ; 40H MOV A, #12H RL A ; 24H 66

67 Rotate with carry C carry flag C MOV A, #54H SETB C RLC ; C=0 ; A=A9H MOV A, #21 SETB C RRC A ; C=1, ; A=90H 67

68 RL and RLC 1. A = 0C5H RL A C5H BH (An+1) (An), n=0~6 (A0) (A 7 ) = = = 4 2. RLC A; A=0C5H,CY=0 A= , CY=1 (An+1) (An) (A0) ( C ) ( C ) (A7) n=0~6 68

69 RR and RRC 3. RR A A= =E2H 4. RRC A, CY=0 A= =62H, CY=1 RRC A C A A=80H 69

70 Unsigned divide - by - 2 Unsigned divide - by - 2 CLR RRC C A C 0 70

71 Multiply the content of A by 2 CLR RLC C A C 71

72 Signed DIVIDE-BY-2 C JB ACC.7 SET_CY CLR C SJMP ROTATE SET_CY : SETB C ROTATE : RRC A 72

73 Divide by 2: Examples C 例 (= 80H = ) C RRC (= C0H = ) (7EH = ) (3FH = ) (= 1FH = ) (= 00F = ) 73

74 INC ORG 8000H MOV 70H, #67H MOV 71H, #45H MOV 72H, #23H MOV 73H, #01H ;X= H MOV 78H, #0EFH MOV 79H, #0CDH MOV 7AH, #0ABH MOV 7BH, #089H ;Y=89ABCDEFH MOV R3, #4 74

75 MOV R0, #70H MOV R1, #78H INC CLR C LOOP: MOV ADDC A INC R0 INC R1 DJNZ R3, LOOP LJMP 0 75

76 4. Boolean Variable Operation Single bit operation CLR ORL JNB SETB MOV JBC CPL ANL JC JNC JB Bit address 00H ~ 7FH (128 locations) 80H ~ FFH (SFR) SETB P1.7 (97h) CLR P1.7 MOV C, FLAG MOV P1.0, C Any addressable bit of SFR or 128 locations at byte address 20H-2FH 其中一個必須是 C 76

77 Bit addressing Bit addressing to alter a single bit of a byte Internal RAM bit addresses 20H 21H 22H 23H 24H 25H 00 ~ 07H 08 ~ 0FH 10 ~ 17H 18 ~ 1FH 20 ~ 27H 28 ~ 2FH 77

78 Bit addressing of Internal RAM(Cont.) 26H 27H 28H 29H 2AH 2BH 2CH 2DH 2EH 2FH 30 ~ 37H 38 ~ 3FH 40 ~ 47H 48 ~ 4FH 50 ~ 57H 58 ~ 5FH 60 ~ 67H 68 ~ 6FH 70 ~ 77H 78 ~ 7FH 78

79 Bit Direct Addressing Mode 1. SETB 10H ; bit 0 of the internal RAM ; at location 22H ; 2 Bytes machine codes 2. SETB TRO ; set bit 4 of the TCON register TCON 7 0 TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 79

80 Bit Direct Addressing Mode 3. CLR PSW.7 ; clear the bit 7 (carry flag) of the program status word 4. JNB P1.3, not equal ; if bit 3 of port 1 is not equal to 1 80

81 SFR Bit Addresses SFR DIRECT Address Bit Addresses A 0E0 0E0-0E7 B 0F0 0F0-0F7 IE 0A8 0A8-0AF IP 0B8 0B8-0BF P P P2 0A0 0A0-0A7 P3 0B0 0B0-0B7 PSW 0D0 0D0-0D7 TCON F SCON F 81

82 Single-bit Operation -Instructions ANL C, b ANL C, /bit ; (C) (C) AND NOT (bit) ORL C, b ORL C, /b CPL C CPL b CLR C CLR b MOV C, b MOV b, C 82

83 Single-bit Operation -Examples SETB C ; 1 Byte SETB bit ; 2 Bytes SETB C ; (C) = 1 MOV 40H, C ; (bit 40H) = 1 ANL C, 40H ; (C) = 1 SETB C ; (C) = 1 MOV 41H, C ; (bit 41H) = 1 ANL C, /41H ; (C) = 0, (bit 41H) = 1 83

84 4. Boolean Variable Operation (continued) The carry bit in PSW is used as the single-bit accumulator of the Boolean processor. C 1) Carry Flag : CY, 0D7H bit address CLR C ;1-byte instruction CLR CY ;2-byte instruction 2) Bit_testing Bit testing, (relative addressing) Jump if the addressed bit is set JC JB JBC; Direct address of the specified Bit(CY) jump if bit set then clear bit. 84

85 4. Boolean Variable Operation (continued) Jump if the addressed bit is not set JNC JNB LOOP: MOV A, #10H MOV R0, A ADDA: ADD A, R0 JNC ADDA (continue) MOV A, #10H ADDR: ADD A, R0 JNB 0D7H, ADDR JBC 0D7H, LOOP 85

86 5. Directives Directive, 虛擬指令課本 7.5 p.164 ORG 50H MOV A, R0 設定下一個指令之位址 EQU REG 設定常數值 MAX EQU 50H MOV 設定位址常數 DATA REG A, #MAX 20H MOV DATA, #12 MOV 20H, #12 86

87 5. Directives(continued) DB define Byte ORG DB 50H 12H, 13H, 14H 50H 51H 12H 13H 52H 14H DW define Word ORG 50H 50H 12H DS DW 1234H define storage 保留記憶體位址 ORG 50H 51H 52H 34H DS 5 87

88 5. Directives(continued) DBIT JMP END CALL MACRO ENDM INCLUDE PUBLIC EXTERN define bit last statement in the source file DELAY MACRO INCLUDE DELAY.ASM 定義公用標記提供 linker 使用 PUBLIC DELAY, INCHAR, 定義外部公用標記 88

89 5. Directives(continued) LOCAL 在巨集中宣告區域變數 DELAY MACRO LOCAL REPET REPET: MOV R2, #1 DJNZ R2, REPET ENDM 89

Microprocessors 1. The 8051 Instruction Set. Microprocessors 1 1. Msc. Ivan A. Escobar Broitman

Microprocessors 1. The 8051 Instruction Set. Microprocessors 1 1. Msc. Ivan A. Escobar Broitman Microprocessors 1 The 8051 Instruction Set Microprocessors 1 1 Instruction Groups The 8051 has 255 instructions Every 8-bit opcode from 00 to FF is used except for A5. The instructions are grouped into