Timing System Development for ELI Beamlines
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1 Timing System Development for ELI Beamlines Tomáš Mazanec, Jack Naylon, Martin Horáček, Bedřich Himmel, Marc-André Drouin, Karel Kasl, Jakub Horáček, Pavel Škoda, Pavel Bakule and Bedřich Rus Institute of Physics ASCR, v.v.i., Prague, Czech Republic
2 Extreme Light Infrastructure (ELI) Laser Beamlines of ELI-BL ELI-BL / ELI-NP / ELI-ALPS ELI-BeamLines 4 Laser beamlines 6 Experimental halls Offices, labs and workshops for ~300 staff ELI-BL Lasers Up to ~10PW peak Down to ~20fs pulses Up to 1kHz rep. rate
3 Timing and Frequency Synchronization of Laser Beamlines Scheme of Timing and Frequency Synchronization [1] RF clock for locking & tuning fs-laser sources Electronics and ETS (EVGs) Electronic Timing System (built w/ MRF HW) for triggers and absolute time sub-ns triggers for laser pulse picking and gating ps triggers for laser pulse-shaping and sub-ps stabilization Absolute time distribution PTP master disciplined by ETS Uniqueness of ELI-BL for users is synchronous operation of all output laser beams (~7) The 1st milestone is ~usecs (post 2018) Ultimate goal is sub-ps (comparable to laser pulse widths of 10's to 100's fs) RF does sub-ps, ETS does ps and PTP maintains usecs wall-clock Can't event think about future fs without ps basis done by electronic timing [1] MRF Timing Workshop 2014 contribution describes more details
4 Timing Solution for the 4th Laser L4 Ready-to-use black-box solution for L4 development Installed in one of L4 supplier labs (National Energetics, Austin, TX) in 2015 Provides 24 (MRF) triggers and 960 or 720MHz sync for both Long- and Short-pulse front-ends SW Interface to users (laser developers) allows daily operation LabVIEW SW for RF clock control and loops LabVIEW GUI for user (talks Channel Access)# #) CA integration by LabIOC # EPICS interface to MRF (talks Channel Access) (ref. to our paper TUD3O02) 1. RF coherent synthesizer (Holtzworth) 2.RF distribution (Hittite & in-house) 3.Dual ETS Master (MRF) 4. CentOS running EPICS & LabVIEW SW
5 Timing Solution for the 4th Laser L4 cont. Locking and phase shifting two EVGs to sync both lasers (LP, SP) 720MHz for SP and its EVG; 960MHz for LP and its EVG Laser OSCs are 80MHz; Event Clock is 120MHz Align SP trigger with LP triggers using SW knob (20MHz to 1/60secs triggers) Actually, EVG-300 can be phase-shifted with ±5MHz (on 960MHz base) Takes some time to shift LP trigger rising-edge to SP one, if both are 1/60s but it works smoothly
6 Timing Solution for the 4th Laser L4 cont. 1 minute repetition rate triggers Prescaler's limit is ~35secs (with 120MHz event clk.), so it is EVG sequencer Runs continuously and in sync with EVG onboard 5Hz (MXC) Event A for the 1st 30secs, event B for the 2nd so pulse-delay may be used with its ~35seconds delay line Event 0x00 to overrun 2^32 and reach 60secs Unique performance of all triggers in RMS jitter is still kept Not-really-great scope but it said <20ps RMS and 95ps max-dev w.r.t. EVG clock of 10secs delayed & 30secs repetitious trigger w.r.t. EVG clock
7 Timing Solution for the 4th Laser L4 cont. Single-shot triggers Are implemented with another event in EVG sequencer (perhaps only way) User enables/disables with GUI knob per each trigger Since sequencer shoots all the time, single-shot triggers have to be blocked/permitted by a set of EPICS records gating single-shot operation OS determinism vs. 1 minute epoch makes it viable But gating takes ~3 minute window for 1 minute shots :-( Version No.2 should use feedback from EVR pulsers to know precisely when a trigger was shot (so provide continuous single-shot) (I/O Intr. readout of specific EVR pulser register bit, triggered by async. notification from EVR kernel driver; EvrAssignIrqHandler() and use IFHW flag and mapping to pulsers) Deliberately small sized. Will become obsolete soon.
8 Timing Solution for the 4th Laser L4 Cont. Two NICs for PTP masters onboard cpci computer Uses linuxptp.org implementation (available w/ Linux kernel and e.g.: CentOS) HW time-stamping on compatible NICs (PTP HW clock) for performance Amended with 1PPS sync to align ETS triggers with absolute time One EVR trigger is set to 1 Hz and wired to DCD pin of onboard serial port PPS driver in Linux kernel and ldattach tool (util-linux) make the setup easy Results in chain of clock servos: EVR output trigger PPS discipline OS clock PHC PTP service Performance goal of <50 us accuracy achieved (drift between two slaves)
9 EPICS-based Interface Hytec Electronics Ltd. Ready to use ETS box was delivered by Hytec in Q Requirements mainly for user configurable triggers and jitter performance but also system scalability and versatility Includes MRF CompacPCI cards (EVG-300, EVR-300 and EVRTG-300) SW implementation of MRF OS driver, EPICS IOC and Control System Studio OPI HW design features Repetitive triggers implemented by EVR prescalers Single-shot by EVG sequencer 1 khz Laser-pulse-numbering by distributed bus signal EPICS IOC talks to MRF user-space API interfaced by MRF's Linux kernel driver PVs control parameters of individual triggers EVR1-UNIV0:width, EVR1-UNIV0:delay, EVG1:enable,... Device support (AsynPortDriver) for EVR and EVG hides the complexity of trigger parameters setup hides HW differences (EVR with prescaler, EVRTG with CML,...) Example: field(dtyp, "asynfloat64") field(out, "@asyn(evr1 0) TRIGDELAY")
10 Extreme Light Infrastructure (ELI) Laser Beamlines of ELI-BL L4 Timing unit covers the baseline of laser timing & synchronization Implements all three tiers: RF clock, triggers and PTP mutually phase locked Laser oscillators and EVGs (and so triggers) can be aligned by continuous phase-shifting without need for recommissioning laser configuration Will be installed on all laser beamlines locking individual RFs, locks the lasers Lessons learned ETS units are sometimes seen as a bench-top delay-generators So, does it have to be extremely flexible in frequent re-configuration? usecs precision TTL electronics with close to 5 Volts V requirements IH HFBR-1414 seems to be better option (will try to propose it soon) Laser development would benefit of more fine delayed outputs ( > 4xPD per EVR) In the front-ends for sure, further may not Next generation of EVG/EVR is welcome Lasers will remain 120MHz event clock, plain or 3rd party compensated fibers Will be able to run facility timing tests with long fibers in 2016
11 Extreme Light Infrastructure (ELI) Laser Beamlines of ELI-BL L4 Timing unit covers the baseline of laser timing & synchronization Implements all three tiers: RF clock, triggers and PTP mutually phase locked Laser oscillators and EVGs (and so triggers) can be aligned by continuous phase-shifting without need for recommissioning laser configuration Will be installed on all laser beamlines locking individual RFs, locks the lasers Lessons learned ETS units are sometimes seen as a bench-top delay-generators So, does it have to be extremely flexible in frequent re-configuration? usecs precision TTL electronics with close to 5 Volts V requirements IH HFBR-1414 seems to be better option (will try to propose it soon) Laser development would benefit of more fine delayed outputs ( > 4xPD per EVR) In the front-ends for sure, further may not Next generation of EVG/EVR is welcome Lasers will remain 120MHz event clock, plain or 3rd party compensated fibers Will be able to run facility timing tests with long fibers in 2016
12 Thank you for your attention Institute of Physics AS CR, v. v. i. Na Slovance Prague 8, Czech Republic info@eli-beams.eu
13 Support slide Future plans for L4 Timing More triggers ( already agreed) Use passive optocoupler/splitter (850nm, 0.4dB loss) to split the link due to last minute requirement and lack of free slots for additional fanouts will be fixed back in the facility Lock PTP and EVGs to GPS reference
14 Acronyms cpci Compact Peripheral Computer Interface DCD Data Carier Detect (ref to RS232) ETS Electronic Timing System IOC Input/Output Controller LabIOC Channel Access server/client implementaion for LabVIEW NIC Network Interface Card PHC Precision-time-protocol Hardware Clock PPS one Pulse-Per-Second PTP Precision Time Protocol (IEEE 1588 and its v2) RMS Root Mean Square
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