Finite State Machines
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1 Finite State Machines CS 3410 Computer System Organization & Programming [K. Bala, A. Bracy, E. Sirer, and H. Weatherspoon]
2 Stateful Components Combinational logic Output computed directly from inputs System has no internal state Nothing depends on the past! Inputs Need: to record data to build stateful circuits a state-holding device N Combinational circuit M Outputs Enter: Sequential Logic & Finite State Machines 2
3 Finite State Machines An electronic machine which has external inputs externally visible outputs internal state Output and next state depend on inputs current state 3
4 Automata Model Finite State Machine Registers Current State Input Comb. Logic Output Next State inputs from external world outputs to external world internal state combinational logic 4
5 FSM Example start state input/output state Legend state 0/0 1/0 0/0 A 1/1 B Input: 1 or 0 Output: 1 or 0 States: A or B What input pattern is the FSM looking for? [Mealy Machine] 5
6 Mealy Machine General Case: Mealy Machine Registers Current State Input Comb. Logic Output Next State Outputs and next state depend on both current state and input 6
7 Moore Machine Outputs depend only on current state Registers Current State Input Comb. Logic Comb. Logic Output Next State start state state out input Legend state out 1 0 A 0 B C 1 7
8 xkcd 8
9 Why FSMs? They help us reason about complex behavior. barks sees squirrel waits gets petted gets petted wags tail Clicker Question: What kind of machine is this? (A) Mealy (B) Moore (C) Neither sits doesn t give a crap about you any event ever! 9
10 Other FSMs Tennis 4/08/scoring-tennis-using-finitestate.html 10
11 Activity: Build a Circuit for a Serial Adder Add two infinite input bit streams streams sent with least-significant-bit (lsb) first Clicker Question: How many states are needed to represent this FSM? (a) 0 (d) 3 (b) 1 (e) 4 (c) 2 11
12 Strategy for Building an FSM (1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit 12
13 Step 1: State Diagram start state input/output state Legend state S States: Inputs: a and b (drawn as 2-bit input ab) Output: z 13
14 Strategy for Building an FSM (1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit 15
15 Step 2: Output & Next State Tables a b Curr State s z Next State s 16
16 Strategy for Building an FSM (1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit 18
17 Step 3: Create Bit Encoding a b Curr State s z Next State s Encode states as bits S0 = S1 = 2 states à 1-bit enough (1-hot also an option) Copy from previous Make a binary encoding instead of names 19
18 Strategy for Building an FSM (1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit 21
19 Step 4: Create Logic Equations Determine logic equations for next state and outputs s = z = 22
20 Strategy for Building an FSM (1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit: Simplify first! 24
21 Step 5: Draw the Circuit Next State s' D Q Current State s a b Output z s' 25
22 FSMs in a Processor? multi-cycle (non-pipelined) processor 27
23 FSMs in a Processor? multi-cycle (non-pipelined) processor handling cache misses, branch mispredictions, interrupts tracking the state of data in your cache (cache coherency) 28
24 Consider a finite state machine that takes two inputs, A and B, and generates a single output, Z. Inputs are unsigned binary numbers, entered into the FSM one digit at a time, beginning with the most significant digit. The output, Z, should be the larger of the two numbers. Example: A = 1000 and B = 0101, then Z = 1000 (the value of A). Draw the state transition diagram (states & arrows) that expresses this FSM. Use the notation AB for inputs (10 means A = 1 and B = 0). (1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit 29
25 Clicker Question: How many states are needed to represent this FSM? (a) 0 (d) 3 (b) 1 (e) 4 (c) 2 30
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