Analytical Performance Analysis of Network- Processor-Based Application Designs

Transcription

1 Analytcal Performance Analyss of Networ- Processor-Based Alcaton Desgns e Lu BMC Software Inc. Waltham, MA e Wang Unversty of Massachusetts Lowell, MA Abstract Networ rocessors (NP) are desgned to rovde both erformance and flexblty through arallel and rogrammable archtecture, mang them sueror to general-urose rocessors on erformance and to hardware-based solutons on flexblty. But NPs also ntroduce new challenges. It s mortant to study the lmtatons of NP archtectures so that one can tae full advantage of NP resources to acheve the requred erformance for a gven alcaton. It s therefore desrable to develo a general framewor for analyzng erformance of NPbased alcatons. Ths aer resents an analytcal method for solvng ths roblem. In artcular, we devse a queung networ to model NP resources and alcaton wor flows. We then use queung theory and oeratonal analyss to obtan erformance metrcs on throughut and resonse tme, among other thngs, at the comonent level as well as at the system level. We aly our erformance model to SlceNP, a TCP Slcng mlementaton of content-aware swtches on networ rocessors resented n [], and show that the analytcal results usng our models match the exermental results from actual mlementaton. erformance model; networ rocessor I. INTRODUCTION A networ rocessor s a rogrammable acet rocessng devce that combnes the advantages of low cost and flexblty of a RISC rocessor and scalablty of custom slcon (.e., ASIC chs) [2]. Secfcally desgned to store, rocess, and forward large volumes of data acets at wre seed through arallel and elnng archtectures, NPs are desrable buldng blocs for constructng networ systems that can rocess data acets of any form. They do so through software, rovdng a flexble latform for mlementng dfferent networ alcatons wthout the need to mae new hardware. Moreover, software modules can easly be reused. Thus, NPs allows users to create and add, through software, the latest and best networ servces, and n the same tme reduce develoment cost and rovde quc-tme-to-maret roducts. Programmng NPs s challengng. Ths challenge s on to of the general ssues that all software develong would face. For examle, snce several choces of desgns for solvng the same roblem often exst, how do we now whch desgn of data flow archtecture would rovde the best erformance? To answer ths queston we would need to obtan quanttatve analyss results. Pacet rocessors do not have oeratng systems. Ths means that software desgners need to exlctly allocate NP resources when desgnng NP-based alcatons, ncludng rocessor cycles, threads and memory unts. Tae memory unts as an examle, t s obvous that data structures that are accessed nfrequently, such as acet ayloads, should be laced n DRAM, whle data structures that are accessed frequently, such as loou tables, should be laced n SRAM. Some NPs, however, have multle channels for the same memory unt, mang t dffcult to determne how to allocate an ndvdual data structure to whch memory channel to obtan the best erformance. The decson would deend on the accessng attern n the artcular alcaton we are tryng to solve. Other functonal unts n NPs have the smlar roblem. Most networ alcatons have secfc erformance requrements, ncludng requrements on throughut and delay latency. How can one now whether the target NP would meet the requrements? If not, would an alternate NP, or an array of NPs, rovde the requred erformance? These questons call for erformance analyss tools that rovde quanttatve results. Boundng calculatons and dscrete event smulatons are two common analyss methods. Boundng calculatons, also called "bac of the enveloe" calculatons, are often used to qucly assess the maxmum throughut of a sngle system comonent. But ths method has several serous lmtatons. For examle, boundng calculatons tend to yeld otmstc redctons that are unrealstc, for the redcted erformance would lely decrease when more detals about the system are taen nto consderaton. For another examle, an NP has multle comonents, each of whch has requests queued u watng for servce. Smle bound calculatons cannot redct latency, nor can they model any nteracton between comonents. Dscrete event smulatons use a global tme and an event scheduler to measure erformance of a desgn. Transtons are reresented by dfferent objects of an event. All events have assocated tmestams. The smulaton rogram executes the events one at a tme n the order of ncreasng tmestams. The global tme jums from one event tmestam to the next. In addton to smulatng the logc of the system beng modeled, events have to udate the counters used for statstcs, rovdng detaled erformance characterstcs of the modeled system. Most NP vendors rovde develoment tool sets, ncludng a smulator, whch can be used to rovde more accurate erformance analyss of an alcaton. But most of the smulators can only erform the erformance analyss after the alcaton rograms are mlemented. We note that t s often

2 mossble to mlement every ossble desgn to choose the best one. Thus, much tme and effort wll be wasted at ths stage f t turns out that the chosen archtectural desgn does not meet the erformance requrements. We also note that smulators are desgned for a secfc NP model or an NP roduct lne. To the best of our nowledge there has been no tool that allows users to comare (even f just roughly comare) the erformance across dfferent tyes of NPs. To overcome the lmtatons n boundng calculatons and dscrete event smulatons, we ntroduce n ths aer an analytcal method that rovdes a general framewor for analyzng NP-based alcatons wthout mlementng them. The rest of the aer s structured as follows. In Secton II we descrbe the base-lne archtecture common n any tye of networ rocessors. In Secton III, we construct a queungnetwor for modelng NP comutatons. In Secton IV, we comare analytcal results obtaned from our theoretcal models wth an actual mlementaton of a TCP slcng content-aware swtch called SlceNP. We show that our analytcal results are consstent wth the actual erformance analyss. Fgure. General archtecture of networ rocessor Core CPU Interface External On Ch Networ Interface II. GENERAL ARCHITECTURE OF NETWOR PROCESSOR No ndustry consensus exsts at ths ont regardng what hardware comonents should be ncluded n a networ rocessor and how they should be organzed on a ch. NP archtectures from dfferent vendors vary consderably, but they share the same base-lne concets and structures. In general, a tycal NP conssts of an array of rogrammable acet rocessors () n a hghly arallel archtecture, a rogrammable control rocessor (a..a. core rocessor), hardware corocessors (CP) or accelerators for common networng oeratons, hgh-seed memory nterfaces, and hgh-seed networ nterfaces. Fgure shows the general NP archtecture of a networ rocessor. Pacet rocessors Pacet rocessors are RISC-based rocessors, wth the advantage of beng small, fast, nexensve, easy to ntegrate wth other hardware, and easy to rogram. s erform datalane tass and rovde fast-ath data rocessng at wre seed. CP Data Transfer Unt CP Fabrc Interface Networ Processor PHY Most acets are rocessed by s. s use an nstructon set that s otmzed for acet rocessng. I/O latences affect erformance a great deal. To hde memory latences most s emloy mult-threadng technology on hardware to rocess multle acets on a sngle concurrently. It mnmzes the overhead of context swtchng, thus sgnfcantly ncreasng the overall throughut. Data-lane tass nclude acet classfcaton, forwardng, flterng, header manulatng, rotocol converson and olcng. Most rocessng n networ alcatons occurs n data lanes. Control rocessor The control rocessor s a general-urose rocessor that runs an embedded oeratng system. The control rocessor rovdes overall control, erforms confguraton management, and rocesses exceton acets. Exceton acets could be control-lane-related, or data-lane-related that may requre extra rocessng such as IP acets wth otons. Corocessors The corocessors are secal-urose hardware, rovdng secfc functons for carryng out common networ tass, ncludng attern matchng, table loou, buffer management, queue management, hashng, checsum comutaton, and encryton/decryton. Snce these functons are commonly used n acet rocessng regardless whch rotocols are used, mlementng them va hardware seeds u executon. Corocessors can be used to smlfy software creaton, for they rovde a sngle-nstructon access to comlex oeratons. Networ and fabrc nterfaces The fabrc nterfaces handle nteracton between rocessors and fabrc swtch, and networ nterfaces handle nteracton between rocessors and the hyscal layer of the external networ. Most networ rocessors also nclude data transfer unts that are resonsble for movng acets between MAC devces and memory drectly. Hgh seed memory s exensve. Regular comuter systems often use dfferent tyes of memores n a herarchcal manner to balance between cost and seed. For examle, an on-ch level cache has the fastest seed, but wth the smallest caacty (.e., the number of bytes t can store). Level 2 and level 3 caches each rovde lower seed wth larger caacty than the revous level. The man memory has the largest caacty but wth the lowest seed. To acheve good erformance, data that are more frequently accessed are stored n faster memores. NPs adot a smlar memory herarchy. Snce NPs are used to rocess a large volume of networ acet data that demonstrates almost no localty, most NPs do not rovde cache to acet rocessors. Some NPs rovde on-ch memory for fast accessng. All NPs rovde hgh-seed memory nterface for varous levels of external memory, where

3 the Statc RAM (SRAM) rovdes faster seed and the Dynamc RAM (DRAM) rovdes large storage wth lower accessng seed. Unle conventonal comuter systems, NP rogrammers need to exlctly choose whch memory to store whch data. Normally, SRAM s used to store confguraton and status nformaton, or acet headers n some cases, whch needs to be accessed frequently. DRAM rovdes large sace to buffer the ayload data that are less frequently accessed. A number of ch maers manufacture varous tyes of networ rocessors. The most oular models nclude AMCC npcore famly [] and Intel IXP famly [5]. III. QUEUING NETWOR MODEL Any NP-based alcaton would tycally go through three elnng stages: acet recevng, acet rocessng, and acet transmttng. Pacet recevng and acet transmttng can each be mlemented on a sngle acet rocessor or on multle acet rocessors n arallel. Pacet rocessng can be mlemented on multle acet rocessors n arallel or n elne. We model acet flows on a networ rocessor as a queung networ, llustrated n Fgure 2. We then devse a erformance model from t. Incomng acet data Recevng Onch Co Processng SRAM Fgure 2. Queung networ model of networ rocessor In ths queung networ model we suly a searate nut queue to each acet rocessor, corocessor, and memory unt. We assume three levels n the memory herarchy: on-ch memory, SRAM, and DRAM. Snce the control rocessor s normally used to manage confguratons and handle excetons, rather than rocessng acets on the fast data ath, t has less mact on the overall erformance of an alcaton and so we do not nclude t n the model. We assume that acet recevng and acet transmttng are each handled by a acet rocessor, and acet rocessng s handled by multle acet rocessors n arallel. Usng the multthreadng mechansm, acet rocessors do not need to be held watng for resonse from corocessor, thus the corocessors are modeled n the same way as acet rocessors do. There are several ways to allocate resources. For smlcty, we resent here a smler model, whch can be extended wth easy modfcatons to meet other confguratons. Transmttng DRAM Outgong acet data Crtcal arameters We dentfy the followng arameters that are crtcal for evaluatng analytcal models for each resource as well as for the entre NP. Arrval rate: It s the number of requests or acets that arrve er second. Throughut: It s the number of requests or the number of acets comleted er second. Resource utlzaton: It s the ercentage of tme that the resource s busy rocessng requests. Average resonse tme: It s the average tme duraton that each request or acet sends nsde the NP. The arrval rate can be easly measured externally. It can also be secfed exlctly. If the analyss nterval s large enough, the system throughut s, accordng to the flow equlbrum rncle, the same as the system arrval rate. In a conventonal comuter system, the oeratng system measures accurately the utlzaton of resources, such as utlzaton of rocessors the utlzaton of memores. Naturally, NP-based alcatons should always try to acheve otmal erformance and elmnate unnecessary overheads. There s usually no measurement on acet rocessor utlzatons. Whle the measurement of queue length at each acet rocessor s relatvely easy to obtan, we note that frequent samlng would cause sgnfcant negatve erformance mact. On the other hand, coarse samlng would cause bg dstorton. Thus, we use the servce demand method. Servce demands of each resource may be calculated va seudo code analyss. We frst measure servce rate, throughut, and resonse tme at the comonent level usng queung networ analyss. We then use these measures to measure throughut and resonse tme at the system level by treatng the whole system as a blac box. Comonent level modelng The queung networ model shown n Fgure 2 s a closed model. We use t to analyze erformance at the comonent level. There are a fxed number of requests n the system. Mean Value Analyss We choose the Mean Value Analyss (MVA) to solve closed queung networ model. MVA s ntutve and s wdely used. The detaled descrton and dervaton of the MVA algorthm can be found, e.g., n [7]. The algorthm can be smlfed as a rocedure of recursvely alyng three equatons: the resdence-tme equaton, the throughut equaton, and the queue length equaton, as shown n Equaton (3 ) to (3 3). Resdence tme equaton: D R ( n) = D delay resource [ + Q ( n ) ] queung resource (3 )

4 Throughut equaton: X ( n) = = n R ( n) Queue length equaton: (3 2) Q ( n) = X ( n) R ( n) (3 3) Here denotes the ndex of the resource, the total number of resources, and n the total number of requests resde n the queung networ. We assume that the servce demand at each resource,, s nown by dervng from seudo code analyss. D Resdence tme s the total amount of tme that a request stays n a resource. It s the sum of the servce tme and the queung tme that the request wats for servce. The resdence tme at a delay resource s the same as the servce tme, snce there s no watng queue at delay resources. The resdence tme equatons for the queung resources means that the tme a request sends watng n the queue s the accumulated servce tme of all requests n front of t n the queue. The throughut equaton s derved from Lttle s Law (see, e.g., [3]). The end-to-end resonse tme of a request gong through the queung networ s the summaton of the tme t sends at each resource, whch s the resdence tme. The average queue length at resource when there are n requests n the system, Q (n), s the average number of requests at the resource. Thus, the queue length equaton can be derved from Lttle s Law and the Forced Flow Law [3]. Throughut bound To mae the MVA algorthm converge, we need to fnd the bound of the system throughut. The maxmum throughut of a system s determned by the bottleneced devce. Accordng to the Servce Demand Law [3], we have D =U /X, where U s the utlzaton of resource, and X s the throughut of the entre system. Snce the utlzaton of any resource can never exceed %, we have X D for any resource. Then we have, X (3 4) max D = Intutvely, the maxmum throughut the system can ever acheve s bounded by the resource wth largest servce demand. Therefore the resource wth the largest servce demand s the bottleneced resource n the queung networ. Parallel rocessor modelng In the queung networ model shown n Fgure 2, there are multle acet rocessors handlng data n arallel n the acet rocessng stage. In ths case, there are multle resources servng requests from a sngle queue. The basc oeratonal analyss equatons does not account for ths case. Sedmann [9] roosed an aroxmaton method for analyzng arallel server statons wth a sngle server under medum to heavy utlzatons. The dea s to convert the confguraton of arallel servers nto the confguraton of seralzed servers. Assume that there are m arallel resources tang requests from a sngle queue, and the servce demand on each ndvdual resource s D. Then all m resources can be relaced wth a sngle resource that s m tmes faster than each ndvdual s orgnal resource. Therefore, the servce demand on ths new resource s D/m. In ths way, the watng tme on the queue s close to the watng tme n the system wth m arallel resources. A second resource s added n tandem to rectfy the mean-tme-n-staton estmates by assurng that the total servce remans the same. Hence, the second resource can be vewed as a delay resource wthout watng queues. The servce demand on the delay resource s D*(m-)/m. Requests under lght load send no watng tme n the queue. Thus, the average resonse tme for a request n the new confguraton s D/m + D*(m-)/m = D. Ths matches the average resonse tme for a request n the orgnal arallel confguraton. Resources under heavy load are busy most of the tme. The domnant art of the average resonse tme s the watng tme sent n the queue. The tme delay from the delay resource becomes neglgble. The average watng tme n the queue of the sngle resource s the same as the average watng tme n the queue of the m arallel resources. Usng ths aroxmaton, the arallel acet rocessors n Fgure 2 are relaced wth a sngle queung resource lus a delay resource, as llustrated n Fgure 3. 2 m D ( m ) D m m D Fgure 3. Aroxmate modelng on arallel rocessors System level modelng From the vewont of an outsde observer, the whole queung networ n Fgure 2 can be treated as a blac box. It taes requests, or acets, one by one from ts nut queue and comletes them as outut. Ths blac box resents no dfference from a queung resource dscussed before. It s therefore a erfect examle of an oen queung networ model. Unle most other resources, the servce rate vares deendng on the number of requests n the system. Thus the servce rate t can be treated as a load-deendent resource. Usng analyss at the comonent level, we may obtan an array of throughut based on dfferent numbers of requests,, n the system. Then the varable servce rate can be derved from them as below. ( ) ( ) X < μ = (3 5) X

5 Here s the number of requests n the system when t reaches the maxmum throughut. It can be found usng the MVA algorthm. Assume that the requests arrve at a constant rate,, and the nut queue of the networ rocessor system s unbounded. The equlbrum robablty [8] can be rewrtten as follows: = ρ + + = = ( ) ( )( ρ ) < (3 6) ( ) X ( ) ρ ( ) ( ) = X ( ) X ( 2) L X ( ) X ( ) (3 7) Here and ρ =. Then the average number of requests n the system can be further derved as below. = N = ρ + ( ) ( + ρ ) ( )( ) 2 ρ (3 8) In the oen queung networ model, the arrval rate has to be less than the maxmum throughut, that s, < X ( ). Otherwse, the watng queue may grow to nfnty. So does the average resonse tme. Accordng to the equlbrum rncle of oen queung networ, the throughut s equal to the arrval rate, X =. Alyng Lttle s Law we may obtan the average resonse tme as follows: N N R = = (3 9) X Bounded nut queue length The assumton of unbounded queue length n revous secton s unrealstc n a real networ system, for the sze of the nut buffer of any system s bounded. Once the nut buffer s full, any new ncomng acets wll be droed. In many cases, the networ system utlzaton s not too hgh, or the average servce rate s much greater than the average arrval rate. Then the watng queue would not grow too long. If the nut buffer s reasonably large, drong acets s not an ssue. The analyss model wth unbounded queue length s suffcent for modelng such systems. In desgnng NP-based alcatons, t s mortant to fnd a good balance between the nut buffer sze and the acet drong rate. If certan acet drong rate s accetable, t would be reasonable to lmt the queue length for achevng better average resonse tme. For networ systems that exect to reach the queue length bound, the analyss model wth unbounded queue length s not suffcent. The queue length bound has to be factored n. Bounded queue length means that there are a bounded number of states n the state transton dagram. Suose s the maxmum number of requests allowed n the system, the varable servce rate n equatons (3 5), (3 6) and (3 7) can be rewrtten searately for when and when <. When <, ( ) =, L μ = X, (3 ) = + = ( ) ( ) (3 ) = (3 2) When, ( ) ( ) X =, L, μ = (3 3) X =, L, + + = + = = ( ) ( ) X ( ) ( ) ρ ( ρ ) ( )( ρ ) =, L, =, L (3 4) (3 5) Then, the average number of requests n the system can be derved by alyng the followng equaton: N = = (3 6) In systems wth bounded queue length, the erformance modelng concerns not only the throughut and average resonse tme, but also the acet drong rate. The roorton of the droed acets s the fracton of tme when there are requests n the system. Based on equatons (3 2) and (3 5), we have = < ( ) (3 7) X ( ) ρ ( ) Multle class worloads The analyss model descrbed n revous sectons deals wth a sngle worload class only. Unle a standard comuter system, a networ rocessor s dedcated to a secfc alcaton n many cases. There s only one worload runnng on t. The sngle class analyss model s suffcent for such systems. However, the analyss model can be easly extended to handle multle worload classes, for the stuatons that multle alcatons run on a sngle NP. The detal analyss for multle-class worload s omtted n ths aer.

6 For smlcty, our analyss model currently consders only the smle case of NP beng a multlexer. We leave the extenson to concentrator functon to future wor. IV. ALICATION ANALYSIS SlceNP To valdate our analytcal model we aly t to actual NPbased alcatons. In artcular, we choose SlceNP [] as an examle. SlceNP mlements TCP Slcng for a content aware swtch usng an Intel IXP24 networ rocessor. It rocesses data usng four comonents: acet recevng, acet transmttng, rocessng of acet from clent, and rocessng of acet from server. Each comonent s assgned wth a dedcated acet rocessor called a mcroengne (ME) n the IXP technology. When the swtch receves a connecton start request (SYN) from the clent, t establshes a TCP connecton wth the clent usng the handshae rotocol. Once recevng the HTTP request, t arses the request and matches t wth reset olcy to fnd the target server. After the target server s dentfed, t establshes another TCP connecton wth the server usng the handshae rotocol agan. Then the two connectons are slced together. Unle most Layer-7 swtches, SlceNP creates a brand new TCP connecton wth target server for each connecton from the clent. Table summarzes the acet nteracton sequence for each HTTP request. From clent From server To clent To server SYN SYN/AC AC/Request AC SYN SYN/AC AC/Request Resonse Resonse AC AC FIN FIN FIN/AC FIN/AC AC AC Table. Pacet sequence n swtch for each HTTP request The shaded entres are acet nteractons after the two TCP connectons are slced. If the request fle sze s larger than the MTU, the fle s broen nto multle acets, and so there are multle ars of resonse and AC acets for that fle. Analyss method For a Layer-7 swtch, t s easy to obtan the request arrval rate and the average acet sze. But t s dffcult to measure the average servce demand for each request or the number of acets n the queue at each resource. In our study we estmate servce demand by analyzng the seudo code of each alcaton. MEs n IXP24 are RISC rocessors, and so most nstructons only tae one cloc cycle. Thus, servce demand for an ME can be obtaned based on the number of nstructons for rocessng each request. For memory access, the servce demand can be obtaned based on the average access latency and the number of memory reference made for each request. D ME D SRAM nstructon _ count = (4 ) cloc _ rate reference_ count SRAM _ latency = (4 2) cloc _ rate reference _ count DRAM _ latency D DRAM = (4 3) cloc _ rate reference_ count SHaC _ latency D SHaC = (4 4) cloc _ rate When usng multle MEs n arallel at the rocessng stage, the MEs are relaced wth two resources n the model shown n Fgure 3. Therefore, the servce demands for the aggregated resource and delay resource are dfferent from those of a sngle ME. D ame D dme nstructon _ count = (4 5) cloc _ rate ME _ count nstructon _ count ( ME _ count ) = (4 6) cloc _ rate ME _ count The related hardware arameters for an IXP24 networ rocessor are lsted n Table 2 [4]. ME Cloc Rate (MHz) ME Latency (rocessor cloc cycles) Threrads SHaC SRAM DRAM Table 2. Intel IXP24 arameters SHaC s a functonal unt rovdng on-ch memory (called scratchad), hashng, and control status regsters. Pseudo code analyss Accordng to the desgn descrton of SlceNP, we derve seudo code modules and summarze estmated servce demands n Table 3. We obtan estmated servce demands for the modules wth * from the standard mcroblocs that come wth the Intel IXA SD. Not every acet goes through all modules. The modules n the shaded area are only executed for certan secfc acet tyes. All acets are rocessed by Data Forward after the two connectons are slced. Based on Tables and 3 we can derve the servce demand on each resource for one HTTP request. The number of acets for HTTP request and resonse vary, deendng on the request fle sze. In our exerment, we assume that the request s small enough to ft nto one acet, and the MTU for the resonse acet s 5 bytes for Ethernet. Module Inst. SHaC SRAM DRAM Cycles Ref. Ref. Ref. Pacet Rx* 86 DL Source* 33 Ethernet Deca* 2 IP Valdate Ctrl Bloc Loou 64 3 TCP Valdate Clent SYN 3 6 Clent AC/Request 2 72

7 Server SYN/AC 35 8 Data Forward 28 Clent FIN 2 Server FIN/AC 2 8 Ethernet Enca* 6 DL Sn* 54 Pacet Tx* 92 2 Table 3. Pseudo code summary of SlceNP desgn In order to comare the analytcal results obtaned from our erformance model wth the actual measured results from SlceNP mlementaton, we choose the same set of request fle szes to obtan the maxmum throughut. We then convert the throughut results n terms of requests nto bytes, based on Table. The left chart of Fgure 4 shows the results. Our analytcal results match the measured results from actual mlementatons resented n [], whch s shown n the rght chart of Fgure 4 (The only dscreancy s when request fle sze s small). Ths valdates our aroach Request f le s ze (B) Fgure 4. Throughut result comarson When the swtch reaches ts maxmum throughut, the average resonse tme s often unaccetable. Fgure 5 llustrates how the average resonse tme changes accordng to the throughut. Ths could rovde a gudelne to the alcaton desgner. In our exerment we fx the request fle sze to 6B. The resonse tme reaches to.9 second when the throughut reaches the maxmum of 22 requests. V. CONCLUSION In ths aer, we roose and valdate a general analytcal framewor for measurng the erformance of NP-based alcaton desgns. It allows alcaton desgners to evaluate the erformance of a desgn wth accuracy to determne whether t meets the erformance requrement, and thus t saves desgners tme and effort from the need of actually mlementng the desgn to obtan erformance measurements from smulatons. ACNOWLEDGEMENT Ths wor was suorted n art by an Intel grant. The second author was also suorted by NSF under grant CCF REFERENCES [] htt:// [2] D. Comer, Networ Systems Desgn Usng Networ Processors, Pearson Prentce Hall, 24 [3] P. Dennng and. Buzen, The Oeratonal Analyss of Queueng Networ Models, Comutng Survey, Volume, Number 3, Setember 978 [4] Intel IXP24 Networ Processor Datasheet, February 24 [5] htt://develoer.ntel.com/desgn/networ/roducts/nfamly/ [6] D. Menasce and V. Almeda, Caacty Plannng for Web Servces, Prentce Hall PTR, 22 [7] M. Reser and S. Lavenburg, Mean-Value Analyss of Closed Multchan Queung Networs, ournal of the Assocaton for Comutng Machnery, Volume 27, Number 2, Arl 98 [8] T. Robertazz, Comuter Networs and Systems: Queueng Theory and Performance Evaluaton, Srnger-Verlag, 99 [9] A. Sedmann, P. Schwetzer and S. Shalev-Oren, Comuterzed Closed Queueng Networ Models of Flexble Manufacturng Systems, Large Scale Systems, Volume 2, Number 4, 987 [] L. Zhao, Y. Luo, L. Bhuyan and R. Iyer, SlceNP: A TCP Slcer usng A Networ Processor, ACM Symosum on Archtectures for Networ and Communcatons System, Prnceton, N, October 25 2 Resonse tme (ms) Arrval rate (Requests/sec) Fgure 5. Resonse tme vs. arrval rate Resonse Tme (ms) Arrval Rate (Requests/sec) Request Drong Rate 2% % 8% 6% 4% 2% % Arrval Rate (Requests/sec) Boundng the nut queue length s an easy way to sgnfcantly mrove the resonse tme at the rce of drong requests. The quantfed results wll hel to determne f t s accetable. Fgure 6 shows that the resonse tme s mroved tremendously whle the request drong rate s stll et low. Q lmt Q lmt 5 Q lmt Q lmt Q lmt 5 Q lmt Fgure 6. Resonse tme and request drong rate wth lmted Q length We observe that addng addtonal MEs maes no sgnfcant erformance mrovement. Ths s because the bottlenec of the alcaton s on SRAM access. In order to sgnfcantly mrove erformance, one has to ether reduce I/O reference to SRAM or dstrbute SRAM to multle channels f they are avalable.