36V-Capable Overvoltage Protector with Regulated Output Voltage
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1 ; Rev 1; 8/11 36V-Capable Overvoltage Protector with General Description The protects valuable consumer circuits against voltage faults of up to +36V. This robust protection is implemented in a three-step scheme for a superior result. If the input is below the preset regulated outputvoltage (VPROV) threshold, the output tracks the input minus the voltage drop (RON x ILOAD) across the pass FET. If the input exceeds VPROV, the output is regulated to VPROV. If the input rises further and exceeds the overvoltage lockout cutoff threshold (VOVLO), the output is disconnected from the input. A low resistance 160mI (typ) FET is integrated in the, effectively reducing the component count and application footprint. The also features thermal shutdown protection against a short-circuit event. The is specified over the extended -40NC to +85NC temperature range and is available in 8-pin TDFN (2mm x 2mm) package. Mobile Phones Smartphones Portable Media Player PDAs Applications Digital Cameras Bluetooth Headset E-Book Mobile Internet Device Features S Input Voltage Protection Up to +36V S Preset (+5.1 typ) S Integrated 160mI (typ) N-Channel MOSFET Switch S Soft-Start to Minimize In-Rush Current S Overvoltage Cutoff Protection +8V (typ) S Thermal Shutdown Protection S -40NC to +85NC Operating Temperature Range PART Ordering Information TEMP RANGE P- PACKAGE TOP MARK -40NC to ETA+T 8 TDFN-EP* ADI +85NC +Denotes a lead(pb)-free/rohs-compliant package. T = Tape and reel. *EP = Exposed pad. Typical Operating Circuit TRAVEL ADAPTER PUT V BUS 1µF 1µF * * CHARGER PUT PMIC CHARGER PUT SYSTEM LOAD GND V IO V BUS 10kΩ APIC WITH HS USB GND *ONLY TDFN. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at
2 36V-Capable Overvoltage Protector with ABSOLUTE MAXIMUM RATGS (Voltages referenced to GND.) V to V to +6V, V to +6V Continuous Current Through / 8-Pin TDFN... Q1.6A 10ms Current Through / 8-Pin TDFN... Q2A Continuous Power Dissipation (T A = +70 o C): 8-Pin TDFN (derate 11.9mW/NC above +70NC)...953mW Operating Temperature Range NC to +85NC Storage Temperature Range NC to +150NC Junction Temperature NC Lead Temperature (soldering, 10s) NC Soldering Temperature (reflow) nc Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TDFN Junction-to-Ambient Thermal Resistance (B JA ) NC/W Junction-to-Case Thermal Resistance (B JC )... 37NC/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to ELECTRICAL CHARACTERISTICS (V = +2.2V to +36V, T A = -40NC to +85NC, unless otherwise noted. Typical values are at V = +5. and T A = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS M TYP MAX UNITS Input Voltage V V Preset V PROV I = 200mA, V = V I = 0mA, V = I = 800mA, V = 6V (Note 3) Output Voltage V I = 0mA V > V PROV V PROV V V < V PROV (Note 4) V V Overvoltage Lockout Cutoff Threshold Rising V OVLO rising V Overvoltage Lockout Hysteresis % of typ V OVLO 1 % = low, V = 4., I = 0mA Input Supply Current I = low, V = 7V, I = 0mA FA Input Shutdown Current I _Q = high, V = 3V FA Shutdown Current V =, V = 4V, = high FA On-Resistance R ON V = 4.7, I = 100mA 280 mi LDO Load Capacitance I up to 0.8A 10 FF DIGITAL SIGNALS (, ) Input High Voltage V IH 1.4 V Input Low Voltage V IL 0.4 V Input Leakage Current I LEAK V = or na V IO = 3.3V, I SK = 1mA (see Typical Output Low Voltage V OL Operating Circuit) 0.4 V Leakage Current V IO = 3.3V, deasserted (see Typical Operating Circuit) na 2
3 ELECTRICAL CHARACTERISTICS (continued) (V = +2.2V to +36V, T A = -40NC to +85NC, unless otherwise noted. Typical values are at V = +5. and T A = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS M TYP MAX UNITS TIMG CHARACTERISTICS (Note 4) V _M < V < V OVLO until charge pump Input Debounce Time t DEB turns on, see Figure 1 V Time t _M < V < V OVLO to low until charge pump turns on, see Figure 1 R LOAD = 100I, C LOAD = 1FF, V = Turn-on Time During Soft-Start t ON 20% of V to 80% of V, see Figure ms ms 48 Fs V > V OVLO to V = 80% of V PROV, Overvoltage Turn-Off Time t OFF R LOAD = 100I, see Figure 1 1 Fs THERMAL PROTECTION Thermal Shutdown T SHDN 150 NC Thermal Hysteresis T HYST 20 NC Note 2: All devices are 100% production tested at T A = +25NC. Limits over the operating temperature range are guaranteed by design and not production tested. Note 3: Thermally limited, guaranteed by design, and not production tested. Note 4: In linear mode, as I increases, the voltage drops due to a voltage across Q1 (see Functional Diagram). Note 5: All timing characteristics are measured using 20% and 80% levels unless otherwise specified. t OFF t DEB V OVLO V PROV M V PROV t DEB t DEB t ON t ON I t t t DEB Figure 1. Enable/Select Time 3
4 (C = 1µF, C = 4.7µF, T A = +25 C, unless otherwise noted.) SUPPLY CURRT (µa) SUPPLY CURRT vs. VOLTAGE VOLTAGE (V) V = toc01 SUPPLY CURRT (µa) SUPPLY CURRT vs. TEMPERATURE 200 V = V = TEMPERATURE ( C) Typical Operating Characteristics V = 2.2V toc02 NORMALIZED ON-RESISTANCE NORMALIZED ON-RESISTANCE vs. SUPPLY VOLTAGE SUPPLY VOLTAGE (V) I = 100mA LDO ABOVE 5.1 toc03 NORMALIZED ON-RESISTANCE NORMALIZED ON-RESISTANCE vs. TEMPERATURE I = 100mA EACH V CURVE IS NORMALIZED DEPDTLY AT 25 C V = 3V V = 4.2V toc04 VPROV (V) V PROV vs. TEMPERATURE V = 6V I = 100mA toc05 VOLTAGE (V) VOLTAGE vs. VOLTAGE I = 100mA toc TEMPERATURE ( C) TEMPERATURE ( C) VOLTAGE (V) NORMALIZED DEBOUNCE TIME NORMALIZED DEBOUNCE TIME vs. TEMPERATURE V = I = 100mA toc07 VOVLO (V) V OVLO vs. TEMPERATURE toc TEMPERATURE ( C) TEMPERATURE ( C) 4
5 Typical Operating Characteristics (continued) (C = 1µF, C = 4.7µF, T A = +25 C, unless otherwise noted.) 6V 4V V PROV 4V RISE TRANSIT RESPONSE (I = 10mA) toc09 6V 4V V PROV 4V FALL TRANSIT RESPONSE (I = 10mA) toc10 250µs/div 250µs/div LOAD TRANSIT (V = ) toc11 LOAD TRANSIT (V = ) toc12 800mA 10mA I 500mA/div 800mA 10mA I 500mA/div 200ns/div 200ns/div SWITCH TURN-ON TIME RESPONSE (R LOAD = 100Ω) toc13 SWITCH TURN-OFF TIME RESPONSE (R LOAD = 100Ω) toc14 3.3V 3.3V 10ms/div 2ms/div 5
6 36V-Capable Overvoltage Protector with Typical Operating Characteristics (continued) (C = 1µF, C = 4.7µF, T A = +25 C, unless otherwise noted.) POWER-UP RESPONSE (C LOAD = 470µF) toc15 3V POWER-UP RESPONSE (C LOAD = 470µF) toc16 3.3V 3.3V 10ms/div 10ms/div RESPONSE (OVERVOLTAGE CONDITION) (R LOAD = 50Ω) toc17 12V 6V 6V 2.5A SHORT SHUTDOWN (THERMAL) toc18 I 1A/div 3V 100mA 0A I 100mA/div 0A 3V 2V/div 10ms/div 20ms/div 6
7 TOP VIEW GND Pin Configuration + *EP 1 *CONNECT EXPOSED PAD TO GND TDFN (2mm 2mm) N.C. Pin Description P NAME FUNCTION 1,2 Overvoltage Protection Input. Bypass with a 1FF ceramic capacitor to get Q15kV HBM ESD protection. No capacitor is required for ±2kV HBM ESD protection. Externally connect both pins together. 3 Active-Low Enable Input. Drive low to turn on the device. Drive high to turn off the device. 4 N.C. No Connection. Not internally connected. 5 GND Ground 6 Open-Drain Flag Output. is driven low after input voltage is stable between minimum V and V OVLO after soft-start time (double of debounce time). Connect a pullup resistor from to the logic I/O voltage of the host system. 7,8 Overvoltage Protection Output. Bypass with a 1FF or larger ceramic capacitor (see Table 1). Externally connect both pins together. EP Exposed Pad. Connect EP to GND. 7
8 HV CP Q1 PROV CONTROL OVLO CONTROL PROTECTION Functional Diagram BG POK OVLO V BG TIMG AND CONTROL LOGIC OK Detailed Description The features the overvoltage protection to the charger input VBUS line when a travel adapter (TA) is used. In addition, the features a low 160mI (typ) on-resistance internal FET (Q1) and protects the low-voltage system against voltage faults up to +36V. The features three-step overvoltage protection. When the input is below the preset regulated output-voltage (VPROV) threshold, the output follows the input minus the voltage drop across the pass FET (RON x ILOAD). When the input exceeds VPROV, the output is regulated to VPROV. If the input rises further and exceeds the overvoltage lockout cutoff (VOVLO) threshold, the output is disconnected from the input. The also features thermal shutdown protection against short-circuit events. Soft-Start To minimize inrush current, the features a soft-start capability to slowly turn on Q1. Soft-start function permits the device to charge the load capacitor up to 1000FF by controlled current. The softstart is initiated when the debounce time ends ( starts charging) and ends when is asserted low, 15ms (typ). Linear Mode When the input voltage exceeds the minimum voltage but is below VPROV, follows with a minimum voltage drop (RON x ILOAD) across pass FET after the debounce time, tdeb, and is asserted. The LDO mode needs a capacitor on. The recommended value is 10FF for load currents up to 800mA (Table 1). Preset Regulated Output-Voltage Mode (PROV) When goes above the preset regulated output voltage (VPROV), Q1 provides a constant voltage of VPROV at, and is asserted. Table 1. Recommended Load Capacitance LOAD CURRT (ma) LOAD CAP (µf)
9 Overvoltage Lockout Mode (OVLO) When goes above the overvoltage lockout threshold (VOVLO), is disconnected from and is deasserted. Power dissipation increases when the input goes higher than VPROV. The overvoltage lockout threshold is set to further the power dissipation. When drops below VOVLO, the debounce time starts counting. After the debounce time (2 x tdeb), follows again and is asserted. Thermal Shutdown The features a thermal shutdown function necessary to protect the device. The device turns off and is deasserted when the junction temperature exceeds +150NC (typ). When the temperature drops 20NC (typ) below 150NC (typ), the device turns back on and Q1 is turned on after the debounce time. Applications Information Power-Supply Decoupling Bypass pin(s) to ground with a 1FF or larger ceramic capacitor placed as close as possible to the device. PROCESS: BiCMOS Chip Information Package Information For the latest package outline information and land patterns, go to Note that a +, #, or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE PUT NO. LAND PATTERN NO. 8 TDFN-EP T
10 REVISION NUMBER REVISION DATE DESCRIPTION Revision History PAGES CHANGED 0 9/10 Initial release 1 8/11 Removed SC70 pin information from data sheet. Added additional conditions to Preset parameter in the Electrical Characteristics table 1, 2, 3, 7, 9 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 10 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
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