Davide Rossi DEI University of Bologna AA

Transcription

1 Lab of Digital Electronics M / Lab of Hardware-Software Design of Embedded Systems Davide Rossi DEI University of Bologna AA

2 Objective of this course Design of digital circuits with Hardware Description Languages (HDL) based digital design flows Programming and debugging of embedded architectures based on micro-controllers (MCUs) Extending MCU-based embedded architectures FPGA prototyping of embedded systems on chip (Optional)

3 Notes on the course Web: Teacher: Prof. Organization Lectures - theory and examples Labs - practical experience and exercises Examination Projects end Exercised done during the course Oral Presentation of the Projects Pre-requisites Basics of digital electronics Basics of computer architecture C programming Basic Linux operating system

4 Structure of this course HW design HDL-based flow (HW part of the class) Programming Microcontrollers (SW part of the CLASS) Extending Microcontrollers Architecture (HW + SW) FPGA Prototyping (optional)

5 Possible Alternative to Lab Exercises Students already experienced with basic RTL design will have the possibility to work on a practical open-source research project ( supervised by the EEES research team The pre-requisites for the project option are: PROGETTO DI SISTEMI ELETTRONICI T-1-9 cfu (or similar) Discussion with the responsible of the course (Prof. Davide Rossi) Students following Lab of Hardware-Software Design of Embedded Systems are encouraged to do the project The project will be fescues on the same topics of the class: Digital hardware design Hardware software co-design of embedded systems Prototyping of digital systems on FPGA devices

6 Embedded systems overview Computing systems are everywhere Most of us think of desktop computers PC s Laptops Mainframes Servers But there s another type of computing system Far more common...

7 Embedded systems overview Embedded computing systems Computing systems embedded within electronic devices. Hard to define. Nearly any computing system other than a desktop computer. Billions of units produced yearly, versus millions of desktop units. Perhaps 50 per household and per automobile. Computers are in here... and here... and even here... Lots more of these, though they cost a lot less each.

8 A short list of embedded systems Anti-lock brakes Auto-focus cameras Automatic teller machines Automatic toll systems Automatic transmission Avionic systems Battery chargers Camcorders Cell phones Cell-phone base stations Cordless phones Cruise control Curbside check-in systems Digital cameras Disk drives Electronic card readers Electronic instruments Electronic toys/games Factory control Fax machines Fingerprint identifiers Home security systems Life-support systems Medical testing systems Modems MPEG decoders Network cards Network switches/routers On-board navigation Pagers Photocopiers Point-of-sale systems Portable video games Printers Satellite phones Scanners Smart ovens/dishwashers Speech recognizers Stereo systems Teleconferencing systems Televisions Temperature controllers Theft tracking systems TV set-top boxes VCR s, DVD players Video game consoles Video phones Washers and dryers And the list goes on and on

9 Some common characteristics of embedded systems Single-functioned Executes a single program, repeatedly Tightly-constrained Low cost, low power, small, fast, etc. Reactive and real-time Continually reacts to changes in the system s environment Must compute certain results in real-time without delay

10 Universität An Dortmund embedded system example -- a digital camera CCD Digital camera chip A2D CCD preprocessor Pixel coprocessor D2A lens JPEG codec Microcontroller Multiplier/Accum DMA controller Display ctrl Memory controller ISA bus interface UART LCD ctrl Single-functioned -- always a digital camera Tightly-constrained -- Low cost, low power, small, fast Reactive and real-time -- only to a small extent

11 Design challenge optimizing design metrics Obvious design goal: Construct an implementation with desired functionality Key design challenge: Simultaneously optimize numerous design metrics Design metric A measurable feature of a system s implementation Optimizing design metrics is a key challenge

12 Design challenge optimizing design metrics Common metrics Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE cost NRE cost (Non-Recurring Engineering cost): The onetime monetary cost of designing the system Size: the physical space required by the system Performance: the execution time or throughput of the system Power: the amount of power consumed by the system Flexibility: the ability to change the functionality of the system without incurring heavy NRE cost

13 Design challenge optimizing design metrics Common metrics (continued) Time-to-prototype: the time needed to build a working version of the system Time-to-market: the time required to develop a system to the point that it can be released and sold to customers Maintainability: the ability to modify the system after its initial release Correctness, safety, many more

14 Design metric competition improving one may worsen others lens CCD Power Performance Size NRE cost Digital camera chip A2D CCD preprocessor Pixel coprocessor D2A JPEG codec DMA controller Microcontroller Multiplier/Accum Display ctrl Memory controller ISA bus interface UART LCD ctrl Expertise with both software and hardware is needed to optimize design metrics Not just a hardware or software expert, as is common A designer must be comfortable with various technologies in order to choose the best for a given application and constraints Hardware Software

15 Three key embedded system technologies Technology A manner of accomplishing a task, especially using technical processes, methods, or knowledge Three key technologies for embedded systems Processor technology Design technology IC technology

16 Processor technology The architecture of the computation engine used to implement a system s desired functionality Processor does not have to be programmable Processor not equal to general-purpose processor Controller Datapath Controller Datapath Controller Datapath Control logic and State register IR PC Register file General ALU Control logic and State register IR PC Registers Custom ALU Control logic State register index total + Data memory Data memory Program memory Assembly code for: Data memory Program memory Assembly code for: total = 0 for i =1 to General-purpose ( software ) total = 0 for i =1 to Application-specific Single-purpose ( hardware )

17 Processor technology Processors vary in their customization for the problem at hand Desired functionality total = 0 for i = 1 to N loop total += M[i] end loop General-purpose processor Application-specific processor Single-purpose processor

18 General-purpose processors Programmable device used in a variety of applications Also known as microprocessor Features Program memory General datapath with large register file and general ALU User benefits Low time-to-market and NRE costs High flexibility Pentium the most well-known, but there are hundreds of others Controller Control logic and State register IR PC Program memory Assembly code for: total = 0 for i =1 to Datapath Register file General ALU Data memory

19 Single-purpose processors Digital circuit designed to execute exactly one program a.k.a. coprocessor, accelerator or peripheral Features Contains only the components needed to execute a single program No program memory Benefits Fast Low power Small size Controller Control logic State register Datapath index total + Data memory

20 Application-specific processors Programmable processor optimized for a particular class of applications having common characteristics Compromise between general-purpose and single-purpose processors Features Program memory Optimized datapath Special functional units Benefits Some flexibility, good performance, size and power Controller Control logic and State register IR PC Program memory Assembly code for: total = 0 for i =1 to Datapath Registers Custom ALU Data memory

21 IC technology The manner in which a digital (gate-level) implementation is mapped onto an IC IC: Integrated circuit, or chip IC technologies differ in their customization to a design IC s consist of numerous layers (perhaps 10 or more) IC technologies differ with respect to who builds each layer and when IC package IC source gate oxide channel drain Silicon substrate

22 IC technology Three types of IC technologies Full-custom/VLSI Semi-custom ASIC (gate array and standard cell) FPGAs (Field Programmable Gate Array)

23 Full-custom/VLSI All layers are optimized for an embedded system s particular digital implementation Placing transistors Sizing transistors Routing wires Benefits Excellent performance, small size, low power Drawbacks High NRE cost (e.g., $300k), long time-to-market Only used for timing/power critical or analog blocks

24 Semi-custom Lower layers are fully or partially built Designers are left with routing of wires and maybe placing some blocks Benefits Good performance, good size, less NRE cost than a full-custom implementation Drawbacks Still require weeks to months to develop De facto standard for digital circuits design

25 FPGAs All layers already exist Designers can purchase an IC Connections on the IC are programmed to implement desired functionality Benefits Low NRE costs, almost instant IC availability Drawbacks Bigger, expensive (perhaps $30 per unit), power hungry, slower De facto standard for prototyping of digital ICs

26 Universität Independence Dortmund of processor and IC Basic tradeoff technologies General vs. custom With respect to processor technology or IC technology The two technologies are independent General, providing improved: Generalpurpose processor ASIP Singlepurpose processor Customized, providing improved: Flexibility Maintainability NRE cost Time- to-prototype Time-to-market Cost (low volume) Power efficiency Performance Size Cost (high volume) FPGAs Semi-custom Full-custom Target technology of this course

27 What is an FPGA? It is primarily a semiconductor device that can be configured by the user (customer or designer) after the manufacturing process has been completed The term "field-programmable" means the device is programmed by the customer, not the manufacturer. Can be programmed using a logic circuit diagram or source code in VHDL or Verilog It offers partial re-configuration of a portion of design

28 What is an FPGA? An FPGA (Field Programmable Gate Array) is a reprogrammable chip which contains hundreds of thousands of logic gates that internally connects together to build complex digital circuitry. ZedBoard Xilinx ZYNQ FPGA

29 FPGAs vs. general-purpose Processors FPGAs excel at computing nondata dependent algorithms in parallel. Customizable data path and ALU allow very large amounts of data to be transferred and computed within several clock cycles. Despite lower clock frequencies, FPGA s can outperform conventional CPU s on certain data processing tasks

30 FPGAs vs. ASICs Advantages of FPGAs over ASICs: Shorter time to market Can be re-programmed in the field to fix bugs, and lower engineering costs Hardware can be developed on ordinary FPGAs, leading to a finalized version that can no longer be modified after the design has been decided

31 The reasons they may NOT fit your design are: Power consumption FPGAs fundamentally use a lot more power than ASICs Price they also fundamentally cost more Speed ASICs can still blow any FPGA away in speed although design techniques can help with this issue Density ASICs can still pack a lot more logic into a single chip than an FPGA

32 Architectural Features of FPGAs Common FPGA architecture involves: Configurable Logic Blocks (CLBs) I/O blocks Routing Paths Routing Paths

33 Xilinx Programmable Gate Arrays CLB - Configurable Logic Block 5-input, 1 output function or 2 4-input, 1 output functions optional register on outputs Built-in fast carry logic Can be used as memory Three types of routing direct general-purpose long lines of various lengths RAM-programmable can be reconfigured IOB IOB IOB IOB IOB IOB IOB CLB CLB Wiring Channels CLB CLB IOB

34 CLB Slice Structure Each slice contains two sets of the following: Four-input LUT Any 4-input logic function, or 16-bit x 1 sync RAM (SLICEM only) or 16-bit shift register (SLICEM only) Carry & Control Fast arithmetic logic Multiplier logic Multiplexer logic Storage element Latch or flip-flop Set and reset True or inverted inputs Sync. or Async. control

35 Details of One Virtex Slice

36 4-input function 3-input function; registered

37 Implement Some Larger Functions e.g. 9- input parity

38 LUT (Look-Up Table) Functionality x 1 x 2 x 3 x y x 1 x 2 x 3 x 4 LUT y x 1 x 2 x 3 x 4 x 1 x 2 x 3 x y Look-Up tables are primary elements for logic implementation Each LUT can implement any function of 4 inputs x 1 x 2 y y

39 Xilinx Routing The general architecture of Xilinx FPGAs consists of a two-dimensional array of programmable blocks, called Configurable Logic Blocks CLBs with horizontal and vertical routing channels between CLB s rows and columns.

40 Island Style Architecture

41 Connection boxes Flexibility of Connection, Fc = 2, Can A connect to B?

42 Switch Boxes Fs, defines for a wiring segment entering the S block the number of other wiring segments it can be connected to

43 Routings using C and S Boxes

44 Programming Technologies Fuse and anti-fuse fuse makes or breaks link between two wires one-time programmable Flash High density Process issues RAM-based (most commonly used) memory bit controls a switch that connects/disconnects two wires can be programmed and re-programmed easily (tested at factory)

45 CAD process to implement a circuit in an FPGA Logic optimization. Performs two-level or multi-level minimization of the Boolean equations to optimize area, delay, or a combination of both. Technology mapping. Transforms the Boolean equations into a circuit of FPGA logic blocks. This step also optimizes the total number of logic blocks required (area optimization) or the number of logic blocks in time-critical paths (delay optimization).

46 CAD process to implement a circuit in an FPGA Placement Selects the specific location for each logic block in the FPGA, while trying to minimize the total length of interconnect required. Routing Connects the available FPGA s routing resources1 with the logic blocks distributed inside the FPGA by the placement tool, carrying signals from where they are generated to where they are used.

47 Summary Embedded systems are everywhere Key challenge: optimization of design metrics Design metrics compete with one another A unified view of hardware and software is necessary to improve productivity Three key technologies Processor: general-purpose, application-specific, single-purpose Design: Compilation/synthesis, libraries/ip, test/verification IC: Full-custom, semi-custom, FPGAs FPGA architectural features main technology target of this course