Design Metrics. A couple of especially important metrics: Time to market Total cost (NRE + unit cost) Performance (speed latency and throughput)

Transcription

1 Design Metrics A couple of especially important metrics: Time to market Total cost (NRE + unit cost) Performance (speed latency and throughput) 1

2 Design Metrics A couple of especially important metrics: Time to market For many embedded systems (especially those sold commercially) there is a market window Missing the market window by just a little time, can mean losing a lot of money 2

3 Design Metrics Time to market Revenue over lifetime of product (very simplified) 3

4 Design Metrics Time to market Revenue after missing market window by one month 4

5 Design Metrics A couple of especially important metrics: Time to market Total cost (NRE + unit cost) The total cost of a system is combination of the Non-Recurring Engineering (up front work) and the cost of the parts and labor that goes into each system 5

6 Design Metrics A couple of especially important metrics: Time to market Total cost (NRE + unit cost) Performance (speed latency and throughput) Latency is the time it takes a task from beginning to end Throughput is the number of tasks which can be done in a given amount of time 6

7 Design Metrics Total cost (NRE + unit cost) Example: A certain MP3 player cost $50,000 to design, and when manufactured, costs $40 each. If 10,000 units were sold, the total cost of each unit is: $45. $50,000/10,000units = $5/unit $40 + $5 = $45 7

8 Processor technology What is a processor? The architecture of the computation engine used to implement a system s desired functionality Processor does not have to be programmable Processor not equal to general-purpose processor like it was in CS 61 It could be an Intel Itanium, the chip inside an optical mouse that determines where it is moving, or the chip inside a simple digital watch Basically, anything that computes values based on some input and/or memory. 8

9 Processor technology Processors vary in their customization for the problem at hand Desired functionality total = 0 for i = 1 to N loop total += M[i] end loop Generalpurpose processor Application-specific processor Singlepurpose processor 9

10 General-purpose processors Programmable device used in a variety of applications Also known as microprocessor Features Program memory General datapath with large register file and general ALU User benefits Low time-to-market and NRE costs High flexibility Pentium the most well-known, but there are hundreds of others Controller Control logic and State register IR PC Program memory Assembly code for: total = 0 for i =1 to Datapath Register file General ALU Data memory 10

11 Single-purpose processors Digital circuit designed to execute exactly one program a.k.a. coprocessor, accelerator or peripheral Features Contains only the components needed to execute a single program No program memory Benefits Fast Low power Small size Controller Control logic State register Datapath index total + Data memory 11

12 Application-specific processors Programmable processor optimized for a particular class of applications having common characteristics Compromise between general-purpose and single-purpose processors Features Program memory Optimized datapath Special functional units Benefits Some flexibility, good performance, size and power Controller Control logic and State register IR PC Program memory Assembly code for: total = 0 for i =1 to Datapath Registers Custom ALU Data memory 12

13 Overview of Processors General ( software ) Controller Control logic and State register IR PC Datapath Register file General ALU App. Specific Controller Control logic and State register IR PC Datapath Registers Custom ALU Single-purpose ( hardware ) Controller Control logic State register Datapath index total + Program memory Assembly code for: total = 0 for i =1 to Data memory Program memory Assembly code for: total = 0 for i =1 to Data memory Data memory 13

14 IC technology The manner in which a digital (gate-level) design gets implemented Basically, you have a design, which is an architecture, or model of how things are going to be computed and you want to implement it. 14

15 IC technology Three types Design Methods for building your IC Full-custom Semi-custom (gate array and standard cell) PLD (Programmable Logic Device) 15

16 Full-custom All layers are optimized for an embedded system s particular digital implementation Placing transistors Sizing transistors Routing wires Benefits Excellent performance, smallest size, low power Drawbacks High Non-Recurring Engineering (NRE) cost (e.g., $300k), long time-to-market, high risk 16

17 Gate Array Lower layers are fully or partially built Designers are left with routing of wires and maybe placing some blocks Benefits Good performance, good size, less NRE cost than a full-custom implementation (perhaps $10k to $100k) Drawbacks Still require weeks to months to develop 17

18 Standard Cell Instead of designing the actual silicon, the designer uses pre-built blocks that have already been tested and proven. Benefits Good performance, good size, less NRE cost than a full-custom implementation (perhaps $10k to $100k) Drawbacks Still require weeks to months to develop 18

19 PLD (Programmable Logic Device) All layers already exist Designers can purchase an IC Connections on the IC are either created or destroyed to implement desired functionality Field-Programmable Gate Array (FPGA) very popular Benefits Low NRE costs, almost instant IC availability Drawbacks Bigger, expensive (perhaps $30 per unit), power hungry, slower 19

20 Independence of processor and IC technologies Basic tradeoff General vs. custom With respect to processor technology or IC technology The two technologies are independent General, providing improved: Generalpurpose processor ASIP Singlepurpose processor Customized, providing improved: Flexibility Maintainability NRE cost Time- to-prototype Time-to-market Cost (low volume) Power efficiency Performance Size Cost (high volume) PLD Semi-custom Full-custom 20

21 Moore s law The most important trend in embedded systems Predicted in 1965 by Intel co-founder Gordon Moore IC transistor capacity has doubled roughly every 18 months for the past several decades 10,000 1,000 Logic transistors per chip (in millions) Note: logarithmic scale

22 IC technology This is a very basic illustration of a gate gate IC package IC source oxide channel drain Silicon substrate This is what is growing (or staying the same) This is what is shrinking (a LOT) 22

23 Moore s law Wow This growth rate is hard to imagine, most people underestimate How many ancestors do you have from 20 generations ago i.e., roughly how many people alive in the 1500 s did it take to make you? 2 20 = more than 1 million people (This underestimation is the key to pyramid schemes!) 23

24 Graphical illustration of Moore s law ,000 transistors 150,000,000 transistors Leading edge chip in 1981 Leading edge chip in 2002 Something that doubles frequently grows more quickly than most people realize! A 2002 chip can hold about 15, chips inside itself Intel Itanium: 325 Million Transistors! 24

25 Design Technology The manner in which we convert our concept of desired system functionality into an implementation Compilation: Takes a high level language and translates it into assembly code Synthesis: Takes a high level language and translates it into gates To help us speed things up we have: Libraries of already made functions IP (Intellectual Property) blocks of hardware 25

26 Design Technology Test and Verification are also more automated now to speed the design process. Some new trends that are helping speed the design process: Well designed standards that help designers move between different tools Tools that can synthesize to hardware or compile to assembly using the same language Simulators that can simulate software and hardware at the same time 26

27 Design productivity exponential increase 100,000 10,000 1, Designer Productivity In Thousands of Transistors/Month 1981 Exponential increase over the past few decades 27

28 Design productivity gap While designer productivity has grown at an impressive rate over the past decades, the rate of improvement has not kept pace with chip capacity 10, ,000 1,000 10,000 Logic transistors per chip (in millions) IC capacity Gap Productivity (K) Trans./Staff-Mo Productivity

29 Design productivity gap 1981 leading edge chip required 100 designer months 10,000 transistors / 100 transistors/month 2002 leading edge chip requires 30,000 designer months 150,000,000 / 5000 transistors/month Designer cost increase from $1M to $300M 10, ,000 1,000 10,000 Logic transistors per chip (in millions) IC capacity Gap Productivity (K) Trans./Staff-Mo productivity

30 The mythical man-month The situation is even worse than the productivity gap indicates In theory, adding designers to team reduces project completion time In reality, productivity per designer decreases due to complexities of team management and communication In the software community, known as the mythical man-month (Brooks 1975) At some point, can actually lengthen project completion time! ( Too many cooks ) 1M transistors, 1 designer=5000 trans/month Each additional designer reduces for 100 trans/month So 2 designers produce 4900 trans/month each Team 23 Months until completion Each Individual s Contribution Number of designers 30

31 Here is a different look at the same problem: Project size (in KLOC) Best programmer (months/kloc) Worst (months/kloc) KLOC = 1000 lines of code source: The Embedded Muse ; 31

32 In Class Exercise In Class Exercise (ICE not to be confused with Vanilla ) It will count as part of your score on the next homework, but unlike homework, you get credit if you are at least close. 32

33 ICE Write a general equation that describes one engineers productivity if each time an engineer is added to the project their productivity is 5% less. Use the variables: P o = Original productivity P n = New productivity n = number of engineers on project So, to check your equation, if P o = 100 For n = 1, P n = 100; for n = 2, P n = 95; for n = 3, P n =

34 ICE If a digital camera takes the following steps Acquire picture: 100 ms Convert picture: 300 ms Write picture to memory: 1 s What is the latency? What is the throughput assuming it cannot take a second picture until it is done writing the first one to memory? In VHDL, what is the entity for? 34

35 Summary of Chapter 1 Embedded systems are everywhere Key challenge: optimization of design metrics Design metrics compete with one another A unified view of hardware and software is necessary to improve productivity Three key technologies Processor: general-purpose, application-specific, single-purpose IC: Full-custom, semi-custom, PLD Design: Compilation/synthesis, libraries/ip, test/verification 35

36 To do before Tuesday Look for homework on web (will be due next Tuesday) Make sure you have signed up for list 36