Electronic Instrumentation

Transcription

1 Electronic Instrumentation Guide GD Introduction to Digitizers Rev.2 September 2011 The CAEN Digitizers are Platform independent instruments housing high speed (up to 5 GS/s) multichannel flash ADC, with local memory and FPGA for real time data processing. Available in different form factors: VME, NIM, and Desktop Up to 14 bit resolution VME64X, Optical Link, USB 2.0, Interfaces available Memory buffer: up to 58MS/ch (max events) Multi board synchronization and trigger distribution FPGA fimware for Digital Pulse Processing Software Tools for Windows and Linux C CAEN Waveform Digitizers feature Digital Pulse Processing (DPP) firmware for physics applications. DPP algorithms are implemented in FPGA and can be reprogrammed at any time. In one single module you have the complete information and the capability to extract all the quantities of interest. Guide GD2080 rev September DGT00 GXXX

2 Introduction CAEN has developed a complete family of digitizers that consists of several models differing in sampling frequency, resolution, number of channels, form factor, memory size and other parameters. The following table lists all models currently available. In parallel with the hardware development, CAEN has made a big effort in developing algorithms for the Digital Pulse Processing (DPP); you can install a DPP algorithm on the FPGA of the digitizer (firmware upgrade), run it on line and implement new acquisition methods that go beyond the simple waveform recording. A digitizer with DPP becomes a new instrument that represents a fully digital replacement of most traditional modules such as Multi and Single Channel Analyzers, QDCs, TDCs, Discriminators and many others.. The purpose of this document is to provide an overview on the digitizers, explain the main characteristics and the different operating modes and present the available options in terms of hardware, firmware and software in order to guide you in your choice.. VME NIM Desktop Digitizers Selection Table Model (1) Form Factor N. of ch. (4) Max. Sampling Frequency (MS/s) N. of Bits Input Dynamic Range (Vpp) (4) Single Ended / Differential Input Bandwidth (MHz) Memory (MS/ch) (4) DPP firmware (5) x724 VME SE / D Desktop/NIM SE PHA x720 VME SE / D Desktop/NIM SE CI, PSD x721 VME SE / D no x731 VME SE / D no x730 VME SE / D Desktop/NIM SE PSD x751 VME SE / D Desktop/NIM SE PSD x761 VME SE / D Desktop/NIM SE no x740 VME Desktop/NIM SE no x742 VME Desktop/NIM SE no All models Analog Input Trigger Synchronization Memory FPGA Readout Other features Positive, negative and bipolar inputs Daisy Chain (VME only) or one-to-many clock distribution Clock Cable delay compensation Independent read/write access Ability to do on-line Digital Pulse Processing (DPP) for pulse shaping and height analysis, digital charge integration, gamma-neutron discrimination, timing, segmented detectors, etc Independent read/write access place at lower speed (dead-time) size 1/ size 2 denotes different options (5) DPP-PHA: Pulse Height Analysis (Trapezoidal Filters), DPP-CI: Charge Integration (digital QDC), DPP-PSD: Pulse Shape Discrimination 2 GD2080 Introduction to Digitizer

3 Principle of Operation The basic operating mode of a digitizer is essentially the same as a digital oscilloscope: the analog signal, after an input stage of signal conditioning mainly used to adapt the dynamic range, is sampled by a flash ADC, whose output, i.e. the stream of digital samples, is continuously read by an FPGA and stored in a circular memory buffer of a programmable size. At the arrival of the trigger, the buffer is frozen and made available for the readout while the acquisition can continue in a new buffer.. However, there are few important differences between a digitizer and a commercial digital oscilloscope:: 1 The digitizers allow for dead timeless acquisition. In fact, unlike most oscilloscopes, they have the ability to accept two consecutive triggers very close to each other (1) thanks to the multi buffer memory management: there is no dead time between an acquisition window and the next one. It is even possible to accept two trigger for which the acquisition windows overlap. The dead timeless acquisition is a very important feature, especially in the case of events randomly distributed in time (in nuclear physics this is typically a Poissonian distribution), so that two of them, even at low rate, can occur at very short distance but you still want to capture both. (1) Except for 742 Series. 2 In the digitizers, all the channels are allowed to generate triggers independently. The individual trigger can be used locally by the channel that generated it (independent triggering) or can participate to the assertion of a global trigger for all the channels in the board, as well as to generate a pulse on the TRG OUT. 3 The digitizers are designed for scalability. It is possible to synchronize several boards to make an acquisition system with a theoretically unlimited number of channels. Board synchronization consists of distributing a common clock reference on which all the ADC sampling clock are locked, aligning the acquisition time base of each board in order to have events with correlated time stamps, distributing the channel auto triggers and the global triggers according to a programmable trigger logic in order to implement coincidences, neighbour triggering and other acquisition criteria and topologies. 4 The High bandwidth data readout links. Usually oscilloscopes do not have any communication channel (data is only displayed) or, if they have, most probably it has a fairly low bandwidth (GPIB, Ethernet, etc ); conversely, the digitizers are designed to provide high rate data transfer to a computer or an external data processing unit. CAEN digitizers have a minimum bandwidth of 30MB/s in the case of the USB, about 80MB/s with CONET port up to more than 120MB/s for the VME with 2eSST. 5 On Line data processing. The acquisition in the digitizers is based on FPGAs. These are programmable devices with the ability to manage the ADC sample stream and implement on line digital algorithms for signal processing. This feature is of fundamental importance for the implementation of systems that are not simply based on the acquisition, storage and readout of waveforms (raw data) but rather on the calculation of certain quantities of interest (e.g. the charge associated with a pulse, the pulse height, the leading edge, the baseline, the arrival time and other parameters) and the storage and transfer of just the final results, with clear advantages in terms of readout bandwidth. PRE Dead timeless acquisition Individual pulse self trigger Multi board synchronization for system scalability High bandwidth data readout links On line data processing (FPGA or DSP) ACQUISITION WINDOW ANALOG INPUTs FIXED GAIN AMPLIFIER + POST TRIGGER DAUGTHER BOARDS ADC DAC n CHANNELS SAMPLING CLOCK FPGA (AMC) SRAM MEMORY MOTHER BOARD LOCAL BUS GLOBAL TRG SYNC SELF TRG Memory Buffer FPGA (VME) TIME STAMP S[0] S[1] S[2] S[3] S[n-1] CAEN Digitizer block diagram. - The mother board defines the form factor; it contains one FPGA for the readout interfaces and the services - The daughter board defines the type of digitizer; it contains the input amplifiers, the ADCs, the FPGA for the data processing and the memories PLL DAC INT. OSCILL. Time Sampling Clock CLK-OUT CLK-IN VME/USB CONET TRG-IN SYNC-IN TRG-OUT I/Os MONITOR GD2080 Introduction to Digitizer 3

4 Digital Pulse Processing (DPP) for physics and biomedical applications In recent years, thanks to the availability on the market of faster and more precise ADC chips, applications in the field of nuclear physics (or related fields) have made large use of data acquisition systems based on digitizers. Compared to the traditional analog acquisition systems, in which the A/D conversion is performed at the end of the chain, the new systems have reversed that approach: the conversion to digital is performed as close as possible to the source of the signal (output of the detector or preamplifier). However, systems based on digitizers have a basic fundamental problem: the extremely huge amount of data to manage. As stated above, high trigger rate, multitude of channels and high readout bandwidth are the features that characterize the digitizers when compared to the digital oscilloscope; at the same time, these features lead to large data streams. For this reason it is important to have an FPGA with the ability to do on line data processing and to extract from the raw samples sequence only One single board can do the job of several analog modules Full information preserved Reduction in size, cabling, power consumption and cost per channel High reliability and reproducibility Flexibility (different digital algorithms can be designed and loaded at any time into the same hardware) DETECTOR DIGITIZER ENERGY COMPUTER IN A/D SAMPLES DPP TIMING COUNTING SHAPE INTERF VERY HIGH DATA THROUGHPUT the specific parameters necessary to the acquisition. For this purpose, special algorithms can be applied to the digital samples coming from the ADC for the extraction of the quantities of interest and the reduction of the data; the relevant digital filters are, in most cases, very similar (at least from a functional point of view) to the old and familiar analog circuits, such as timing filters, shapers, CFDs, baseline restorers, etc.. The benefits of the digital approach are great stability and reproducibility, ability to reprogram and tailor the algorithms to the application, ability to preserve the information of the signal along the entire acquisition chain, flexibility, better correction of unwanted effect such as baseline fluctuation, pile up, ballistic deficit, etc All this in one board. To better understand the principles of operation of the DPP, let s take a practical example: suppose you have a detector for spectroscopy (scintillator and phototube) which generates pulses with a duration of about 100 ns. We can utilize an algorithm that permits you to extract the pulse charge on line in the FPGA of the digitizer (i.e. continuously and in real time); to do this, we need to calculate the baseline by means of a moving average filter, detect the pulses when the signal exceeds a certain threshold 60 Co Counts Co Counts / ndf / 11 Constant Mean Sigma Energy [kev] 60 Co gamma spectrum acquired with a HPGe and DPP TF at University of Palermo. In the box, a least squares fit of the 1.33 MeV photopeak; a FWHM < 2 kev was obtained Energy [kev] respect to the baseline (trigger), implement a digital delay line in order to compensate the trigger latency and finally sum a certain number of samples within the integration gate after having subtracted the baseline from them. The charge thus obtained, together with a time stamp that identifies the position of the pulse, is the only information stored in memory for that event, resulting in a significant reduction of the data, such as 8 bytes per event, instead of saving the portion of the waveform that contains the pulse and a piece of baseline, which could consist of tens or hundreds of samples. 0 4 GD2080 Introduction to Digitizer

5 In this example the algorithm replaces in digital form the same acquisition chain which traditionally consisted of a discriminator, a QDC and an analog delay line to fit the pulse within the gate coming from the discriminator. Other examples of algorithms implemented on CAEN s digitizer (generically called DPP, or Digital Pulse 0.5 Processing) are those for: PSD 2D plot of Energy versus PSD using an AmBe source at 2 kcounts/s; the two lobes of the neutrons and gammas are well separated. The data were acquired at Duke University (TUNL). Furthermore, CAEN is willing to collaborate with customers to create other types of firmware and algorithms for specific applications. (1) Pulse Height Analysis using trapezoidal filters, algorithms for the gamma neutron discrimination realized by means of Pulse Shape Analysis, Zero suppression (removal of parts of signal that do not contain pertinent information), (2) Implementation of digital timing filter or digital constant fraction discriminator to determine precise timing information, (3) Mixed acquisition modes in which the quantities of interest calculated by the DPP (charge, height, etc...) are saved together with a short but significant chunk of waveform (e.g. the rising edge) to allow for off line analysis, etc.. The digitizers are available with the standard version of the firmware that implement only the waveform acquisition mode (oscilloscope mode) or, in certain cases, some techniques of zero suppression. The firmware that implements a certain DPP algorithm is provided separately as an ordering option. The user can download any of this DPP from our Web site, install it on the digitizer that supports it and try it for free, with the only limitation that the acquisition may not last more than 30 minutes, after which you must perform a power cycle (Time Bomb). Only after purchasing each firmware and its relevant license (that is installed on the card in the form of electronic key) the time bomb will be eliminated. The table below shows all types of DPP and the relevant digitizers that support them. For more detailed information on the DPP algorithms and firmware, please refer to the White Paper WP2081. Name Model Detectors (typ.) Notes DPP PHA x724 Hi res. Si, Ge Digital Pulse Processing for Pulse Height Analysis DPP CI x720 PMT, SiPM Digital Pulse Processing for Charge Integration DPP PSD x720, x751 Organic liquid Digital Pulse Processing for Pulse Shape Discrimination Trigger and synchronization in multi board systems In most cases, the applications that require the use of several channels, need to synchronize the acquisition across different digitizers, this is performed according to the following points: 1 Distribution of a common clock reference in order to have the same sampling clock on all the ADC channels. CAEN s digitizers feature a programmable PLL able to generate the sampling clocks locked to an external clock input (usually at lower frequency) whose distribution can be done in parallel from a common source, using a fan out, as well as through an inout daisy chain with the ability to use the first board as a clock master and to compensate for delays in the cables by means of a programmable phase shift. The daisy chain mode is available only in the VME models. 2 Alignment of the time stamp associated with the triggers to allow off line reconstruction of the events read from different boards. This can be done by using a dedicated SYNC input as well as through the TRG IN, TRG OUT daisy chain by issuing a first pulse acting as a start of acquisition; this pulse doesn t trigger the channels. After that, the TRG IN and TRG OUT start their normal operating mode that is to receive and send triggers /8 Cs (56 kevee) 1/4 Cs (112 kevee) 1/2 Cs (224 kevee) 1 Cs (447 kevee) Energy (kevee) 2 Cs (897 kevee) Neutron Gammas Distribution of the triggers from channel to channel and from board to board, according to a certain trigger logic. Each card has different sources of trigger: external TRG IN from the front panel, software trigger and channel self triggers. All these triggers can be combined in order to make coincidences, majorities, global triggers and other functions. It is worth noticing that the DPP firmware, compared to the standard version, gives important advantages also in terms of trigger managing: first of all, the digital filters are able to detect the input pulses and generate triggers even in the presence of noise, baseline fluctuation and pile up that make inefficient the simple trigger mechanism based on a fixed threshold. Furthermore, with the DPP, the channels operate independently and it is possible to implement the trigger propagation on a channel to channel basis, also including channels on different boards. This option is particularly useful in the segmented detectors where the detection of one pulse in a certain segment requires the acquisition of the signals also in the neighbour segments in order to calculate the exact position in which the particle hit GD2080 Introduction to Digitizer 5

6 Software CAEN provides drivers for all the different types of physical communication channels (USB 2.0 or the proprietary CONET Optical Link, managed by the A2818 PCI card or A3818 PCIe cards or the VME bus accessed by the V1718 and V2718 bridges), a set of C and LabView libraries, demo applications and utilities. Windows and Linux are both supported. More specifically, the available software is the following: CAENComm library Contains the basic functions for access to hardware; the aim of this library is to provide a unique interface to the higher layers regardless the type of physical communication channel. Note: for VME access, CAENcomm is based on CAEN s VME bridges V1718 (USB to VME) and V2718 (PCI to VME). In the case of third part bridges or SBCs, the user must provide the functions contained in the CAENcomm library for to the relevant platform. CAENDigitizer library WaveDump Contains the functions to program the digitizers, manage the acquisition, execute the readout, unpack the data, send triggers, etc... Is a Console application that lets you program the digitizer (according to a text configuration file that contains a list of parameters and instructions), to start the acquisition, read the data, display the readout and trigger rate, apply some post processing (such as FFT and amplitude histogram), save data to a file and also plot the waveforms using the external plotting tool gnuplot that is available on internet for free. This program is quite basic and has no graphics but it is an excellent example of C code that demonstrates the use of libraries and methods for an efficient readout and data analysis. The user who intends to write the software on their own is suggested to start with this demo and modify it according to his or her needs. For more details please see the WaveDump User Manul and Quick Start Guide (Doc nr.: UM2091, GD2084 ). CAENScope It s a fully graphical program that implements a simple oscilloscope: you can see the waveforms, set the trigger thresholds, change the scales of time and amplitude, perform simple mathematical operations between the channels, save data to file and other operations. CAENscope is provided as an executable file; the source codes are not distributed. NOTE: CAENScope does not work with digitizers running DPP firmware. For more details please see the CAENScope Quick Start Guide GD GD2080 Introduction to Digitizer

7 CAENUpgrader It s a tool that allows the user to update the firmware of the digitizers, change the PLL settings (i.e. set the ADC sampling frequency, enable the clock output, etc...), load, when requested, the license for the pay firmware (for example, the DPP CI, DPP PHA and DPP PSD) and other utilities. For more details please see the CAENUpgrader Quick Start Guide GD2512. DPP Control Software It s an application that manages the acquisition in the digitizers which have DPP firmware installed on it. The program consist of different parts: there is a GUI whose purpose is to set all the parameters for the DPP and for the acquisition; the GUI generates a textual configuration file that contains all the parameters. This file is read by the Acquisition Engine, which is a C console application that programs the digitizer according to the parameters, starts the acquisition and manage the data readout. The data, that can be waveforms, time stamps, energies or other quantities of interest, can be saved to output files or plotted using gnuplot as an external plotting tool, exactly like in WaveDump. Name Software Notes DPP PHA DPP PHA Control Software works only with x724 models and DPP PHA DPP CI DPP CI Control Software works only with x720 models and DPP CI DPP PSD DPP PSD Control Software works only with x720 OR X751 models and DPP PSD Applications The great versatility of the DPP algorithms allowed CAEN to develop a new product dedicated to the gamma spectrometry, the DT5780 Digital MCA. This module is a compact, stand alone digital solution for Pulse Height Analysis based on DPP PHA firmware. It houses a two channel, 14 bit, 100 MS / s digitizer (see Model DT5724A), two HV channels able to supply a bias voltage up to + 5 kv, 300 µa and two connectors for the power supply of preamplifiers and detector temperature readout. GD2080 Introduction to Digitizer 7

8 Digitizers Ordering Codes (1) Model Ordering Code Description Single Ended / Differential Input SRAM Memory Sample/ch AMC FPGA (*) Form factor X724 WDT5724XAAAA SE Desktop WDT5724AXAAA SE Desktop WN6724XAAAAA SE NIM WN6724AXAAAA SE NIM WV1724XAAAAA SE 6U-VME64 WV1724BXAAAA SE 6U-VME64 WV1724CXAAAA DIFF 6U-VME64 WV1724DXAAAA DIFF 6U-VME64 WV1724EXAAAA SE 6U-VME64 WV1724FXAAAA DIFF 6U-VME64 WV1724GXAAAA SE 6U-VME64 WVX1724XAAAA SE 6U-VME64X WVX1724BXAAA SE 6U-VME64X WVX1724CXAAA DIFF 6U-VME64X WVX1724DXAAA DIFF 6U-VME64X WVX1724EXAAA SE 6U-VME64X WVX1724FXAAA DIFF 6U-VME64X X720 WDT5720XAAAA SE Desktop WDT5720AXAAA SE Desktop WDT5720BXAAA SE Desktop WDT5720CXAAA SE Desktop WN6720XAAAAA SE NIM WN6720AXAAAA SE NIM WN6720BXAAAA SE NIM WN6720CXAAAA SE NIM WV1720XAAAAA SE 6U-VME64 WV1720BXAAAA SE 6U-VME64 WV1720CXAAAA DIFF 6U-VME64 WV1720DXAAAA DIFF 6U-VME64 WV1720EXAAAA SE 6U-VME64 WV1720FXAAAA DIFF 6U-VME64 WVX1720XAAAA SE 6U-VME64X WVX1720BXAAA SE 6U-VME64X WVX1720CXAAA DIFF 6U-VME64X WVX1720DXAAA DIFF 6U-VME64X WVX1720EXAAA SE 6U-VME64X WVX1720FXAAA DIFF 6U-VME64X X721 WV1721BXAAAA SE 6U-VME64 WV1721XAAAAA DIFF 6U-VME64 WVX1721XAAAA SE 6U-VME64X WVX1721BXAAA DIFF 6U-VME64X X730 WDT5730AXAAA COMING SOON SE Desktop WDT5730XAAAA COMING SOON SE Desktop WN6730AXAAAA COMING SOON SE NIM WN6730XAAAAA COMING SOON SE NIM WV1730BXAAAA COMING SOON SE 6U-VME64 WV1730XAAAAA COMING SOON SE 6U-VME64 WVX1730BXAAA COMING SOON SE 6U-VME64X WVX1730XAAAA COMING SOON SE 6U-VME64X X731 WV1731XAAAAA SE 6U-VME64 WV1731BXAAAA DIFF 6U-VME64 WVX1731XAAAA SE 6U-VME64X WVX1731BXAAA DIFF 6U-VME64X X740 WDT5740XAAAA SE Desktop WDT5740CXAAA SE Desktop WN6740XAAAAA SE NIM WN6740CXAAAA SE NIM WV1740XAAAAA SE 6U-VME64 WV1740AXAAAA SE 6U-VME64 WV1740BXAAAA SE 6U-VME64 WV1740CXAAAA SE 6U-VME64 WVX1740XAAAA SE 6U-VME64X WVX1740AXAAA SE 6U-VME64X WVX1740BXAAA SE 6U-VME64X WVX1740CXAAA SE 6U-VME64X 8 GD2080 Introduction to Digitizer

9 Digitizers Ordering Codes (2) Model Ordering Code Description Single Ended / Differential Input SRAM Memory Sample/ch AMC FPGA (*) X761 WDT5761XAAAA COMING SOON SE Desktop WN6761XAAAAA COMING SOON SE NIM WV1761XAAAAA COMING SOON SE 6U-VME64 WV1761BXAAAA COMING SOON DIFF 6U-VME64 WV1761CXAAAA COMING SOON SE 6U-VME64 WVX1761CXAAA COMING SOON SE 6U-VME64X WVX1761BXAAA COMING SOON DIFF 6U-VME64X WVX1761CXAAA COMING SOON SE 6U-VME64X X751 WDT5751XAAAA SE Desktop WN6751XAAAAA SE NIM WV1751XAAAAA SE 6U-VME64 WV1751BXAAAA DIFF 6U-VME64 WV1751CXAAAA SE 6U-VME64 WVX1751XAAAA SE 6U-VME64X WVX1751BXAAA DIFF 6U-VME64X WVX1751CXAAA SE 6U-VME64X X742 WDT5742XAAAA SE Desktop WDT5742BXAAA SE Desktop WN6742XAAAAA SE NIM WN6742BXAAAA SE NIM WV1742XAAAAA SE 6U-VME64 WV1742BXAAAA SE 6U-VME64 WVX1742XAAAA SE 6U-VME64X (*) AMC: ADC & Memory controller FPGA. ALTERA models available: EP1C4: Cyclone (4.000 LEs), EP1C20: Cyclone ( LEs), EP3C16: Cyclone III ( LEs). WVX1742BXAAA SE 6U-VME64X Form factor Code Description WA2818XAAAAA A WA3818AXAAAA B WA3818BXAAAA C WA3818CXAAAA WAI2703XAAAA WAI2705XAAAA WAI2720XAAAA WAI2730XAAAA WAI2740XAAAA WAY2705XAAAA WAY2720XAAAA WAY2730XAAAA WA654XAAAAAA WA654K4AAAAA WA654K8AAAAA WA659XAAAAAA WA659K4AAAAA WA659K8AAAAA WA746BXAAAAA WA746DXAAAAA WA746EXAAAAA Customizations Code WPERS WPERS WPERS Description GD2080 Introduction to Digitizer 9

10 Digitizers Accessories A2818 PCI CONET Controller The A2818 is a 32 bit 33 MHz PCI card, which allows the control, through a standard PC, of up to 8 CAEN Optical Slave Cards (CAEN VME Bridge or Digitizers). The communication protocols used are the CONET1 or the new CONET2 Optical fiber cables are used as physical transmission line (see AI2700 Optical Fiber Series). A3818 PCI Express CONET2 Controller The A3818 is a PCI Express card that can plug into any x8/x16 PC PCI Express slot (1.1 or higher), which allows the control up to 4 CONET2 independent networks (each network can be made of up to 8 CONET2 slaves).the communication path uses optical fiber cables as physical transmission line (see AI2700 Optical Fiber Series). A654 MCX to LEMO Cable Adapters The A654 adapter allows to adapt the MCX input connectors (used on CAEN Waveform digitizers) into LEMO 00 connectors. CAEN provides kits with 1, 4, 8 cable adapters. A746B 64 Channel Adapter for LEMO connector The A746B allows to adapt one ERNI SMC high density flat connector (used on V1740 and VX1740) into 64 LEMO connectors. A659 MCX to BNC Cable Adapters The A654 adapter allows to adapt the MCX input connectors (used on CAEN Waveform digitizers) into LEMO 00 connectors. CAEN provides kits with 1, 4, 8 cable adapters. A746D 32 Channel Adapter for LEMO connector The A746D allows to adapt one ERNI SMC high density flat connector (used on N6740) into 32 LEMO connectors. A746E 32 Channel Adapter for LEMO connector The A746E allows to adapt one ERNI SMC high density flat connector (used on DT5740) into 32 LEMO connectors. AI2700 Optical Fiber Series AI2700 series are multimode 62.5/125µm cables with LC connectors on both sides used in CONET1/CONET2 Optical Link Networks CAEN SpA is acknowledged as the only company in the world providing a complete range of High/Low Voltage Power Supply systems and Front End/Data Acquisition modules which meet IEEE Standards for Nuclear and Particle Physics. Extensive Research and Development capabilities have allowed CAEN SpA to play an important, long term role in this field. Our activities have always been at the forefront of technology, thanks to years of intensive collaborations with the most important Research Centres of the world. Our products appeal to a wide range of customers including engineers, scientists and technical professionals who all trust them to help achieve their goals faster and more effectively. CAEN S.p.A. CAEN GmbH CAEN Technologies, Inc. Via Vetraia, 11 Eckehardweg Bay Street Suite 2 C Viareggio Solingen Staten Island, NY Italy Germany USA Tel Tel Tel Fax Mobile +49(0) Fax info@caen.it Fax info@caentechnologies.com info@caen de.com de.com CAEN Tools for Discovery Electronic Instrumentation Guide GD2080 Introduction to Digitizers rev September DGT00 GXXX Copyright CAEN SpA. All rights reserved. Information in this publication supersedes all earlier versions. Specifications subject to change without notice. 10 GD2080 Introduction to Digitizer