SPI - Serial Peripheral Interface

Transcription

1 SPI - Serial Peripheral Interface Boards with SPI: ZWERG11A ZWERG11plus IC11B ZWERG332 SCOTTY332 MEGA332 DIL2106 LC2194 Preface With this article, the possibilities of serial communication with peripheral devices via SPI (Serial Peripheral Interface) will be discussed. More and more serial bus systems are preferred instead of a parallel bus, because of the simpler wiring. As the efficiency of serial buses increases, the speed advantage of the parallel data transmission gets less important. The clock frequencies of SPI devices can go up to some Megahertz and more. There are a lot of application where a serial transmission is perfectly sufficient. The usage of SPI is not limited to the measuring area, also in the audio field this type of transmission is used. The SPI (this name was created by Motorola) is also known as Microwire, trade mark of National Semiconductor. Both have the same functionality. There are also the extensions QSPI (Queued Serial Peripheral Interface) and MicrowirePLUS. The popularity of other serial bus system like I 2 C, CAN bus or USB shows, that serial busses get used more and more. Below is a list of SPI devices. However this list neither claims to be complete nor is the availablability of the listed components guaranteed. In addition there is a list of manufacturers with the type of SPI components they produce. Martin Schwerdtfeger, 06/2000 The Principle The Serial Peripheral Interface is used primarily for a synchronous serial communication of host processor and peripherals. However, a connection of two processors via SPI is just as well possible and is described at the end of the chapter. In the standard configuration for a slave device (see illustration 1), two control and two data lines are used. The data output SDO serves on the one hand the reading back of data, offers however also the possibility to cascade several devices. The data output of the preceding device then forms the data input for the next IC. 1 of 21 18/02/

2 Illustration 1: SPI slave There is a MASTER and a SLAVE mode. The MASTER device provides the clock signal and determines the state of the chip select lines, i.e. it activates the SLAVE it wants to communicate with. CS and SCKL are therefore outputs. The SLAVE device receives the clock and chip select from the MASTER, CS and SCKL are therefore inputs. This means there is one master, while the number of slaves is only limited by the number of chip selects. A SPI device can be a simple shift register up to an independent subsystem. The basic principle of a shift register is always present. Command codes as well as data values are serially transferred, pumped into a shift register and are then internally available for parallel processing. Here we already see an important point, that must be considered in the philosophy of SPI bus systems: The length of the shift registers is not fixed, but can differ from device to device. Normally the shift registers are or integral multiples of it. Of course there also exist shift registers with an odd number of bits. For example two cascaded 9Bit s can store 1 data. If a SPI device is not selected, its data output goes into a high-impedance state (hi-z), so that it does not interfere with the currently activated devices. When cascading several SPI devices, they are treated as one slave and therefore connected to the same chip select. Thus there are two meaningful types of connection of master and slave devices. illustration 2 shows the type of connection for cascading several devices. 2 of 21 18/02/

3 Illustration 2: Cascading several SPI devices In illustration 2 the cascaded devices are evidently looked at as one larger device and receive therefore the same chip select. The data output of the preceding device is tied to the data input of the next, thus forming a wider shift register. If independent slaves are to be connected to a master an other bus structure has to be chosen, as shown in illustration 3. Here, the clock and the SDI data lines are brought to each slave. Also the SDO data lines are tied together and led back to the master. Only the chip selects are separately brought to each SPI device. Illustration 3: Master with independent slaves Last not least both types may be combined. It is also possible to connect two micro controllers via SPI. For such a network, two protocol variants are possible. In the first, there is only one master and several slaves and in the second, each micro controller can take the role of the master. For the selection of slaves again two versions would be possible but only one variant is supported by hardware. The hardware supported variant is with the chip selects, while in the other the selection of the slaves is done by means of an ID packed into the frames. The assignment of the IDs is done by software. Only the selected slave drives its output, all other slaves are in high-impedancd state. The output remains active as long as the slave is selected by its address. The first variant, named single-master protocol, resembles the normal master-slave communication. The micro controller configured as a slave behaves like a normal peripheral device. The second possibility works with several masters and is therefore named multi-master protocol. Each micro processor has the possibility to take the roll of the master and to address another micro processor. One controller must permanently provide a clock 3 of 21 18/02/

4 signal. The MC68HC11 provides a harware error recognition, useful in multiple-master systems. There are two SPI system errors. The first occurs if several SPI devices want to become master at the same time. The other is a collision error that occurs for example when SPI devices work with with different polarities. More details can be found in the MC68HC11 manual. Data and Control Lines of the SPI The SPI requires two control lines (CS and SCLK) and two data lines (SDI and SDO). Motorola names these lines MOSI (Master-Out-Slave-In) and MISO (Master-In-Slave-Out). The chip select line is named SS (Slave-Select). With CS (Chip-Select) the corresponding peripheral device is selected. This pin is mostly active-low. In the unselected state the SDO lines are hi-z and therefore inactive. The master decides with which peripheral device it wants to communicate. The clock line SCLK is brought to the device whether it is selected or not. The clock serves as synchronization of the data communication. The majority of SPI devices provide these four lines. Sometimes it happens that SDI and SDO are multiplexed, for example in the temperature sensor LM74 from National Semiconductor, or that one of these lines is missing. A peripheral device which must or can not be configured, requires no input line, only a data output. As soon as it gets selected it starts sending data. In some s therefore the SDI line is missing (e.g. MCCP3001 from ). There are also devices that have no data output. For example LCD controllers (e.g. COP472-3 from National Semiconductor), which can be configured, but cannot send data or status messages. SPI Configuration Because there is no official specification, what exactly SPI is and what not, it is necessary to consult the data sheets of the components one wants to use. Important are the permitted clock frequencies and the type of valid transitions. There are no general rules for transitions where data shouls be latched. Although not specified by Motorola, in practice four modes are used. These four modes are the combinations of CPOL and CPHA. In table 1, the four modes are listed. SPI-mode CPOL CPHA Table 1: SPI Modes If the phase of the clock is zero, i.e. CPHA = 0, data is latched at the rising edge of the clock with CPOL = 0, and at the falling edge of the clock with CPOL = 1. If CPHA = 4 of 21 18/02/

5 1, the polarities are reversed. CPOL = 0 means falling edge, CPOL = 1 rising edge. The micro controllers from Motorola allow the polarity and the phase of the clock to be adjusted. A positive polarity results in latchig data at the rising edge of the clock. However data is put on the data line already at the falling edge in order to stabilize. Most peripherals which can only be slaves, work with this configuration. If it should become necessary to use the other polarity, transitions are reversed. The different Peripheral Types The question is of course, which peripheral types exist and which can be connected to the host processor. The available types and their characteristics are now discussed. Peripheral types can be subdivided into the following categories: Converters ( and ) Memories ( and FLASH) Real Time Clocks (RTC) Sensors (temperature, pressure) Others (signalmixer, potentiometer, LCD controller, UART, CAN controller, USB controller, amplifier) In the three categories converters, memories and RTCs, there is a great variety of component. Devices belonging to the last both groups are more rarely. There are lots of converters with different resolutions, clock frequencies and number of channels to choose from. 8, 10, 12 up to 24Bit with clock frequencies from 30ksps up to 600ksps. Memory devices are mostly variants. There are also a few SPI flash memories. Capacities range from a couple of bits up to 64KBit. Clock frequencies up to 3MHz. Serial S SPI are available for different supply voltages (2.7V to 5V) allowing their use in low-voltage applications. The data retention time duration from 10 years to 100 years. The permitted number of write accesses is 1 million cycles for most components. By cascading memory devices any number of bits/word can be obtained. RTCs are ideally suited for serial communication because only small amounts of data have to be transferred. There is also a great variety of RTCs with supply voltages from 2.0V. In addition to the standard functions of a "normal" clock, some RTCs offer an alarm function, non-volatile RAM etc. Most RTCs come from DALLAS and EPSON. The group of the sensors is yet weakly represented. Only a temperature and a pressure sensor could be found. CAN and USB controllers with SPI make it easier to use these protocols on a micro controller and inerfacing a LCD via SPI saves the troublesome parallel wiring. Manufacturer List Manufacturer Device Types Internet address 5 of 21 18/02/

6 AKM DSP,, digital Poti Atmel, digital Poti Crystal Dallas RTC EPSON RTC Fairchild Infineon Pressure Sensor Intel CAN Controller Temperature Sensor + Voltage Monitor,, UART, Analog Switches Micro controller,,, CAN controller Motorola DSP, MCU National Semiconductor LCD Controller, dig. Temperature Sensor, USB Controller NeXFlash FLASH RAMTRON FRAM SanDisk FLASH, MultiMediaCard SGS-Thomson, Micro controller DSP,, Xicor CPU Supervisor, s, FLASH Zilog DSP Device List (Peripherals) No. Device Type Features Manufacturer 1 AK93C85A AK93C95A AK93C10A Low power consumption 0.8µA standby AKM 6 of 21 18/02/

7 2 SSM2163 8x2 Audio Mixer 63dB attenuation in 1dB steps 3 AD1893 Sample Rate Converter Converts 1:2 to 2:1 4 AD5302 AD5312 AD5322 8/10/ buffered outputs dual 5 AD5530 AD /14Bit cascadeable 6 AD7303 clock rate up to 30MHz 7 AD7394 AD / 8 AD7715 Sigma-Delta 9 AD7811 AD7812 4/8 channel 300ksps 10 AD7816 AD7817 AD Temperature Sensor 11 AD AD AD ksps 3V to 5V operation, 8 channel 200ksps dual 14 AD8400 AD8402 AD8403 Digital Poti 1/2/4 channel 256 positions 1, 10, kOhm 10MHz update rate cascadeable quad wide supply range 7 of 21 18/02/

8 17 AT25010 AT25020 AT25040 Low voltage operation 1.8V/2.7V/5.0V block write protection 100 years data retention ATMEL 18 AT25080 AT25160 AT25320 AT25640 Low voltage operation 1.8V/2.7V/5.0V block write protection ATMEL 19 AT25P AT25HP AT45D011 FLASH 22 AT45D021 FLASH 23 AT45DB021 FLASH 24 AT45DB041 FLASH 25 AT45D081 FLASH 26 AT45DB161 FLASH Low voltage operation 1.8V/2.7V/5.0V block write protection Low voltage operation 1.8V/2.7V/5.0V block write protection 5V 1MBit 15MHz clock rate 5V 2MBit 10MHz 2.7V 2MBit 5MHz clock rate 5V 4MBit 10MHz 5V 8MBit 10MHz 2.7V 16MBit 13MHz ATMEL ATMEL ATMEL ATMEL ATMEL ATMEL ATMEL ATMEL 27 ADS1210 ADS Bit BURR-BROWN 8 of 21 18/02/

9 28 ADS1212 ADS Bit BURR-BROWN 29 ADS ADS ADS ADS ADS ADS7835 micro power 20ksps, multiple input ranges 40ksps 16Bit 40ksps 500ksps 500ksps 500ksps BURR-BROWN BURR-BROWN BURR-BROWN BURR-BROWN BURR-BROWN BURR-BROWN 35 ADS7846 Touch-screen controller 2.2V to 5.25V BURR-BROWN 36 ADS ADSS ADS Bit 2.7V to 5.5V 52ksps 2.7V to 5V 100ksps 16Bit 5V 100ksps BURR-BROWN BURR-BROWN BURR-BROWN 39 CS5531 CS Bit, 2 channel Low noise up to 23Bit selectable word rates Crystal 40 CS5532 CS Bit, 2 channel Low noise up to 23Bit Crystal 9 of 21 18/02/

10 41 DS1267 Digital potentiomenter selectable word rates Dual 10k, 50k and 100k DALLAS 42 DS1305 RTC 43 DS1306 RTC 96-byte User-RAM 96-byte User-RAM DALLAS DALLAS 44 DS1722 Digital Thermometer -55 C to 120 C accuracy +/- 2 C wide supply range DALLAS 45 DS1844 Digital Poti 46 RTC4553 RTC 4 channel, linear 64 positions 10, 50 and 100kOhm built-in crystal RAM 30x4Bit DALLAS EPSON 47 NM25C020 NM25C040 NM25C041 NM25C160 NM25C640 data retention >40 years hard- and software write protection Fairchild 48 NM93C06 NM93C56 NM93C66 data retention >40 years hard- and software write protection Fairchild 49 NM93C46 NM93C56 1k/2k Fairchild 50 NM93C46A NM93C46A 1k/2k selectable organization Fairchild 51 NM93S46 NM93S56 1K/2K data protect sequential read Fairchild 52 KP100 Pressure Sensor range kPa infineon CAN Controller Flexible CPU-interface CAN 2.0 Programmable Bit rate intel 54 IS93C46-3 issi 10 of 21 18/02/

11 55 LTC1091 LTC1092 LTC1093 LTC /2-/6-/8-Kanal wide supply range : 5V to 10V 56 LTC1096 LTC1098 A/D-Wabdler 33ksps 57 LTC1197 LTC ksps low-power version 58 LTC1285 LTC ksps/6.5ksps 3V 59 LTC LTC LTC LTC V 30ksps 25ksps 3.3V 50ksps variable word length 5V 63 LTC LTC LTC1329A-50 Wide supply range 2.7V to 6.5V Current output 64 LTC1392 Temperatur+Power Monitor Technilogy 65 LTC LTC ksps 14Bit 200ksps serial/parallel I/O 67 LTC1451 LTC1452 LTC1453 kaskadierbar 68 LTC1594 LTC1598 4/8 channel 11 of 21 18/02/

12 69 LTC LTC LTC Bit kaskadierbar 24Bit Sigma/Delta 24Bit Sigma/Delta no latency 72 LTC Bit 73 LTC Bit, no latency 74 MAX144 MAX145 Low power 2 channel 108ksps 75 MAX146 MAX147 Low power 8 channel 76 MAX157 MAX159 2 channels 77 MAX186 MAX188 8 channel 133ksps 78 MAX349 MAX350 MUX 8-to-1 dual 4-to-1 79 MAX395 Switch 8 channel 80 MAX MAX MAX MAX MAX534 5MHz quad rail-to-rail output buffers 10MHz clock rate 12 of 21 18/02/

13 85 MAX535 MAX Bit schmitt-trigger inputs 86 MAX536 MAX537 quad calibrated 87 MAX 548 MAX549 MAX550 single/dual 10MHz clock rate 88 MAX551 MAX MHz clock rate schmitt-trigger inputs 89 MAX1084 MAX ksps/400ksps 90 MAX1106 MAX ksps 91 MAX1110 MAX1111 multi-channel 92 MAX1112 MAX ksps multi-channel 93 MAX1202 MAX channel 133ksps 94 MAX channel 133ksps 95 MAX1240 MAX ksps 96 MAX1242 MAX channel 73ksps 13 of 21 18/02/

14 97 MAX1270 MAX channel multi-range 110ksps 98 MAX MAX MAX MAX MAX3100 UART 1, Sigma-Delta multi-channel programmable gain+offset 480sps 1, Sigma-Delta multichannel 480sps 1, Sigma-Delta multi-channel 480sps 1 multi-channel Up to 230kBaud Schmitt-trigger inputs 103 MAX3110E MAX3111E UART ESD-protected internal capacitors 104 MAX3140 UART 105 MAX4548 Switch Triple 3x2-crosspoint switch 106 MAX4550 MAX4570 Switch Dual 4x2 crosspoint switch 107 MAX4562 MAX4573 Switch Clickless Audio/Video Switch 108 MAX4571 MAX4574 Switch Audio/Video 109 MAX4588 MUX Dual 4 channel 180MHz bandwidth 14 of 21 18/02/

15 110 MAX4589 MUX Dual 2 channel 200MHz bandwidth 111 MAX MAX5120 MAX MAX5122 MAX5123 buffered output can drive up to 20mA 114 MAX5130 MAX Bit 115 MAX5132 MAX Bit 116 MAX5150 MAX Bit, dual 16 us settling time 117 MAX5152 MAX Bit dual configurable outputs drive up to 20mA 118 MAX5156 MAX5157 dual configurable outputs drive up to 20mA 119 MAX5170 MAX Bit 120 MAX5171 MAX Bit Force/Sense voltage output 121 MAX5174 MAX MAX5175 MAX5177 Force/Sense voltage output 123 MAX5222 dual 25MHz clock rate 15 of 21 18/02/

16 124 MAX MAX5251 quad schmitt-trigger inputs quad schmitt-trigger inputs 126 MAX MAX MAX MAX MAX MAX5544 5V schmitt-trigger inputs schmitt-trigger inputs 16Bit schmitt-trigger inputs 10MHz clock rate 14Bit schmitt-trigger inputs 10MHz 132 MAX7219 Max7221 LED display driver 8-digit 10MHz clock rate digital/analog brightness control AA040 25LC040 25C040 4k max. 3MHz clock data retention >200 years AA080 25LC080 25C080 8k, max 3MHz clock data retention >200 years AA160 25LC160 25C160 16k, max 3MHz clock data retention >200 years 16 of 21 18/02/

17 136 25LC320 25C320 32k, max 3MHz clock data retention >200 years AA640 25LC640 64k, max 3MHz clock data retention >200 years 138 MCP MCP3002, 2.7V to 5V 5V, 2.7V to 5V, 2 channel 5V 140 MCP3004 MCP3008 4/8 channel 5V 2.7V to 5V 141 MCP MCP MCP3204/ MCP2510 CAN Controller 145 MC68HC86T1 RTC + RAM 100ksps 2.7V to 5V industrial temp range 2 channel 5V 4/8 channel 5V Programmable Bit rate up tp 1MHz Bytes message frame 32x static-ram Motorola 146 CLC5506 GTA (Gain Trim Amplifier) 600MHz bandwidth control range 16dB National Semiconductor 147 COP472-3 LCD Controller Keine SDO-Leitung National Semiconductor 17 of 21 18/02/

18 148 LM74 Temperature Sensor 149 MM5483 LCD Controller + sign 3V to 5V -55 C to +150 C max resolution: 1.25 C 31 segment outputs cascadable National Semiconductor National Semiconductor 150 MM58342 High Voltage Display Drive 35V max. cascadeable National Semiconductor 151 TP3465 Microwire Interface Device Allows memory-mapped SPI devices Clock 5MHz/20MHz National Semiconductor 152 USBN9602 USB Controller DMA-Support Several FIFOs National Semiconductor 153 NX25F011A NX25F041A FLASH Data retention 10 years Clock 16MHz NexFlash 154 NX25F080A FLASH 155 NX25M FLASH 8MBit data retention 10 years DOS-compatible sectors Serial FLASH module, removeable NexFlash NexFlash 156 FM25L256 FM25W256 FRAM Ferroelectric RAM, 256KB 3V/wide range, endurance 1E16 cycles RAMTRON 157 FM25CL64 FM25640 FRAM Ferroelectric RAM, 64KB 3V/5V, endurance 1E16 cycles RAMTRON 158 FM25CL160 FRAM Ferroelectric RAM, 16KB 5V, endurance 1E16 RAMTRON 18 of 21 18/02/

19 cycles 159 FM25CL04 FM25040 FRAM Ferroelectric RAM, 4KB 3V/5V, endurance 1E16 cycles RAMTRON 160 SDMB-4 SDMB-8 SDMB-16 SDMB-32 MultiMediaCard Up to 32MB FLASH SPI and PCMCIA interfaces SanDisk 161 M KBit 5MHz clock rate data retention >40 years SGS-Thomson 162 M93C86 M93C76 M93C66 M93C56 M93C46 M93C06 Word or byte organization 16K/8K/4K /2K/1K/256 data retention: 40 years SGS-Thomson 163 M93S46 M93S56 M93S66 Block protection 1k/2K/4kx16Bit SGS-Thomson 164 M95010 M95020 M MHz clock rate SGS-Thomson 165 M95080 M95160 M95320 M /16/32/64KBit 5MHz clock rate SGS-Thomson 166 M95128 M /256KBit 5MHz SGS-Thomson 167 ST95010 ST95020 ST K,2K,4K 2MHz SGS-Thomson 168 TLV1504 TLV ksps 4/8 channel 169 TLV1544 4/8 channel 19 of 21 18/02/

20 170 TLV TLV Msps 1.25Msps 172 TLC1514 TLC1518, 400ksps DSP-compatible 20MHz 173 TLV2541 TLV2542 TLV2545, 200ksps DSP-compatible 20MHz 174 TLV2544 TLV ksps 4/8 channel 175 TLC2554 TLC ksps 4/8 channel 176 TLV TLV TLV5616 TLV TLV5617 TLV5617A dual programmable settling time 180 TLV5618A dual 181 TLV5623 TLV TLV TLV TLV channel programmable 20 of 21 18/02/

21 reference 185 TLV X X X K 256x clock 1MHz 4K 512x clock 1MHz 16k 2048x clock 2MHz XICOR XICOR XICOR 189 X25F008 X25F016 X25F032 X25F064 FLASH 1.8V to 3.6V data retention 100 years clock 1MHz XICOR 190 X25F128 FLASH 191 X5001 CPU Supervisor Block Lock Protection 5 Reset voltage levels XICOR XICOR 192 X5043 CPU Supervisor 4K XICOR 193 X5163 X5165 CPU Supervisor 16K XICOR 194 X5323 CPU Supervisor 32K XICOR Literature [1] Motorola MC68HC11 Reference Manual, Prentice Hall 1989 [2] Motorola MC68332 User Manual [3] Various application notes [4] Data sheets 21 of 21 18/02/