IGLOO2 Evaluation Kit Webinar
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1 Power Matters. IGLOO2 Evaluation Kit Webinar Jamie Freed August 29, 2013
2 Overview M2GL010T- FG484 $99* LPDDR 10/100/1G Ethernet SERDES SMAs USB UART Available Demos Small Form Factor PCI Express x1 * Limited Quantity Power Matters. 2
3 Agenda Quick overview of IGLOO2 Feature Set of the HPMS Feature Set of the Board Interfaces Memory Expansion Power Kit contents Demos Power Matters. 3
4 IGLOO2 Block Diagram Power Matters. 4
5 User I/Os High Speed Memory Logic / DSP Microsemi IGLOO2 Family Features M2GL005 M2GL010 M2GL025 M2GL050 M2GL090 M2GL100 M2GL150 Maximum Logic Elements (4LUT+DFF) 6,060 12,084 27,696 56,340 86,316 99, ,124 Math Blocks (18x18) PLLs and CCCs SPI/HPDMA/PDMA 1 each Security AES256, SHA256, RNG AES256, SHA256, RNG, ECC, PUF envm (K Bytes) LSRAM 18K Blocks usram1k Blocks esram (K Bytes) 64 Total RAM (K bits) DDR Controllers 1x18 2x36 1x18 2x36 SERDES Lanes PCIe End Points MSIO (3.3V) MSIOD (2.5V) DDRIO (2.5V) Total User I/O Power Matters. 5
6 High Performance Memory Subsystem Reduces your design effort, power, and cost Embedded memories envm - Flash Storage of User Information, Keys, Ethernet MAC ID s, System configuration data Secure Boot of external application processors Embedded SRAM s (2.6Gbps of bandwidth) Local zero wait state memory for video / graphics applications Predictable latency for time critical embedded applications Largest monolithic memory blocks in the industry Built-in support for managing embedded memories 2 DMA Engines to move data efficiently in and out of the device Video Frame Buffers TCP/IP Buffers PCIe Packets DDR bridge 2 port memory cache Lowers power and increases system throughput Embedded Memories with Commonly Used Functions in Serial Protocol Implementations Saves 18K LEs! Power Matters. 6
7 Multi Protocol 5Gb/s SERDES Physical Media Attachment (PMA) Features Up to 16 lanes at up to 5Gbps Dual based reference clocks with single-lane rate granularity Reference clock is shared per groups of two lanes Transmitter Features Programmable Pre/Post-Emphasis Programmable Impedance Programmable Amplitude Receiver Features Programmable Termination Programmable Linear Equalization Built-In System Debug Features PRBS Gen/Chk Constant Patterns Loopbacks IGLOO2 Eye Diagram Power Matters. 7
8 SERDES / Hard IP architecture PMA - Multi-Protocol 5G transceiver Organized in blocks of x4 4 blocks max for 16 lanes Power Matters. 8
9 PCI Express Embedded PCIe Solution GEN1 (2.5Gbps) and GEN2 (5.0Gbps) x1, x2, x4 Link Widths Full Protocol Stack Physical Layer Data Link Layer Transaction Layer AXI4 or AHB32Lite FPGA Interface Endpoint topology Power Matters. 9
10 IGLOO2 Evaluation Kit Power Matters. 10
11 SERDES Interfaces PCIe x1 5.0Gbps Edge Fingers Control Plane Demo is pre-loaded Small Form-Factor PCIe Compliant Ethernet 10/100/1000BASE-T RJ45 Connector Marvel PHY with SGMII to SERDES SmartFusion2 embedded MAC IGLOO2 soft IP MAC SERDES Full-Duplex Pair of SMAs with SMA REFCLK Built-In SERDES Tx-Rx loopback in board traces Power Matters. 11
12 Memory Low-Power DDR 512MB 16-bit Interface to IGLOO2 using MDDR pins No ECC (Would require 2 devices) Operational up to 400Mbps (6.4Gbps aggregate) SPI Flash 64Mbit Connected to SPI_0 of HPMS (Configuration) Useful for In-Application Programming Power Matters. 12
13 Expansion Interfaces GPIO Header 3.3V 64-bit 64-bit Single-Ended 32 pairs of LVDS USB-UART FTDI USB-UART Device Interface Standard interface for demo control SmartFusion2 Interfaces USB-OTG I2C Header Expansion or Loopback Power Matters. 13
14 Power Sources 12V Wall-Mount Power Supply Standard On/Off Switch PCIe Edge Fingers 12V Power is provided through the PCIe slot Allows demonstration of PCIe power-up Standard On/Off Switch Power Matters. 14
15 Microsemi DC/DC Part Iout Vin Fsw (Mhz) Vout (V) Package LX A LDO DFN 3x2 LX A LDO 3.3 DFN 3x3 LX7186A 1A TSOT-5 LX A DFN 2x2 LX7175 3A DFN 3x3 LX7165 5A CSP 1.6x2 NX9548 8A DFN 5x5 All Regulators 2.4A to 8A w/hysteretic Control Ultra-Fast Transient Response Constant Frequency - Patented Less Components Smaller Output Filter More Efficient at Light Loads 12V NX9548 8A Buck LX A LDO LX A LDO LX7165 5A Buck w/i 2 C 3.3V 1.2V LX7167 5V 2.4A Buck 1.8V Reg LX7175 3A Buck Reg LX7186A 1A Buck Reg LX7165 5A Buck Reg w/i 2 C 3.3V 2.5V 1.0V LX A LDO 2.5V 3.3V Power Matters. 15
16 Power Measurement VDD 1.2V Rail Two different measurement circuits and test points Normal Operation 100mA 2A Flash*Freeze 2mA 10mA Enabled by a jumper Uses opamp gain to allow for hand-held voltmeter to measure both Normal and Flash*Freeze current. LPDDR Interface and Device 1.8V Rail Same scheme as the VDD 1.2V Rail Supports both Normal Operation and Flash*Freeze circuits SERDES LDO Power Sense resistor measurement Power Matters. 16
17 PCIe Small Form-Factor ExpressCard Slot of Laptop w/ Adapter PCIe x4 Slot of Desktop Direct Plug-In Note: A x1 PCIe card can work in any size PCIe slot Power Matters. 17
18 Kit Contents IGLOO2 Evaluation Board 12K LE M2GL010T-1FGG484 12V Wall-Mounted Power Supply FlashPro4 Programmer Power Matters. 18
19 Available Demos PCI Express Control Plane Tutorial - Preloaded Data Plane Demo Fall 2013 In-Application Programming Demo Fall 2013 SERDES 1-5Gbps SERDES Demo EPCS Based SERESIF GUI Application for Demo Control Eye Diagram and/or FPGA based PRBS pattern gen/chk 500Mbps SERDES Demo Oversampling technique for less than 1Gbps applications DSP Adaptive FIR Demo Power Matters. 19
20 IGLOO2 PCIe Control Plane Demo IGLOO2 Plugs into any PCIe slot Any available slot since a x1 is required for PCIe compliance ExpressCard for laptops also supported with adapter card From Host PC GUI Wiggle LEDs and Read status of DIP Switches R/W to the esram Capture a PCIe interrupt sent from the Evaluation Kit Read the Device Serial Number of the device Store envm data to be read back Power Matters. 20
21 PCIe Tutorial This is a Libero PCIe tutorial as well as a silicon demo User builds the entire design Libero Project with System Builder Configure the SERDESIF Import a user Verilog file Make connections in SmartDesign Simulate with the PCIe BFM Download STAPL file Power Matters. 21
22 IGLOO2 PCIe Control Plane Demo IGLOO2 IGLOO2 Power Matters. 22
23 IGLOO2 PCIe Data Plane Demo Power Matters. 23
24 SERDES Demos SERDES Demo Two SERDES Demos 1Gbps 5Gbps Demo 500Mbps Demo (Oversampling) Power Matters. 24
25 Ordering Power Matters. 25
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