Z8530 Programming Guide

Transcription

1 Z8530 Programming Guide Alan Cox

2 Z8530 Programming Guide by Alan Cox Copyright 2000 by Alan Cox This doumentation is free software; you an redistribute it and/or modify it under the terms of the GNU General Publi Liense as published by the Free Software Foundation; either version 2 of the Liense, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Publi Liense for more details. You should have reeived a opy of the GNU General Publi Liense along with this program; if not, write to the Free Software Foundation, In., 59 Temple Plae, Suite 330, Boston, MA USA For more details see the file COPYING in the soure distribution of Linux.

3 Table of Contents 1. Introdution Driver Modes Using the Z85230 driver Attahing Network Interfaes Configuring And Ativating The Port Network Layer Funtions Porting The Z8530 Driver Known Bugs And Assumptions Publi Funtions Provided...14 z8530_interrupt...14 z8530_syn_open...14 z8530_syn_lose...15 z8530_syn_dma_open...16 z8530_syn_dma_lose...17 z8530_syn_txdma_open...17 z8530_syn_txdma_lose...18 z8530_desribe...19 z8530_init...19 z8530_shutdown...20 z8530_hannel_load...21 z8530_null_rx...21 z8530_queue_xmit...22 z8530_get_stats Internal Funtions...24 z8530_read_port...24 z8530_write_port...24 read_zsreg...25 read_zsdata...26 write_zsreg...26 write_zstrl...27 write_zsdata...28 z8530_flush_fifo...29 z8530_rtsdtr...29 z8530_rx...30 z8530_tx...31 z8530_status

4 z8530_dma_rx...32 z8530_dma_tx...33 z8530_dma_status...34 z8530_rx_lear...34 z8530_tx_lear...35 z8530_status_lear...36 z8530_tx_begin...36 z8530_tx_done...37 z8530_rx_done...38 spans_boundary

5 Chapter 1. Introdution The Z85x30 family synhronous/asynhronous ontroller hips are used on a larg number of heap network interfae ards. The kernel provides a ore interfae layer that is designed to make it easy to provide WAN servies using this hip. The urrent driver only support synhronous operation. Merging the asynhronous driver support into this ode to allow any Z85x30 devie to be used as both a tty interfae and as a synhronous ontroller is a projet for Linux post the 2.4 release The support ode handles most ommon ard onfigurations and supports running both Ciso HDLC and Synhronous PPP. With extra glue the frame relay and X.25 protools an also be used with this driver. 5

6 Chapter 2. Driver Modes The Z85230 driver layer an drive Z8530, Z85C30 and Z85230 devies in three different modes. Eah mode an be applied to an individual hannel on the hip (eah hip has two hannels). The PIO synhronous mode supports the most ommon Z8530 wiring. Here the hip is interfae to the I/O and interrupt failities of the host mahine but not to the DMA subsystem. When running PIO the Z8530 has extremely tight timing requirements. Doing high speeds, even with a Z85230 will be triky. Typially you should expet to ahieve at best 9600 baud with a Z8C530 and 64Kbits with a Z The DMA mode supports the hip when it is onfigured to use dual DMA hannels on an ISA bus. The better ards tend to support this mode of operation for a single hannel. With DMA running the Z85230 tops out when it starts to hit ISA DMA onstraints at about 512Kbits. It is worth noting here that many PC mahines hang or rash when the hip is driven fast enough to hold the ISA bus solid. Transmit DMA mode uses a single DMA hannel. The DMA hannel is used for transmission as the transmit FIFO is smaller than the reeive FIFO. it gives better performane than pure PIO mode but is nowhere near as ideal as pure DMA mode. 6

7 Chapter 3. Using the Z85230 driver The Z85230 driver provides the bak end interfae to your board. To onfigure a Z8530 interfae you need to detet the board and to identify its ports and interrupt resoures. It is also your problem to verify the resoures are available. Having identified the hip you need to fill in a strut z8530_dev, whih desribes eah hip. This objet must exist until you finally shutdown the board. Firstly zero the ative field. This ensures nothing goes off without you intending it. The irq field should be set to the interrupt number of the hip. (Eah hip has a single interrupt soure rather than eah hannel). You are responsible for alloating the interrupt line. The interrupt handler should be set to z8530_interrupt. The devie id should be set to the z8530_dev struture pointer. Whether the interrupt an be shared or not is board dependant, and up to you to initialise. The struture holds two hannel strutures. Initialise hana.trlio and hana.dataio with the address of the ontrol and data ports. You an or this with Z8530_PORT_SLEEP to indiate your interfae needs the 5uS delay for hip settling done in software. The PORT_SLEEP option is arhiteture speifi. Other flags may beome available on future platforms, eg for MMIO. Initialise the hana.irqs to &z8530_nop to start the hip up as disabled and disarding interrupt events. This ensures that stray interrupts will be mopped up and not hang the bus. Set hana.dev to point to the devie struture itself. The private and name field you may use as you wish. The private field is unused by the Z85230 layer. The name is used for error reporting and it may thus make sense to make it math the network name. Repeat the same operation with the B hannel if your hip has both hannels wired to something useful. This isnt always the ase. If it is not wired then the I/O values do not matter, but you must initialise hanb.dev. If your board has DMA failities then initialise the txdma and rxdma fields for the relevant hannels. You must also alloate the ISA DMA hannels and do any neessary board level initialisation to onfigure them. The low level driver will do the Z8530 and DMA ontroller programming but not board speifi magi. Having intialised the devie you an then all z8530_init. This will probe the hip and reset it into a known state. An identifiation sequene is then run to identify the hip type. If the heks fail to pass the funtion returns a non zero error ode. Typially this indiates that the port given is not valid. After this all the type field of the z8530_dev struture is initialised to either Z8530, Z85C30 or Z85230 aording to the hip found. One you have alled z8530_init you an also make use of the utility funtion z8530_desribe. This provides a onsistant reporting format for the Z8530 devies, and allows all the drivers to provide onsistent reporting. 7

8 Chapter 4. Attahing Network Interfaes If you wish to use the network interfae failities of the driver, then you need to attah a network devie to eah hannel that is present and in use. In addition to use the SynPPP and Ciso HDLC you need to follow some additional plumbing rules. They may seem omplex but a look at the example hostess_sv11 driver should reassure you. The network devie used for eah hannel should be pointed to by the netdevie field of eah hannel. The dev- priv field of the network devie points to your private data - you will need to be able to find your ppp devie from this. In addition to use the syn ppp layer the private data must start with a void * pointer to the synppp strutures. The way most drivers approah this patiular problem is to reate a struture holding the Z8530 devie definition and put that and the synppp pointer into the private field of the network devie. The network devie fields of the hannels then point bak to the network devies. The ppp_devie an also be put in the private struture onveniently. If you wish to use the synhronous ppp then you need to attah the synppp layer to the network devie. You should do this before you register the network devie. The sppp_attah requires that the first void * pointer in your private data is pointing to an empty strut ppp_devie. The funtion fills in the initial data for the ppp/hdl layer. Before you register your network devie you will also need to provide suitable handlers for most of the network devie allbaks. See the network devie doumentation for more details on this. 8

9 Chapter 5. Configuring And Ativating The Port The Z85230 driver provides helper funtions and tables to load the port registers on the Z8530 hips. When programming the register settings for a hannel be aware that the doumentation reommends initialisation orders. Strange things happen when these are not followed. z8530_hannel_load takes an array of pairs of initialisation values in an array of u8 type. The first value is the Z8530 register number. Add 16 to indiate the alternate register bank on the later hips. The array is terminated by a 255. The driver provides a pair of publi tables. The z8530_hdl_kilostream table is for the UK Kilostream servie and also happens to over most other end host onfigurations. The z8530_hdl_kilostream_85230 table is the same onfiguration using the enhanements of the hip. The onfiguration loaded is standard NRZ enoded synhronous data with HDLC bitstuffing. All of the timing is taken from the other end of the link. When writing your own tables be aware that the driver internally traks register values. It may need to reload values. You should therefore be sure to set registers 1-7, 9-11, 14 and 15 in all onfigurations. Where the register settings depend on DMA seletion the driver will update the bits itself when you open or lose. Loading a new table with the interfae open is not reommended. There are three standard onfigurations supported by the ore ode. In PIO mode the interfae is programmed up to use interrupt driven PIO. This plaes high demands on the host proessor to avoid lateny. The driver is written to take aount of lateny issues but it annot avoid latenies aused by other drivers, notably IDE in PIO mode. Beause the drivers alloate buffers you must also prevent MTU hanges while the port is open. One the port is open it will all the rx_funtion of eah hannel whenever a ompleted paket arrived. This is invoked from interrupt ontext and passes you the hannel and a network buffer (strut sk_buff) holding the data. The data inludes the CRC bytes so most users will want to trim the last two bytes before proessing the data. This funtion is very timing ritial. When you wish to simply disard data the support ode provides the funtion z8530_null_rx to disard the data. To ative PIO mode sending and reeiving the z8530_syn_open is alled. This expets to be passed the network devie and the hannel. Typially this is alled from your network devie open allbak. On a failure a non zero error status is returned. The z8530_syn_lose funtion shuts down a PIO hannel. This must be done before the hannel is opened again and before the driver shuts down and unloads. The ideal mode of operation is dual hannel DMA mode. Here the kernel driver will onfigure the board for DMA in both diretions. The driver also handles ISA DMA issues suh as ontroller programming and the memory range limit for you. This mode is ativated by alling the z8530_syn_dma_open 9

10 Chapter 5. Configuring And Ativating The Port funtion. On failure a non zero error value is returned. One this mode is ativated it an be shut down by alling the z8530_syn_dma_lose. You must all the lose funtion mathing the open mode you used. The final supported mode uses a single DMA hannel to drive the transmit side. As the Z85C30 has a larger FIFO on the reeive hannel this tends to inrease the maximum speed a little. This is ativated by alling the z8530_syn_txdma_open. This returns a non zero error ode on failure. The z8530_syn_txdma_lose funtion loses down the Z8530 interfae from this mode. 10

11 Chapter 6. Network Layer Funtions The Z8530 layer provides funtions to queue pakets for transmission. The driver internally buffers the frame urrently being transmitted and one further frame (in order to keep bak to bak transmission running). Any further buffering is up to the aller. The funtion z8530_queue_xmit takes a network buffer in sk_buff format and queues it for transmission. The aller must provide the entire paket with the exeption of the bitstuffing and CRC. This is normally done by the aller via the synppp interfae layer. It returns 0 if the buffer has been queued and non zero values for queue full. If the funtion aepts the buffer it beomes property of the Z8530 layer and the aller should not free it. The funtion z8530_get_stats returns a pointer to an internally maintained per interfae statistis blok. This provides most of the interfae ode needed to implement the network layer get_stats allbak. 11

12 Chapter 7. Porting The Z8530 Driver The Z8530 driver is written to be portable. In DMA mode it makes assumptions about the use of ISA DMA. These are probably warranted in most ases as the Z85230 in patiular was designed to glue to PC type mahines. The PIO mode makes no real assumptions. Should you need to retarget the Z8530 driver to another arhiteture the only ode that should need hanging are the port I/O funtions. At the moment these assume PC I/O port aesses. This may not be appropriate for all platforms. Replaing z8530_read_port and z8530_write_port is intended to be all that is required to port this driver layer. 12

13 Chapter 8. Known Bugs And Assumptions Interrupt Loking The loking in the driver is done via the global li/sti lok. This makes for relatively poor SMP performane. Swithing this to use a per devie spin lok would probably materially improve performane. Oasional Failures We have reports of oasional failures when run for very long periods of time and the driver starts to reeive junk frames. At the moment the ause of this is not lear. 13

14 Chapter 9. Publi Funtions Provided z8530_interrupt Name z8530_interrupt Handle an interrupt from a Z8530 void z8530_interrupt (int irq, void * dev_id, strut pt_regs * regs); irq Interrupt number dev_id The Z8530 devie that is interrupting. regs unused A Z85[2]30 devie has stuk its hand in the air for attention. We san both the hannels on the hip for events and then all the hannel speifi all baks for eah hannel that has events. We have to use allbak funtions beause the two hannels an be in different modes. 14

15 Chapter 9. Publi Funtions Provided z8530_syn_open Name z8530_syn_open Open a Z8530 hannel for PIO int z8530_syn_open (strut net_devie * dev, strut z8530_hannel * ); dev The network interfae we are using The Z8530 hannel to open in synhronous PIO mode Swith a Z8530 into synhronous mode without DMA assist. We raise the RTS/DTR and ommene network operation. z8530_syn_lose Name z8530_syn_lose Close a PIO Z8530 hannel int z8530_syn_lose (strut net_devie * dev, strut z8530_hannel * ); 15

16 Chapter 9. Publi Funtions Provided dev Network devie to lose Z8530 hannel to disassoiate and move to idle Close down a Z8530 interfae and swith its interrupt handlers to disard future events. z8530_syn_dma_open Name z8530_syn_dma_open Open a Z8530 for DMA I/O int z8530_syn_dma_open (strut net_devie * dev, strut z8530_hannel * ); dev The network devie to attah The Z8530 hannel to onfigure in syn DMA mode. 16

17 Chapter 9. Publi Funtions Provided Set up a Z85x30 devie for synhronous DMA in both diretions. Two ISA DMA hannels must be available for this to work. We assume ISA DMA driven I/O and PC limits on aess. z8530_syn_dma_lose Name z8530_syn_dma_lose Close down DMA I/O int z8530_syn_dma_lose (strut net_devie * dev, strut z8530_hannel * ); dev Network devie to detah Z8530 hannel to move into disard mode Shut down a DMA mode synhronous interfae. Halt the DMA, and free the buffers. z8530_syn_txdma_open Name z8530_syn_txdma_open Open a Z8530 for TX driven DMA 17

18 Chapter 9. Publi Funtions Provided int z8530_syn_txdma_open (strut net_devie * dev, strut z8530_hannel * ); dev The network devie to attah The Z8530 hannel to onfigure in syn DMA mode. Set up a Z85x30 devie for synhronous DMA tranmission. One ISA DMA hannel must be available for this to work. The reeive side is run in PIO mode, but then it has the bigger FIFO. z8530_syn_txdma_lose Name z8530_syn_txdma_lose Close down a TX driven DMA hannel int z8530_syn_txdma_lose (strut net_devie * dev, strut z8530_hannel * ); dev Network devie to detah 18

19 Chapter 9. Publi Funtions Provided Z8530 hannel to move into disard mode Shut down a DMA/PIO split mode synhronous interfae. Halt the DMA, and free the buffers. z8530_desribe Name z8530_desribe Uniformly desribe a Z8530 port void z8530_desribe (strut z8530_dev * dev, har * mapping, unsigned long io); dev Z8530 devie to desribe mapping string holding mapping type (eg I/O or Mem ) io the port value in question Desribe a Z8530 in a standard format. We must pass the I/O as the port offset isnt preditable. The main reason for this funtion is to try and get a ommon format of report. 19

20 Chapter 9. Publi Funtions Provided z8530_init Name z8530_init Initialise a Z8530 devie int z8530_init (strut z8530_dev * dev); dev Z8530 devie to initialise. Configure up a Z8530/Z85C30 or Z85230 hip. We hek the devie is present, identify the type and then program it to hopefully keep quite and behave. This matters a lot, a Z8530 in the wrong state will sometimes get into stupid modes generating 10Khz interrupt streams and the like. We set the interrupt handler up to disard any events, in ase we get them during reset or setp. Return 0 for suess, or a negative value indiating the problem in errno form. z8530_shutdown Name z8530_shutdown Shutdown a Z8530 devie int z8530_shutdown (strut z8530_dev * dev); 20

21 Chapter 9. Publi Funtions Provided dev The Z8530 hip to shutdown We set the interrupt handlers to silene any interrupts. We then reset the hip and wait 100uS to be sure the reset ompleted. Just in ase the aller then tries to do stuff. z8530_hannel_load Name z8530_hannel_load Load hannel data int z8530_hannel_load (strut z8530_hannel *, u8 * rtable); Z8530 hannel to onfigure rtable table of register, value pairs FIXME iotl to allow user uploaded tables Load a Z8530 hannel up from the system data. We use +16 to indiate the prime registers. The value 255 terminates the table. 21

22 Chapter 9. Publi Funtions Provided z8530_null_rx Name z8530_null_rx Disard a paket void z8530_null_rx (strut z8530_hannel *, strut sk_buff * skb); skb The hannel the paket arrived on The buffer We point the reeive handler at this funtion when idle. Instead of synppp proessing the frames we get to throw them away. z8530_queue_xmit Name z8530_queue_xmit Queue a paket int z8530_queue_xmit (strut z8530_hannel *, strut sk_buff * skb); 22

23 Chapter 9. Publi Funtions Provided skb The hannel to use The paket to kik down the hannel Queue a paket for transmission. Beause we have rather hard to hit interrupt latenies for the Z85230 per paket even in DMA mode we do the flip to DMA buffer if needed here not in the IRQ. z8530_get_stats Name z8530_get_stats Get network statistis strut net_devie_stats * z8530_get_stats (strut z8530_hannel * ); The hannel to use Get the statistis blok. We keep the statistis in software as the hip doesn t do it for us. 23

24 Chapter 10. Internal Funtions z8530_read_port Name z8530_read_port Arhiteture speifi interfae funtion int z8530_read_port (unsigned long p); p port to read Provided port aess methods. The Comtrol SV11 requires no delays between aesses and uses PC I/O. Some drivers may need a 5uS delay In the longer term this should beome an arhiteture speifi setion so that this an beome a generi driver interfae for all platforms. For now we only handle PC I/O ports with or without the dread 5uS sanity delay. The aller must hold suffiient loks to avoid violating the horrible 5uS delay rule. z8530_write_port Name z8530_write_port Arhiteture speifi interfae funtion 24

25 Chapter 10. Internal Funtions void z8530_write_port (unsigned long p, u8 d); p d port to write value to write Write a value to a port with delays if need be. Note that the aller must hold loks to avoid read/writes from other ontexts violating the 5uS rule In the longer term this should beome an arhiteture speifi setion so that this an beome a generi driver interfae for all platforms. For now we only handle PC I/O ports with or without the dread 5uS sanity delay. read_zsreg Name read_zsreg Read a register from a Z85230 u8 read_zsreg (strut z8530_hannel *, u8 reg); 25

26 Chapter 10. Internal Funtions reg Z8530 hannel to read from (2 per hip) Register to read FIXME Use a spinlok. Most of the Z8530 registers are indexed off the ontrol registers. A read is done by writing to the ontrol register and reading the register bak. We do the loking needed to protet this operation. read_zsdata Name read_zsdata Read the data port of a Z8530 hannel u8 read_zsdata (strut z8530_hannel * ); The Z8530 hannel to read the data port from The data port provides fast aess to some things. We still have all the 5uS delays to worry about. 26

27 Chapter 10. Internal Funtions write_zsreg Name write_zsreg Write to a Z8530 hannel register void write_zsreg (strut z8530_hannel *, u8 reg, u8 val); reg val The Z8530 hannel Register number Value to write Write a value to an indexed register. Perform the loking needed to honour the irritating delay rules. We know about register 0 being fast to aess. write_zstrl Name write_zstrl Write to a Z8530 ontrol register 27

28 Chapter 10. Internal Funtions void write_zstrl (strut z8530_hannel *, u8 val); val The Z8530 hannel Value to write Write diretly to the ontrol register on the Z8530 write_zsdata Name write_zsdata Write to a Z8530 ontrol register void write_zsdata (strut z8530_hannel *, u8 val); The Z8530 hannel 28

29 Chapter 10. Internal Funtions val Value to write Write diretly to the data register on the Z8530 z8530_flush_fifo Name z8530_flush_fifo Flush on hip RX FIFO void z8530_flush_fifo (strut z8530_hannel * ); Channel to flush Flush the reeive FIFO. There is no speifi option for this, we blindly read bytes and disard them. Reading when there is no data is harmless. The 8530 has a 4 byte FIFO, the has 8 bytes. All loking is handled for the aller. On return data may still be present if it arrived during the flush. 29

30 Chapter 10. Internal Funtions z8530_rtsdtr Name z8530_rtsdtr Control the outgoing DTS/RTS line void z8530_rtsdtr (strut z8530_hannel *, int set); set The Z8530 hannel to ontrol; 1 to set, 0 to lear Sets or lears DTR/RTS on the requested line. All loking is handled for the aller. For now we assume all boards use the atual RTS/DTR on the hip. Apparently one or two don t. We ll sream about them later. z8530_rx Name z8530_rx Handle a PIO reeive event void z8530_rx (strut z8530_hannel * ); 30

31 Chapter 10. Internal Funtions Z8530 hannel to proess Reeive handler for reeiving in PIO mode. This is muh like the asyn one but not quite the same or as omplex Note Its intended that this handler an easily be separated from the main ode to run realtime. That ll be needed for some mahines (eg to ever lok 64kbits on a spar ;)). The RT_LOCK maros don t do anything now. Keep the ode overed by them as short as possible in all irumstanes - loks ost baud. The interrupt handler is assumed to be atomi w.r.t. to other ode - this is true in the RT ase too. We only over the syn ases for this. If you want 2Mbit asyn do it yourself but onsider medial assistane first. This non DMA synhronous mode is portable ode. The DMA mode assumes PCI like ISA DMA z8530_tx Name z8530_tx Handle a PIO transmit event void z8530_tx (strut z8530_hannel * ); 31

32 Chapter 10. Internal Funtions Z8530 hannel to proess Z8530 transmit interrupt handler for the PIO mode. The basi idea is to attempt to keep the FIFO fed. We fill as many bytes in as possible, its quite possible that we won t keep up with the data rate otherwise. z8530_status Name z8530_status Handle a PIO status exeption void z8530_status (strut z8530_hannel * han); han Z8530 hannel to proess A status event oured in PIO synhronous mode. There are several reasons the hip will bother us here. A transmit underrun means we failed to feed the hip fast enough and just broke a paket. A DCD hange is a line up or down. We ommuniate that bak to the protool layer for synhronous PPP to renegotiate. 32

33 Chapter 10. Internal Funtions z8530_dma_rx Name z8530_dma_rx Handle a DMA RX event void z8530_dma_rx (strut z8530_hannel * han); han Channel to handle Non bus mastering DMA interfaes for the Z8x30 devies. This is really pretty PC speifi. The DMA mode means that most reeive events are handled by the DMA hardware. We get a kik here only if a frame ended. z8530_dma_tx Name z8530_dma_tx Handle a DMA TX event void z8530_dma_tx (strut z8530_hannel * han); 33

34 Chapter 10. Internal Funtions han The Z8530 hannel to handle We have reeived an interrupt while doing DMA transmissions. It shouldn t happen. Sream loudly if it does. z8530_dma_status Name z8530_dma_status Handle a DMA status exeption void z8530_dma_status (strut z8530_hannel * han); han Z8530 hannel to proess A status event oured on the Z8530. We reeive these for two reasons when in DMA mode. Firstly if we finished a paket transfer we get one and kik the next paket out. Seondly we may see a DCD hange and have to poke the protool layer. 34

35 Chapter 10. Internal Funtions z8530_rx_lear Name z8530_rx_lear Handle RX events from a stopped hip void z8530_rx_lear (strut z8530_hannel * ); Z8530 hannel to shut up Reeive interrupt vetors for a Z8530 that is in parked mode. For mahines with PCI Z85x30 ards, or level triggered interrupts (eg the MaII) we must lear the interrupt ause or die. z8530_tx_lear Name z8530_tx_lear Handle TX events from a stopped hip void z8530_tx_lear (strut z8530_hannel * ); 35

36 Chapter 10. Internal Funtions Z8530 hannel to shut up Transmit interrupt vetors for a Z8530 that is in parked mode. For mahines with PCI Z85x30 ards, or level triggered interrupts (eg the MaII) we must lear the interrupt ause or die. z8530_status_lear Name z8530_status_lear Handle status events from a stopped hip void z8530_status_lear (strut z8530_hannel * han); han Z8530 hannel to shut up Status interrupt vetors for a Z8530 that is in parked mode. For mahines with PCI Z85x30 ards, or level triggered interrupts (eg the MaII) we must lear the interrupt ause or die. z8530_tx_begin Name z8530_tx_begin Begin paket transmission 36

37 Chapter 10. Internal Funtions void z8530_tx_begin (strut z8530_hannel * ); The Z8530 hannel to kik This is the speed sensitive side of transmission. If we are alled and no buffer is being transmitted we ommene the next buffer. If nothing is queued we idle the syn. Note We are handling this ode path in the interrupt path, keep it fast or bad things will happen. z8530_tx_done Name z8530_tx_done TX omplete allbak void z8530_tx_done (strut z8530_hannel * ); The hannel that ompleted a transmit. 37

38 Chapter 10. Internal Funtions This is alled when we omplete a paket send. We wake the queue, start the next paket going and then free the buffer of the existing paket. This ode is fairly timing sensitive. z8530_rx_done Name z8530_rx_done Reeive ompletion allbak void z8530_rx_done (strut z8530_hannel * ); The hannel that ompleted a reeive A new paket is omplete. Our goal here is to get bak into reeive mode as fast as possible. On the Z85230 we ould hange to using ESCC mode, but on the older hips we have no hoie. We flip to the new buffer immediately in DMA mode so that the DMA of the next frame an our while we are opying the previous buffer to an sk_buff spans_boundary Name spans_boundary Chek a paket an be ISA DMA d 38

39 Chapter 10. Internal Funtions int spans_boundary (strut sk_buff * skb); skb The buffer to hek Returns true if the buffer ross a DMA boundary on a PC. The poor thing an only DMA within a 64K blok not aross the edges of it. 39

40