INTEL 8085 PROJECT ECE - 316

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1 INTEL 8085 PROJECT ECE MAZE RUNNER Submitted By: Mohak Gupta (103/EC/13) Prashant (121/EC/13)

2 ACKNOWLEDGEMENTS The whole project took a lot of planning and concept application. We managed everything from software to hardware and time planning by ourselves. However, it would not have been possible without the kind support and help of many individuals. We would like to extend our sincere thanks to all of them. We are highly indebted to Prof. Dhananjay V. Gadre for his guidance and constant supervision as well as for providing necessary information regarding the project and also for his support in completing the project. Our thanks and appreciations also go to our colleagues in developing the project and people who have willingly helped us out with their abilities. Specially Gaurav Tyagi and Princey Yadav who guided us on the right path many times.

3 Project Overview To implement a user friendly game (Maze Runner) using the 8085 Microprocessor. DESCRIPTION The project contains 64 Bi-Color LED Matrix arranged in an 8x8 array. The user has access to 5 buttons- 4 to navigate across the maze and 1 to reset the game. The Bi-Color LED can be in one of the three possible states i.e 1. Red indicating an obstacle. 2. Green indicating the present location of the player 3. Off indicating free passage to go through. The 7-Segment displays the number of mazes passed till now. After exiting the maze the display maze turn all green to symbolize a win situation and the next maze appears only when the user presses any butto

4 USER INTERFACE

ISSUES FACED PROPOSED TIMELINE DEVIATIONS We were on track with the gantt chart proposed tasks but the PCBs delivery got delayed by PCB power and as a result the soldering got delayed but we managed

5 ISSUES FACED PROPOSED TIMELINE DEVIATIONS We were on track with the gantt chart proposed tasks but the PCBs delivery got delayed by PCB power and as a result the soldering got delayed but we managed that pretty well by doing coding side by side.but while running the designed codes we got several problems and we had to go through a whole lot of testing by writing different codes for our project. And overall project which was supposed to get complete by 30th april 2016 was successfully completed a month later. Project submission took place on 3rd june 2016 and report is uploaded on 8th june

6 BILL OF MATERIALS Part device/description 8085 MICROPROCESSOR 8255 PERIPHERAL IC NE TIMER 74HCT573N ADDRESS LATCH 58C256P EEPROM ULN2803A DRIVER ARRAY 7404N NOT GATE HC49US CRYSTAL LED3MM LED BC327 PNP TRANSISTORS R-EU_0207/7 RESISTORS 62256P RAM Omron switches.resistors and capacitors of different values are used. 6

7 SPECIAL ICS USED AND PURPOSE 8255: The project included a lot of I/O peripheral devices so 's were used to create 5 I/O ports. Both ICs are I/O mapped and used to control: 1. The 8x8 dual color LED matrix 2. The input movement switches 3. The 7-Segment display ICs are enabled using the control signals from the 3x8 decoder which gives 4 control signals depending on I/O and memory operations. ULN2803: The project has a 8x8 dual color LED matrix which requires 3mA current/led. So at a time 64 LED can draw up to 250mA of current. 7

8 But 8255 is incapable of providing such huge amounts of currents. So ULN2803 was used along with 1K resistors to make a current driver. Also pnp transistors were used along with it to sink the current. *It was taken care of that using an IC like ULN2803 changes the I/O logic as the input goes to the npn transistor base terminal. 555 Timer: As the matrix has only 32 pins to operate the matrix we need to multiplex the output so that matrix is refreshed very fast. Now multiplexing creates huge problems while writing a sequential code for the device. Using 555 Timer to generate regular interrupts to manage the multiplexing reduces the difficulty of writing code. So we a 555 timer was used to generate interrupts after every 400 micro seconds as the time required to refresh the matrix was 312 micro seconds. 8

9 9 USER FLOW CHART

10 10 SCHEMATIC

11 11 BOARD LAYOUT

12 .ORG 0000H MAIN: MVI A,80H OUT 03H MVI A,90H OUT 83H MVI B,0FH LXI H,0F00H LXI D,EF00H TRAN: MOV A,M STAX D INX H INX D DCR B JNZ TRAN JMP START CODE (Version 4) START:CALL REST IN 80H 12

13 MVI C,0FH CMP C JNC START IN 80H MVI C,0FH CMP C JNC START CPI 0EH JZ UP CPI 0DH JZ LEFT CPI 0BH JZ DOWN CPI 07H JZ RIGHT UP:MVI A,0FEH OUT 81H 13

14 LXI H,0EF00H INX H MOV A,M RLC MOV M,A JMP CHECKWIN LEFT:MVI A,0FEH OUT 81H LXI H,0EF00H MOV A,M RLC MOV M,A MVI A,0FFH OUT 02H MVI A,0FFH OUT 00H JMP START 14

15 DOWN:MVI A,0FCH OUT 81H LXI H,0EF00H INX H MOV A,M RRC MOV M,A JMP START RIGHT:MVI A,0BEH OUT 81H LXI H,0EF00H MOV A,M RRC MOV M,A MVI A,0FFH OUT 02H MVI A,0FFH OUT 00H JMP START 15

16 REST: LXI H, 0EF00H MOV A,M OUT 00H INX H MOV A,M OUT 02H MVI B,80H RST1: INX H MOV A,M OUT 01H MOV A,B OUT 00H RRC MOV B,A CPI 80H RZ JMP RST1 16

17 DELAY:LXI D,000FFH LOOP1:DCX D MOV A,D ORA E JNZ LOOP1 RET CHECKWIN: LXI H,0EF00H MOV A,M CPI 10H JNZ START INX H MOV A,M CPI 7FH JNZ START JMP WIN WIN:MVI A,0FFH OUT 81H MVI A,0FFH OUT 01H 17

18 MVI A,0FFH OUT 00H WIN1:MVI A,00H OUT 02H MVI A,0FFH OUT 00H IN 80H MVI C,0FH CMP C JNC WIN IN 80H MVI C,0FH CMP C JNC WIN1 JMP MAIN 18

19 .ORG 0F00H.db 010H.db 0FEH.db 000H.db 000H.db 000H.db 0E7H.db 024H.db 024H.db 03CH.db 000H.db 000H.db 000H.END 19

20 BIBILOGRAPHY GAONKAR, R. S., & GAONKAR, R. S. (1996). Microprocessor architecture, programming, and applications with the Englewood Cliffs, N.J., Prentice Hall. ISBN DATASHEETS: /mod_resource/content/2/intel- 8085_datasheet.pdf 20

MICROPROCESSOR LAB PROJECT EC 316

MICROPROCESSOR LAB PROJECT EC 316 MADE BY:- MANISH MEENA 96/EC/13 RAHUL VASHIST 132/EC/13 FACULTY ADVISOR:- PROF. DHANANJAY V. GADRE ACKNOWLEDGEMENT We would sincerely like to thank Associate Prof. Dhananjay