Chapter II HARDWARE AND SOFTWARE DETAILS

Transcription

1 27 Chapter II HARDWARE AND SOFTWARE DETAILS 2.1 INTRODUCTION In this Chapter, the details of the hardware and software employed for carrying out the proposed research work, i.e. development of pre-processing and post-processing techniques for testing in the real-time environment with the goal to achieve better AFIS performance, are presented. Since AFIS involves hardware features like, sensor, digital signal processor (DSP) and computer interface, which requires the basic understanding and hands-on experience for the researcher in this field to interface and test the different hardware for the intended research work. Similarly, algorithm development requires thorough understanding of the software platforms viz., MATLAB, Code Composer Studio (CCS) and C/C++. Correspondingly, all these hardware and software features are dealt in detail. The design of the optimum AFIS system depends on the various specifications of the hardware and software characteristics like, ruggedness, speed, service support, easy integration, ergonomic design, testing, etc., since the design and implementation of an AFIS solution for a particular application are determined by the following criteria: Detailed requirement analysis Workflow based on change in management analysis and planning System hardware and network architecture design System software and middleware architecture design Infrastructure and facilities design and implementation Raw data acquisition facilities Database creation and consolidation facilities Special feature development and customization System deployment and integration Complete system testing and tuning

2 28 Training phase Start-up support facilities Maintenance facilities Customer care facilities With these design and implementation criteria, the related hardware and software details involved in the proposed work are discussed in the following sections. 2.2 OVERVIEW OF FINGERPRINT SENSORS In the year 1960, the United States and Japanese initiated projects to develop automated fingerprint identification system, owing to the requirements in automation of biometric sensors [109]. During this time, there were no specific standards recommended for the quality of the fingerprint sensors. Federal Bureau of Investigation (FBI) recommended certain specification for the quality of the fingerprint scanners called, Fingerprint Transmission Specification (FTS). In this, they included six parameters for the image quality standards such as geometric image accuracy (ability to maintain same relative distances between two minutiae points), modulation transfer function (ability to capture both high and low frequency information such as ridges and ridge ending, respectively), signal-to-noise ratio (ability to discard noise during image capture), gray-scale range (ensuring uniformity in gray scale of the fingerprint image), gray-scale linearity (maintaining linearity in gray scale throughout all shades of gray) and output gray-level uniformity (ability to maintain continuous gray scale throughout the input image having single gray level) [109, 110].Today, fingerprint sensors are available in a variety of shapes and sizes, but they can be classified into two main categories viz., scan area (press type) and swipe type sensors [ ]. In press sensor, the user places and holds finger on the scan area or sensor surface to transfer the impression of finger ridges. The press sensors are larger in height and width than the swipe sensor. Press sensors are available in many types like, FTIR optical, electro optical, optical fiber CMOS, thermal, pressure, etc. Swipe sensors are used in portable consumer electronics equipment, due to its reduced size and shape. Users

3 29 required some basic training and practice to capture the fingerprint images. In this sensor the user slides a finger vertically over the surface of the sensor to transfer the data [113]. Swipe sensor is available in as capacitive swipe sensor. Figure 2.1 shows the different types of fingerprint sensors used in AFIS for capturing the fingerprint. (a) (b) (c) (d) (e) (f) (g) (h) (i) (j) (k) Figure 2.1: Different types of Fingerprint sensors (a) FTIR Optical sensor, (b) FTIR Optical sensor without lens, (c) Optical fiber CMOS sensor, (d) Electro Optical sensor, (e) capacitive sensor, (f) Ultrasound sensor, (g) capacitive swipe sensor, (h) RF Sensor, (i) Thermal sensor, (j) Pressure sensor and (k) MEMS capacitive fingerprint sensor. Several types of fingerprint sensing equipment were developed with high accuracy, resolutions, low-power consumption, high-speed capturing, contactless scanning, single-chip capturing, and MEMS using solid state sensor technology [ ]. These sensors provide only a small fingertip contact area of can able to acquire pixels at 500 dpi, that is a small portion of the actual fingerprint pattern

4 30 [120], whereas an optical sensor provides a contact area of 1 1 with an image size of pixels at 500 dpi. Thus, the number of minutiae points that can be extracted from a fingerprint using solid-state sensors is smaller than the optical sensors Static and Non-Static Fingerprint Reader The fingerprint sensor listed above can be classified into two main categories and are given below: Fingerprint sensor with motionless finger called static (Optical, thermal, RF, pressure, ultrasonic, and hybrid sensors) Fingerprint sensor with motion finger called non-static (capacitive swipe sensor) In a static fingerprint sensor, the user should place the finger without motion while placing on the sensor surface. The sensor array must be as large as the area of the image to be captured. Conversely, in the case of non-static sensors, the user is allowed to move the finger over the surface of the sensor. Here, swipe area is lesser than the image to be captured. In this research work, three types of fingerprint capturing devices were used for testing various matching operations, such as pre-processing, post-processing and interoperability of sensors Specification of the Fingerprint sensors Many fingerprint sensing equipments were manufactured by biometrics industries, of which three sensors used in this work are shown in Figure 2.2 [ ]. 1. Futronics optical press sensor with the size of pixels and resolution of 500 dpi. 2. Eikon capacitive swipe fingerprint sensor with the resolution of 508dpi. In literatures, more discussions were made with these two sensors (swipe and press), owing to the changes in image formation of the same finger, which leads to variation in

5 31 matching. The specifications of these sensors are summarized in the following subsections. (a) (b) Figure 2.2: Two types of Fingerprint Sensors (a) Futronics FS80-Optical Fingerprint Scanner and (b) Eikon Capacitive swipe fingerprint reader Futronics Futronics FS80 USB2.0 Fingerprint Scanner [121] uses an advanced CMOS sensor technology and a precise optical system to deliver high quality fingerprint image. This sensor belongs to the static optical type sensor as shown in Figure 2.2(a). It can capture an almost un-distorted raw fingerprint image into PC within 100 ms and is good for any fingerprint recognition applications. The finger scanning window is made of crown glass with a thickness of 14 mm. It is much more reliable and robust, as compared to any semiconductor type fingerprint sensor. For acquiring the fingerprint image, the finger is illuminated by 4 infra-red LEDs during scanning and the light intensity is automatically adjusted according to characteristics of the scanned fingerprint (wet, dry, blurred, etc.) for optimizing the quality of the captured fingerprint image Eikon The Eikon from Digital Persona is a swipe fingerprint [122] capacitive sensor [123], which has a built-in USB 2.0 interface as shown in Figure 2.2(b). This USB fingerprint sensor provides quick and reliable biometric authentication to desktop or network resources. The USB fingerprint sensor use the same patented technology built into many

6 32 of today's fingerprint-enabled notebook PC's, as well as many mobile phones, keyboards, POS terminals, door locks, handheld ID terminals, etc. This swipe sensor provides better authentication at low cost. 2.3 SOFTWARE BASED HIGH LEVEL DESIGN TOOLS In this research work, DSP based algorithms development and testing were carried out for understanding the real-time implementation issues. DSP has many advantages, but it has limited acceptance, owing to its software based design flow using C, C++ and MATLAB file with a Simulink code generator. Practically, DSP programmers find it very challenging when it comes to the hardware implementation and this becomes more difficult when looking for DSP solution. There have been several alternatives that improve the design flow problems by incorporating a C-based design flow option that mirrors the traditional DSP design flow. These tools are supposed to automate the process of conversion of software based designs into hardware languages, but still there are many limitations in terms of how to write code in such a way that makes this transition with MATLAB Simulink seamless. For example, recursive functions cannot be converted to hardware using these tools. The specifications of the hardware and software tools employed in this work are presented in the following sub-sections MATLAB MATLAB is a high level technical computing language and algorithm development tool that can be used in several applications [ ] such as data visualization analysis, numerical analysis, signal processing, image and video processing, control design, etc. Using the MATLAB software, solution can be achieved faster than traditional programming languages such as C and C++ [128] employing its internal inbuilt functions. Add on toolboxes are a collections of special purpose MATLAB functions files [129] that extend the MATLAB capabilities to solve particular classes of problems in typical application areas. MATLAB provides a number of features, of which the most important are summarized below:

7 33 Integrated development environment for managing code, files, and data Interactive tools for iterative exploration, design, and problem solving Mathematical functions for linear algebra, statistics, Fourier analysis, filtering, optimization, and numerical integration 2-D and 3-D graphics functions for visualizing data Tools for building custom graphical user interfaces Functions for integrating MATLAB based algorithms with external applications and languages, such as C and C++. The MATLAB language is a high-level language with control flow statements, functions, data structures, input, output and object-oriented programming features [ ].The available libraries are vast collection of computational algorithms from basic functions such as arithmetic and trigonometric functions to complex functions such as matrix operations and Fourier transforms. In this research work, we used the Simulink add-on tool to import DSP block set library [133, 134]. Further, we used MATLAB to develop source codes for memory pattern generation to solve data placement problem for on-chip memories Simulink Simulink is a software tool from MATLAB for modeling, simulating, and analyzing dynamic systems [ ]. Simulink block set based MATLAB algorithm development tool can be used in numerous applications [ ]. The DSP system generator runs as part of Simulink [134]. The system generator bundles as the DSP block set that appears in the Simulink library browser. Simulink design works within the system generator creates the executable files at floating-point precision without hardware specifications. Then, the system generator specifies the hardware details for specific DSP device implementation based on the functionality and basic dataflow description. For producing highly optimized DSP blocks, the system generator utilizes the DSP block set for Simulink that invoke the specified DSP family Core Generator, automatically.

8 34 The Simulink/MATLAB tool is capable of generating the C and C++ language code for DSP [146, 147] through the Real Time Workshop (RTW). Real Time Workshop is an extension of capabilities found in Simulink and MATLAB to enable rapid prototyping of real-time software applications on a variety of systems [129]. The RTW also uses the Embedded Target for Texas Instruments (ETTI) C6000 DSPs [148]. The ETTI blocks simplify the design task, since they represent DSK resources like the ADC, DAC, LEDs, etc. to enable the communication channels between the personal computer, the host, and the DSK. In this work, Simulink is used to generate models that can be loaded and tested in the DSK. Figure 2.3: Simulink DSK block resources Figure 2.3 presents the target support processors from Texas Instruments C2000, C5000 and C6000 platform series. Another block included in Simulink that is part of the ETTI is RTDX Instrumentation [ ]. This block-set gives us support to send or

9 35 receives the data from the DSK. PC link between host Simulink and the DSK using the RTDX block presents in C2000 platform in the Simulink library browser C and C++ Design Tools Writing in C/C++ language has been the traditional approach for DSP processors and DSP algorithms [146]. This is an alternative approach for using MATLAB coding [153, 154], mainly due to the fact that there are several design tools that can be used to generate a hardware description of these software programs. These tools are becoming smarter to infer the parallelism inherent to the C code. Consequently, they make it easier to create the transition from software to hardware platforms. There are many variations for these software tools. The ideal case is to be able to convert C to hardware description languages such as DSP, HDL, etc. [155] that are natural platforms to make hardware. However, this is not a fully automated process yet and there is a lot of manual modification required for hardware implementation. Unfortunately, there is no standard and every tool provider provides their own language constructs and follow their own syntax. On the other hand, the hardware code generation depends on the target platform and again every tool manufacturer provides its own library for different hardware platforms. The idea behind all these tools is to make hardware platforms available to application programmers by raising the abstraction level from hardware to software algorithms. There are two major categories among all these toolsets: System C languages and the C to DSP languages that are capable of generating the DSP code for either a specific hardware or a generic hardware platform. System C, defined by the Open System C Initiative (OSCI), is based on event driven simulation scheme [156]. It allows the designers to simulate concurrent processes using C++ syntax. System C processes can communicate in a simulated real-time environment, using signals of all the data types offered by C++ [157, 158]. In some respects, System C imitates the parallelism embedded in the hardware description languages, but it is still described as a system level modeling language. System C includes DSP features such as clock cycle accuracy, hierarchical modeling, multi-value logic, delta cycles, resolution function, etc. System C allows the designers to define

10 36 modules just like DSP CCS supported languages [134] and it sets up the communication among modules through ports and the order that is defined through the hierarchy. Also, processes are the main communication elements and they are all concurrent. The communications between modules are either via signals, buses or FIFOs. 2.4 AN OVERVIEW OF DIGITAL SIGNAL PROCESSOR DSP is one of the most powerful technologies that will shape science and engineering in the twenty-first century. Revolutionary changes have already been made in a broad range of fields, such as communication, medical imaging, radar and sonar, high fidelity music reproduction and oil prospecting [159, 160]. Each and every area has been developed with specific DSP technology comprising of its own algorithms, mathematics and specialized techniques. DSP skill development can be attained through two modes, viz., learning general concepts in the broad field and applying specialized techniques for the particular area of interest [161]. Digital Signal processing is one of the fastest growing applications in communication applications, like data communications, wireless communications, telecommunications, image and video processing, voice recognition systems, etc. [160]. High performance digital signal processors (DSPs) are not well suited to all DSP applications and there is no single DSP processor that can accommodate all applications. In general, DSP processor architectures are designed for general applications and may not be fast enough or cost effective for specific needs. Most of the digital signal processors are designed for performing continuous mathematical manipulation on data applied in real time. Some of the important functions [162] that are specifically designed for signal and image processing applications using DSPs are summarized below: Finite impulse response (FIR) filter. Infinite impulse response (IIR) filter. Transforms like discrete cosine transform (DCT). Inverse discrete cosine transforms (IDCT). Fast Fourier transforms (FFT).

11 37 Convolution. Correlation. Decoders and Encoders. Viterbi decoder. Most of the above said DSP functions involve multiplication and addition operations (multiply accumulate or MAC operation) on the incoming data with either some constant coefficients or internal feedback mechanism to perform a specific application. Consequently, most of the general-purpose DSP processors have built in multiply accumulate (MAC) engines to perform the mathematical operations. To reduce the cost and to improve the performance of the specific application, application specific integrated circuits (ASICs) can also be used. Further, field programmable logic array (FPGA) offers the better of the two technologies with reconfigurable feature of the hardware platform [163], whereas the DSP processor has the limitation of hardware resources such as MAC engines. Conversely, FPGAs offer sufficient capacity to fit plenty of MAC processors into a single device as well as facility to configure the FPGA fabric as MAC processors Internal DSP Filter designs FPGAs are being increasingly used for a variety of computationally intensive applications, especially in the realm of digital signal processing (DSP) [163]. Due to rapid advancements in fabrication technology, the current generation of FPGAs contains a large number of configurable logic blocks (CLBs). Highest non-recurring engineering (NRE) costs and long development time for application specific integrated circuits (ASICs) makes attractive for application specific to DSP solutions. Finite impulse response (FIR) filters are prevalent in signal processing applications. These filters are major determinants of the performance and of the device power consumption. Therefore, it is important to have good tools to optimize FIR filters. Moreover, the techniques can be incorporated in building other complex DSP functions, e.g., linear systems like FFT, DFT, etc. Most of the DSP-design techniques that are currently in use are targeted towards hardware synthesis and do not consider the features of the FPGA architecture

12 38 [ ], specifically. Many signal processing based on DSP design techniques is developed with several filter architectures [ ]. DSP based design techniques in image processing are very less to identify because of the complexity of logic blocks in the registers to configure the memory allocation. The hardware platforms available for implementing the real time image or signal processing applications are Application-Specific Integrated Circuit (ASIC), DSP (Digital Signal Processor), FPGA (Field Programmable Gate Array), MCU (Micro Controller Unit) and RISC (Reduced Instruction Set Computer) [171]. Among the above mentioned hardware platforms, FPGAs and DSPs offer unique and different options for signal and image processing. The DSPs will continue to be used for many of the today's challenging signal processing applications. The DSPs are especially designed for signal processing applications. They provide good flexibility in real time environment. But, FPGAs are not as much flexible as DSPs in real time aspect. Therefore, DSP is used for the implementation of the embedded fingerprint recognition systems DSP Design Flow Developing a methodology for the hardware implementation of complex DSP applications on a reconfigurable logic could be a challenging task due to the integration of several design tools needed in the process. One of the most challenging processes in system design is identifying a starting point. Methodologies help us to handle complex designs efficiently, minimize design time, eliminate many sources of errors, minimize the manpower needed to complete the design, and generally produce the optimal solution designs [172]. The benefits of adopting such a methodology absolutely outweigh its development costs. Designing DSP algorithms is a quite challenging task. The natural paths of DSP algorithms are to use software based languages such as C or C++ and implement the algorithms on DSP processors [173, 151]. The conversion of a software based algorithm to hardware is an automated process. The DSP algorithms are designed in MATLAB, owing to the availability of several signal and image processing mathematics as library

13 39 functions. Figure 2.4 shows the DSP design flow using several tools offered by DSP and MATLAB. A MATLAB [129] algorithm can be converted to register transfer level (RTL) using DSP design tools or it can be combined with Simulink blocks. DSP library is used to implement complex DSP algorithms such as filters that can be used in any design. Coregen is a parameterized tool that can generate complex functions. A Simulink design can be converted to RTL automatically using a System generator tool. System Generator is a DSP design tool in Simulink that allows the usage of Math Works model based designs [163]. Designs are performed from DSP Simulink modeling environment using a specific block set. The DSP Simulink block set is a highly parameterized library that includes DSP functions and algorithms. More than 90 DSP building blocks are available in the DSP block-set, which comprise of common DSP building blocks such as adders, multipliers, and registers. Further, a set of complex DSP building blocks such as forward error correction blocks, FFTs, filters, etc. is available in the block set. These blocks control the code generators that provide optimized results for the selected device. Figure 2.5 shows a snapshot of a Simulink DSP design that represent as DSP blocks. MATLAB v7 Algorithm Synthesis Tool Simulink v7 DSP Library System Generator DSP Tools DSP RTL DSP Code Figure 2.4: DSP design flow using MATLAB/Simulink v2007 with DSP

14 40 The software automatically converts the high level system DSP block diagram to RTL. The result can be synthesized to DSP technology using MATLAB function files. System Generator provides a system integration platform for the design of DSP on Simulink, MATLAB, and C or C++ components of a DSP system to come together in a single simulation and implementation environment. System Generator supports a black box that allows RTL to be imported into Simulink and co-simulated. System Generator also supports the inclusion of an embedded processor running in C or C++ programs The DSP Library Figure 2.5: A snapshot of a Simulink DSP design The DSP Library (DSPLIB) includes many C-callable, assembly-optimized, generalpurpose signal-processing and image or video processing routines [134, 174]. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines, the designer can achieve

15 41 execution speeds considerably faster than equivalent code written in standard C language. In addition, by providing ready-to-use DSP and image and video processing functions, DSPLIB and IMGLIB can significantly shorten the application development time Types of Digital Signal Processors There are several DSPs available from different manufacturers like Intel, Texas, Analog, Free scale, Microchip, Zilog, Cirrus Logic, Motorola, etc. Since, this work mainly using the Texas Instruments based DSP chips and hence the various types and their features are discussed here. Texas Instruments launched the first single-chip Digital Signal Processor (DSP) TMS320in 1982, which provides designers an accelerated next-generation, breakthrough systems as well as complementary technology and support [175]. DSPs are unique microprocessors that are programmable and operate in real-time much faster than general-purpose microprocessors. The most common sizes of RAM are 24 kb, 64 kb, 576 kb and 125 MB. The digital signal processors with RAM sizes up to 1 GB are available. Flash sizes can range from 8 B to 1 GB, with the most common sizes being 8 B and 4 kb. The TMS320 DSP family offers the most extensive selection of DSPs available anywhere with a balance of general-purpose and application-specific processors to fit for application needs. Presently, there are three platforms of TMS320 series available for the designers and are given below: TMS320C5000 DSP Platform TMS320C2000 DSP Platform TMS320C6000 DSP platform Each TMS320C series has its own properties with different fixed and floating point arithmetic support. Floating-point arithmetic is a more flexible and general mechanism than fixed-point. With floating-point, system designers have access to wider dynamic range [176]. As a result, floating-point DSP processors are generally easier to program than their fixed point counterparts, but more expensive and higher power consumption devices.

16 Choosing the Technology and Processor With the growth of DSP platforms, choosing the instruments and the technology is a very competitive factor. However, typically in most DSP designs, more than one processor technology can be used to implement the required functions. To choose a particular DSP, the important parameters taken into consideration are the high performance, size, power consumption, extra features, software and tools to get the process done fast without any breaking. Almost two decades of development, digital signal processors continue to take the leading position than the other competitive processors and thus DSPs are the center of signal processing. Choosing the right DSP processor for a particular work depends heavily on the applications. One processor may perform well for some applications, whereas the others may exhibit poor performance due to the type and the requirements of those applications. Hence, processors are chosen for a particular application based on the clock speed (100 Hz, 100 MHz, 150 MHz, 1000 MHz), RAM size (1 kb, 24 kb, 576 kb), Data Bus Width (from 8 B to 480 MB), ROM Size (96 B, 576 B, 96 kb,) I/O Voltage (up to 3.3 kv) and other features[176]. Among the three platforms the TMS320C6000 platform was employed in this research work and their features are discussed in the following subsections TMS320C6416 DSK The TMS320C6416 is a fixed-point DSP that offers the industry's highest level of performance to address the demands of the digital age. At the clock rate of up to 1 GHz, C6416 DSPs can process information at 8000 MIPS (million instructions per second). In addition to a high clock rate, C6416 DSP can perform high clock cycles with built-in extensions [152, 177]. These extensions include new instructions to accelerate performance in key application areas such as digital communication infrastructure, video and image processing. Figure 2.6 shows the target support processors from Texas Instruments C6416 platform block-sets.

17 43 Figure 2.6: Snapshot of Texas Instruments TMS320C6416 DSK block-sets in MATLAB Simulink TMS320C6713 DSK For designers of high-precision applications, C6713 floating-point DSPs offer the speed, precision, power savings and dynamic range to meet a wide variety of design requirements. These dynamic DSPs are the ideal solution for demanding applications like audio, medical imaging, instrumentation and automotive [178, 179]. The internal architecture of the TMS320C6713 DSK series is shown in Figure 2.7. Figure 2.7: TMS320C6713 DSPs two-level cache memory structure

18 44 The C6713 has the DSP block-sets in MATLAB Simulink environment. Figure 2.8 shows the target support processors from Texas Instruments C6713 platform blocksets. Figure 2.8: Snapshot of Texas Instruments TMS320C6713 DSK block-sets in MATLAB Simulink Hardware Features The hardware features of C6713 DSP [180] are summarized below: Up to 1350 MFLOPS at 225 MHz 100% code-compatible with 32-bit instructions, single and double precision C6000 DSP platform advanced VLIW architecture Two inter-integrated circuit (I 2 C) bus interfaces Two multi-channel buffered serial ports (McBSPs) Up to 256 kbytes of on-chip memory 16-channel DMA controller Up to eight 32-bit instructions executed each cycle Eight independent, multipurpose functional units and 32-bit (thirty-two) registers Advanced DSP C compiler and assembly optimizer maximize efficiency and performance Support IEEE floating-point format Packaging: 27/35-mm BGA and 28-mm TQFP options

19 Software Features TMS320C6713 specific Code Composer Studio v 3.1 from Texas Instruments The Test/sample code provided to reduce coding time Compatible with JTAG emulators from Spectrum Digital Compatible with Win 98 SE/2000/XP 2.5 THE CODE COMPOSER STUDIO (CCS) The CCS is an integrated development environment (IDE) for programming the Texas Instruments based DSP chips. CCS allows programming DSPs and microcontrollers using C, C++ and assembly languages using the tools for code generation, such as a C compiler, an assembler, and a linker. It has graphical features that support the real time debugging of the developed programs [181, 182]. The CCS is used as an interface between Simulink and the DSK through MATLAB to develop new algorithms in the DSK [134]. The CCS is used to build the project from the model generated by Simulink for real time debugging. The projects generated by the CCS need to be modified in order to adjust some configuration parameters in the DSK CCS Development Flow The development flow of most DSP based applications consists of four basic parameters viz., application designs, code creation, debug, and analyses/tune. It is diagrammatically shown in Figure 2.9. Code Composer Studio is the key element of TI s express DSP software and development tools, which integrate many of the tools needed to assist the developer in the development flow. The basic procedures and techniques in program development flow are given in detail in the user guide [183]. Application Designs Code Creation Configuration file Debug Syntax-checking, logging, etc. Analyze and Tune Figure 2.9: Simplified Code Composer Studio Development Flow

20 Versions available in CCS Different types of DSP platforms are developed for specific applications using particular CCS version [ ].The difficulties in DSP development board with CCS versions give the compatibility issues. CCS v3.1 is specially designed for TMS320C6713 and TMS320C6416 DSK [190]. In this research, we employed the code composer studio CCS v3.1 to perform the entire program development Code Composer Studio v3.1 The main window of Code Composer Studio v3.1 is shown in Figure 2.10 that provides some of the basic features and functionalities to create and build a project [191, 192]. Figure 2.10: Snapshot of Code Composer Studio CCS v3.1

21 RTDX Channels Real-time study can be achieved using real-time data exchange (RTDX) channels. RTDX allows the data communications between the PC and the DSK as shown in Figure 2.11, and checks the target in real time without stopping the process [133, 134]. The performance can be examined in real time through the USB port and the TMS320C6713 DSK Joint Team Action Group (JTAG) communication interface with on-chip emulation support. Figure 2.12 shows the RTDX block-sets in Simulink library browser which is used to access the images from file and receives the processed images from embedded function file. With the use of MATLAB/Simulink, CCS v3.1, C6713 DSK and RTDX channels performs the effective communications between the user and the DSK. Figure 2.11: Data communication between MATLAB/Simulink, CCS and DSP through real-time data exchange (RTDX) Figure 2.12: Snapshot of Texas Instruments RTDX block-sets in MATLAB/Simulink

22 48 Code Composer Studio v3.1 comprises of a suite of tools used to develop and debug embedded applications. It includes a compiler, source code editor, project build environment, debugger, profiler and many other features. The instinctive IDE provides a single user interface through each step of the application development flow. Familiar tools and interfaces allow users to get started faster than ever before and add functionality to their application to sophisticated productivity tools. Summary This Chapter covers the basic principle and the types of scanning devices employed in AFIS with particular attention to the specific devices used in this work. Then, the technicalities and software details of the MATLAB and the method of using the same in the program development of the proposed research work are covered. Further, the hardware details of the DSP chips used in this work with the programming details are outlined.