EDK 8.2 PowerPC Tutorial in Virtex-4
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- August Logan
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1 EDK 8.2 PowerPC Tutorial in Virtex-4 Objectives 7KLVWXWRULDOZLOOGHPRQVWUDWHSURFHVVRIFUHDWLQJDQGWHVWLQJD3RZHU3&V\VWHPGHVLJQXVLQJWKH(PEHGGHG 'HYHORSPHQW.LW('.7KHWXWRULDOFRQWDLQVWKHVHVHFWLRQV 6\VWHP5HTXLUHPHQWV 3RZHU3&6\VWHP'HVFULSWLRQ 7XWRULDO6WHSV 7KHIROORZLQJVWHSVDUHGHVFULEHGLQWKLVWXWRULDO 6WDUWLQJ;36 8VLQJWKH%DVH6\VWHP%XLOGHU:L]DUG &UHDWHRU,PSRUW,33HULSKHUDO 'HVLJQ0RGLILFDWLRQXVLQJ3ODWIRUP6WXGLR,PSOHPHQWLQJWKH'HVLJQ 'HILQLQJWKH6RIWZDUH'HVLJQ 'RZQORDGLQJWKH'HVLJQ 'HEXJJLQJWKH'HVLJQ 3HUIRUPLQJ%HKDYLRUDO6LPXODWLRQRIWKH(PEHGGHG6\VWHP System Requirements <RXPXVWKDYHWKHIROORZLQJVRIWZDUHLQVWDOOHGRQ\RXU3&WRFRPSOHWHWKLVWXWRULDO :LQGRZV63:LQGRZV;3 Note: This tutorial can be completed on Linux or Solaris, but the screenshots and directories illustrated in this tutorial are based on the Windows Platform. ('.LRUODWHU,6(L63RUODWHU )DPLOLDULW\ZLWKVWHSVLQWKH;LOLQ[,6(,Q'HSWK7XWRULDO KWWSZZZ[LOLQ[FRPVXSSRUWWHFKVXSWXWRULDOVWXWRULDOVKWP,QRUGHUWRGRZQORDGWKHFRPSOHWHGSURFHVVRUV\VWHP\RXPXVWKDYHWKHIROORZLQJKDUGZDUH ;LOLQ[0/(YDOXDWLRQ3ODWIRUP;&);)) PowerPC Tutorial 1
2 ('.3RZHU3&7XWRULDOLQ9LUWH[ ;LOLQ[3DUDOOHO&DEOHXVHGWRSURJUDPDQGGHEXJWKHGHYLFH 6HULDO&DEOH Note: It should be noted that other hardware could be used with this tutorial. However, the completed design has only been verified on the board specified above. The following design changes are required: 8SGDWHSLQDVVLJQPHQWVLQWKHV\VWHPXFIILOH 8SGDWHERDUG-7$*FKDLQVSHFLILHGLQWKHGRZQORDGFPG PowerPC System Description,QJHQHUDOWRGHVLJQDQHPEHGGHGSURFHVVRUV\VWHP\RXQHHGWKHIROORZLQJ +DUGZDUHFRPSRQHQWV 0HPRU\PDS 6RIWZDUHDSSOLFDWLRQ Tutorial Design Hardware 7KH3RZHU3&33&WXWRULDOGHVLJQLQFOXGHVWKHIROORZLQJKDUGZDUHFRPSRQHQWV 3RZHU3& 3/%%XV 3/%B%5$0B,)B&17/5 %5$0B%/2&. 3/%B(0& 3/%23%B%ULGJH 2QFKLS3HULSKHUDO%XV23%%86 23%B8$57/,7( 23%B*3,2V Tutorial Design Memory Map 7KHIROORZLQJWDEOHVKRZVWKHPHPRU\PDSIRUWKHWXWRULDOGHVLJQDVFUHDWHGE\%DVH6\VWHP%XLOGHU 2 EDK 8.2 PowerPC Tutorial in Virtex WT001 (v4.0) August 30, 2006
3 EDK 8.2 PowerPC Tutorial in Virtex 4 Device Min Address Max Size Comment 3/%B%5$0B&17/5 [))))B [))))B)))).E\WHV 3/%0HPRU\ 23%B8$57/,7( [B [B)))).E\WHV 6HULDO2XWSXW 23%B*3,2 [B [B)))).E\WHV /('RXWSXW 23%B*3,2 [B [B)))).E\WHV 3XVK%XWWRQV 3/%B(0& [B [B)))) 0E\WHV ([WHUQDO0HPRU\ Uhiyr : Tutorial Design Memory Map Tutorial Steps SetUp &RQWUROOHU 0/ERDUGZLWKD56WHUPLQDOFRQQHFWHGWRWKHVHULDOSRUWDQGFRQILJXUHGIRUEDXGZLWK GDWDELWVQRSDULW\DQGQRKDQGVKDNHV Creating the Project File in XPS 7KHILUVWVWHSLQWKLVWXWRULDOLVXVLQJWKH;LOLQ[3ODWIRUP6WXGLR;36WRFUHDWHDSURMHFWILOH;36DOORZV\RXWR FRQWUROWKHKDUGZDUHDQGVRIWZDUHGHYHORSPHQWRIWKH3RZHU3&V\VWHPDQGLQFOXGHVWKHIROORZLQJ $QHGLWRUDQGDSURMHFWPDQDJHPHQWLQWHUIDFHIRUFUHDWLQJDQGHGLWLQJVRXUFHFRGH 6RIWZDUHWRROIORZFRQILJXUDWLRQRSWLRQV <RXFDQXVH;36WRFUHDWHWKHIROORZLQJILOHV 3URMHFW1DYLJDWRUSURMHFWILOHWKDWDOORZV\RXWRFRQWUROWKHKDUGZDUHLPSOHPHQWDWLRQIORZ 0LFURSURFHVVRU+DUGZDUH6SHFLILFDWLRQ0+6ILOH Note: For more information on the MHS file, refer to the Microprocessor Hardware Specification (MHS) chapter in the Platform Specification Format Reference Manual. 0LFURSURFHVVRU6RIWZDUH6SHFLILFDWLRQ066ILOH Note: For more information on the MSS file, refer to the Microprocessor Software Specification (MSS) chapter in the Platform Specification Format Reference Manual. ;36VXSSRUWVWKHVRIWZDUHWRROIORZVDVVRFLDWHGZLWKWKHVHVRIWZDUHVSHFLILFDWLRQV$GGLWLRQDOO\\RXFDQXVH ;36WRFXVWRPL]HVRIWZDUHOLEUDULHVGULYHUVDQGLQWHUUXSWKDQGOHUVDQGWRFRPSLOH\RXUSURJUDPV PowerPC Tutorial 3
4 ('.3RZHU3&7XWRULDOLQ9LUWH[ Starting XPS 7RRSHQ;36VHOHFWWKHIROORZLQJ Start Programs Xilinx Platform Studio 8.2i Xilinx Platform Studio 6HOHFW%DVH6\VWHP%XLOGHU:L]DUG%6%WRRSHQWKH&UHDWH1HZ3URMHFW8VLQJ%6%:L]DUGGLDORJER[ VKRZQLQ)LJXUH &OLFNOk. 8VHWKH3URMHFW)LOHBrowse EXWWRQWREURZVHWRWKHIROGHU\RXZDQWDV\RXUSURMHFWGLUHFWRU\&OLFNOpen WRFUHDWHWKHV\VWHP[PSILOHWKHQSave &OLFNOk WRVWDUWWKH%6%ZL]DUG I r);36grhvqrwvxssruwgluhfwru\rusurmhfwqdphvzklfklqfoxghvsdfhv Defining the System Hardware MHS and MPD Files Avtˆ r )8 rh rir Q wrp V v t7h rt r 7ˆvyqr Xv h q 7KHQH[WVWHSLQWKHWXWRULDOLVGHILQLQJWKHHPEHGGHGV\VWHPKDUGZDUHZLWKWKH0LFURSURFHVVRU+DUGZDUH 6SHFLILFDWLRQ0+6DQG0LFURSURFHVVRU3HULSKHUDO'HVFULSWLRQ03'ILOHV MHS File 7KH0LFURSURFHVVRU+DUGZDUH6SHFLILFDWLRQ0+6ILOHGHVFULEHVWKHIROORZLQJ (PEHGGHGSURFHVVRUHLWKHUWKHVRIWFRUH0LFUR%OD]HSURFHVVRURUWKHKDUGFRUH3RZHU3&RQO\DYDLODEOH LQ9LUWH[,,3URDQG9LUWHW[);GHYLFHV 3HULSKHUDOVDQGDVVRFLDWHGDGGUHVVVSDFHV %XVHV 4 EDK 8.2 PowerPC Tutorial in Virtex WT001 (v4.0) August 30, 2006
5 EDK 8.2 PowerPC Tutorial in Virtex 4 2YHUDOOFRQQHFWLYLW\RIWKHV\VWHP 7KH0+6ILOHLVDUHDGDEOHWH[WILOHWKDWLVDQLQSXWWRWKH3ODWIRUP*HQHUDWRUWKHKDUGZDUHV\VWHPEXLOGLQJWRRO &RQFHSWXDOO\WKH0+6ILOHLVDWH[WXDOVFKHPDWLFRIWKHHPEHGGHGV\VWHP7RLQVWDQWLDWHDFRPSRQHQWLQWKH 0+6ILOH\RXPXVWLQFOXGHLQIRUPDWLRQVSHFLILFWRWKHFRPSRQHQW MPD File (DFKV\VWHPSHULSKHUDOKDVDFRUUHVSRQGLQJ03'ILOH7KH03'ILOHLVWKHV\PERORIWKHHPEHGGHGV\VWHP SHULSKHUDOWRWKH0+6VFKHPDWLFRIWKHHPEHGGHGV\VWHP7KH03'ILOHFRQWDLQVDOORIWKHDYDLODEOHSRUWVDQG KDUGZDUHSDUDPHWHUVIRUDSHULSKHUDO7KHWXWRULDO03'ILOHLVORFDWHGLQWKHIROORZLQJGLUHFWRU\ ;,/,1;B('.KZ;LOLQ[3URFHVVRU,3/LESFRUHVSHULSKHUDOBQDPH!GDWD Note: For more information on the MPD and MHS files, refer to the Microprocessor Peripheral Description (MPD) and Microprocessor Hardware Specification (MHS) chapters in the Platform Specification Format Reference Manual. ('.SURYLGHVWZRPHWKRGVIRUFUHDWLQJWKH0+6ILOH%DVH6\VWHP%XLOGHU:L]DUGDQGWKH$GG(GLW&RUHV'LDORJ DVVLVW\RXLQEXLOGLQJWKHSURFHVVRUV\VWHPZKLFKLVGHILQHGLQWKH0+6ILOH7KLVWXWRULDOLOOXVWUDWHVWKH%DVH 6\VWHP%XLOGHU Using the Base System Builder Wizard 8VHWKHIROORZLQJVWHSVWRFUHDWHWKHSURFHVVRUV\VWHP,QWKH%DVH6\VWHP%XLOGHU 6HOHFW,ZRXOGOLNHWRFUHDWHDQHZGHVLJQ WKHQFOLFNNext,QWKH%DVH6\VWHP%XLOGHU6HOHFW%RDUG'LDORJVHOHFWWKHIROORZLQJDVVKRZQLQ)LJXUH %RDUG9HQGRr: ;LOLQ[ %RDUG1DPe: 9LUWH[0/(YDOXDWLRQ3ODWIRUP %RDUG5HYLVLRn: PowerPC Tutorial 5
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8 ('.3RZHU3&7XWRULDOLQ9LUWH[ )3*$-7$*7KH3RZHU3&-7$*SLQVZLOOEHLQFOXGHGLQWKH)3*$-7$*FKDLQ &38'HEXJ8VHU3LQV2QO\7KLVZLOOEULQJWKH3RZHU3&-7$*SLQVRXWWRXVHU,2 &38'HEXJ8VHUDQG7UDFH3LQV7KLVRSWLRQLVXQDYDLODEOHEHFDXVHWKH0/ERDUGGRHVQRW KDYHDVHSDUDWHWUDFHKHDGHU 1R'HEXJ1RGHEXJLVWXUQHGRQ Note: For more information about the Xilinx Microprocessor Debugger (XMD), refer to the Xilinx Microprocessor Debugger (XMD) chapter in the Embedded System Tools Guide. 8VHUVFDQDOVRVSHFLI\WKHVL]HRIWKH2Q&KLS0HPRU\ <RXFDQDOVRVSHFLI\WKHXVHRIDFDFKH &OLFNNext6HOHFWWKHSHULSKHUDOVXEVHWDVVKRZQLQ)LJXUH)LJXUHDQG)LJXUH Note: The Baud rate for the OPB UARTLITE must be updated to Avtˆ r#8 svtˆ rdpd r shpr 8 EDK 8.2 PowerPC Tutorial in Virtex WT001 (v4.0) August 30, 2006
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